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Clock Driver

## Overview

The MCUXpresso SDK provides APIs for MCUXpresso SDK devices' clock operation.

The clock driver supports:

- Clock generator (PLL, FLL, and so on) configuration
- Clock mux and divider configuration
- Getting clock frequency

The MCUXpresso SDK provides a peripheral clock driver for the SYSCON module of MCUXpresso SDK devices.

# Function description

Clock driver provides these functions:

- Functions to initialize the Core clock to given frequency
- Functions to configure the clock selection muxes.
- Functions to setup peripheral clock dividers
- Functions to set the flash wait states for the input freuqency
- Functions to get the frequency of the selected clock
- Functions to set PLL frequency

## SYSCON Clock frequency functions

SYSCON clock module provides clocks, such as MCLKCLK, ADCCLK, DMICCLK, MCGFLLCLK, FXCOMCLK, WDTOSC, RTCOSC, USBCLK, and SYSPLL. The functions CLOCK_EnableClock() and CLOCK_DisableClock() enables and disables the various clocks. CLOCK_SetupFROClocking() initializes the FRO to 12 MHz, 48 MHz, or 96 MHz frequency. CLOCK_SetupPLLData(), CLOCK_SetupSystemPLLPrec(), and CLOCK_SetPLLFreq() functions are used to setup the PLL. The SYSCON clock driver provides functions to get the frequency of these clocks, such as CLOCK_GetFreq(), CLOCK_GetFro12MFreq(), CLOCK_GetExtClkFreq(), CLOCK_GetWdtOscFreq(), CLOCK_GetFroHfFreq(), CLOCK_GetPllOutFreq(), CLOCK_GetOsc32KFreq(), CLOCK_GetCoreSysClkFreq(), CLOCK_GetI2SMClkFreq(), CLOCK_GetFlexCommClkFreq, and CLOCK_GetAsyncApbClkFreq.

## SYSCON clock Selection Muxes

The SYSCON clock driver provides the function to configure the clock selected. The function CLOCK_AttachClk() is implemented for this. The function selects the clock source for a particular peripheral like MAINCLK, DMIC, FLEXCOMM, USB, ADC, and PLL.

## SYSCON clock dividers

The SYSCON clock module provides the function to setup the peripheral clock dividers. The function CLOCK_SetClkDiv() configures the CLKDIV registers for various periperals like USB, DMIC, I2S, SYSTICK, AHB, ADC, and also CLKOUT and TRACE functions.

## SYSCON flash wait states

The SYSCON clock driver provides the function CLOCK_SetFLASHAccessCyclesForFreq() that configures FLASHCFG register with a selected FLASHTIM value.

# Typical use case

    POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on so that we can switch to its 12MHz mode temporarily

## Files

file | fsl_clock.h

## Macros

#define | CLOCK_FRO_SETTING_API_ROM_ADDRESS (0x0F001CD3U)
| FRO clock setting API address in ROM. More...
#define | CLOCK_FAIM_BASE (0x50010000U)
| FAIM base address.
#define | ADC_CLOCKS
| Clock ip name array for ADC. More...
#define | ACMP_CLOCKS
| Clock ip name array for ACMP. More...
#define | DAC_CLOCKS
| Clock ip name array for DAC. More...
#define | SWM_CLOCKS
| Clock ip name array for SWM. More...
#define | ROM_CLOCKS
| Clock ip name array for ROM. More...
#define | SRAM_CLOCKS
| Clock ip name array for SRAM. More...
#define | IOCON_CLOCKS
| Clock ip name array for IOCON. More...
#define | GPIO_CLOCKS
| Clock ip name array for GPIO. More...
#define | GPIO_INT_CLOCKS
| Clock ip name array for GPIO_INT. More...
#define | CRC_CLOCKS
| Clock ip name array for CRC. More...
#define | WWDT_CLOCKS
| Clock ip name array for WWDT. More...
#define | SCT_CLOCKS
| Clock ip name array for SCT0. More...
#define | I2C_CLOCKS
| Clock ip name array for I2C. More...
#define | USART_CLOCKS
| Clock ip name array for I2C. More...
#define | SPI_CLOCKS
| Clock ip name array for SPI. More...
#define | CAPT_CLOCKS
| Clock ip name array for CAPT. More...
#define | CTIMER_CLOCKS
| Clock ip name array for CTIMER. More...
#define | MRT_CLOCKS
| Clock ip name array for MRT. More...
#define | WKT_CLOCKS
| Clock ip name array for WKT. More...
#define | PLU_CLOCKS
| Clock ip name array for PLU. More...
#define | CLK_GATE_DEFINE(reg, bit) ((((reg)&0xFFU) << 8U) | ((bit)&0xFFU))
| Internal used Clock definition only. More...

## Enumerations

enum

clock_ip_name_t {
kCLOCK_IpInvalid = 0U,
kCLOCK_Sys = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 0U),
kCLOCK_Rom = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 1U),
kCLOCK_Ram0 = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 2U),
kCLOCK_Flash = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 4U),
kCLOCK_I2c0 = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 5U),
kCLOCK_Gpio0 = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 6U),
kCLOCK_Swm = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 7U),
kCLOCK_Wkt = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 9U),
kCLOCK_Mrt = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 10U),
kCLOCK_Spi0 = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 11U),
kCLOCK_Crc = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 13U),
kCLOCK_Uart0 = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 14U),
kCLOCK_Uart1 = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 15U),
kCLOCK_Wwdt = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 17U),
kCLOCK_Iocon = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 18U),
kCLOCK_Acmp = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 19U),
kCLOCK_I2c1 = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 21U),
kCLOCK_Adc = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 24U),
kCLOCK_Ctimer0 = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 25U),
kCLOCK_Dac = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 27U),
kCLOCK_GpioInt = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL0, 28U),
kCLOCK_Capt = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL1, 0U),
kCLOCK_PLU = CLK_GATE_DEFINE(SYS_AHB_CLK_CTRL1, 5U)
}

| Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock. More...
enum | clock_name_t { kCLOCK_CoreSysClk, kCLOCK_MainClk, kCLOCK_Fro, kCLOCK_FroDiv, kCLOCK_ExtClk, kCLOCK_LPOsc, kCLOCK_Frg0 }
| Clock name used to get clock frequency. More...

enum

clock_select_t {
kCAPT_Clk_From_Fro = CLK_MUX_DEFINE(CAPTCLKSEL, 0U),
kCAPT_Clk_From_MainClk = CLK_MUX_DEFINE(CAPTCLKSEL, 1U),
kCAPT_Clk_From_Fro_Div = CLK_MUX_DEFINE(CAPTCLKSEL, 3U),
kCAPT_Clk_From_LPOsc = CLK_MUX_DEFINE(CAPTCLKSEL, 4U),
kADC_Clk_From_Fro = CLK_MUX_DEFINE(ADCCLKSEL, 0U),
kADC_Clk_From_Extclk = CLK_MUX_DEFINE(ADCCLKSEL, 1U),
kUART0_Clk_From_Fro = CLK_MUX_DEFINE(UART0CLKSEL, 0U),
kUART0_Clk_From_MainClk = CLK_MUX_DEFINE(UART0CLKSEL, 1U),
kUART0_Clk_From_Frg0Clk = CLK_MUX_DEFINE(UART0CLKSEL, 2U),
kUART0_Clk_From_Fro_Div = CLK_MUX_DEFINE(UART0CLKSEL, 4U),
kUART1_Clk_From_Fro = CLK_MUX_DEFINE(UART1CLKSEL, 0U),
kUART1_Clk_From_MainClk = CLK_MUX_DEFINE(UART1CLKSEL, 1U),
kUART1_Clk_From_Frg0Clk = CLK_MUX_DEFINE(UART1CLKSEL, 2U),
kUART1_Clk_From_Fro_Div = CLK_MUX_DEFINE(UART1CLKSEL, 4U),
kI2C0_Clk_From_Fro = CLK_MUX_DEFINE(I2C0CLKSEL, 0U),
kI2C0_Clk_From_MainClk = CLK_MUX_DEFINE(I2C0CLKSEL, 1U),
kI2C0_Clk_From_Frg0Clk = CLK_MUX_DEFINE(I2C0CLKSEL, 2U),
kI2C0_Clk_From_Fro_Div = CLK_MUX_DEFINE(I2C0CLKSEL, 4U),
kI2C1_Clk_From_Fro = CLK_MUX_DEFINE(I2C1CLKSEL, 0U),
kI2C1_Clk_From_MainClk = CLK_MUX_DEFINE(I2C1CLKSEL, 1U),
kI2C1_Clk_From_Frg0Clk = CLK_MUX_DEFINE(I2C1CLKSEL, 2U),
kI2C1_Clk_From_Fro_Div = CLK_MUX_DEFINE(I2C1CLKSEL, 4U),
kSPI0_Clk_From_Fro = CLK_MUX_DEFINE(SPI0CLKSEL, 0U),
kSPI0_Clk_From_MainClk = CLK_MUX_DEFINE(SPI0CLKSEL, 1U),
kSPI0_Clk_From_Frg0Clk = CLK_MUX_DEFINE(SPI0CLKSEL, 2U),
kSPI0_Clk_From_Fro_Div = CLK_MUX_DEFINE(SPI0CLKSEL, 4U),
kFRG0_Clk_From_Fro = CLK_MUX_DEFINE(FRG[0].FRGCLKSEL, 0U),
kFRG0_Clk_From_MainClk = CLK_MUX_DEFINE(FRG[0].FRGCLKSEL, 1U),
kCLKOUT_From_Fro = CLK_MUX_DEFINE(CLKOUTSEL, 0U),
kCLKOUT_From_MainClk = CLK_MUX_DEFINE(CLKOUTSEL, 1U),
kCLKOUT_From_ExtClk = CLK_MUX_DEFINE(CLKOUTSEL, 3U),
kCLKOUT_From_Lposc = CLK_MUX_DEFINE(CLKOUTSEL, 4U)
}

| Clock Mux Switches CLK_MUX_DEFINE(reg, mux) reg is used to define the mux register mux is used to define the mux value. More...
enum | clock_divider_t { kCLOCK_DivAhbClk = CLK_DIV_DEFINE(SYSAHBCLKDIV), kCLOCK_DivAdcClk = CLK_DIV_DEFINE(ADCCLKDIV), kCLOCK_DivClkOut = CLK_DIV_DEFINE(CLKOUTDIV) }
| Clock divider. More...
enum | clock_fro_osc_freq_t { kCLOCK_FroOscOut18M = 18000U, kCLOCK_FroOscOut24M = 24000U, kCLOCK_FroOscOut30M = 30000U }
| fro output frequency source definition More...
enum | clock_main_clk_src_t { kCLOCK_MainClkSrcFro = CLK_MAIN_CLK_MUX_DEFINE(0U, 0U), kCLOCK_MainClkSrcExtClk = CLK_MAIN_CLK_MUX_DEFINE(1U, 0U), kCLOCK_MainClkSrcLPOsc = CLK_MAIN_CLK_MUX_DEFINE(2U, 0U), kCLOCK_MainClkSrcFroDiv = CLK_MAIN_CLK_MUX_DEFINE(3U, 0U) }
| PLL clock definition. More...

## Variables

volatile uint32_t | g_LP_Osc_Freq
| lower power oscilltor clock frequency. More...
volatile uint32_t | g_Ext_Clk_Freq
| external clock frequency. More...
volatile uint32_t | g_Fro_Osc_Freq
| external clock frequency. More...

## Driver version

#define | FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(2, 3, 3))
| CLOCK driver version 2.3.3. More...

## Clock gate, mux, and divider.

PLL configuration structure
static void | CLOCK_EnableClock (clock_ip_name_t clk)
static void | CLOCK_DisableClock (clock_ip_name_t clk)
static void | CLOCK_Select (clock_select_t sel)
static void | CLOCK_SetClkDivider (clock_divider_t name, uint32_t value)
static uint32_t | CLOCK_GetClkDivider (clock_divider_t name)
static void | CLOCK_SetCoreSysClkDiv (uint32_t value)
void | CLOCK_SetMainClkSrc (clock_main_clk_src_t src)
| Set main clock reference source. More...
static void | CLOCK_SetFRGClkMul (uint32_t *base, uint32_t mul)

## Get frequency

Set FRO clock source

Parameters

  src,please | reference _clock_fro_src definition.

uint32_t | CLOCK_GetFRG0ClkFreq (void)
| Return Frequency of FRG0 Clock. More...
uint32_t | CLOCK_GetMainClkFreq (void)
| Return Frequency of Main Clock. More...
uint32_t | CLOCK_GetFroFreq (void)
| Return Frequency of FRO. More...
static uint32_t | CLOCK_GetCoreSysClkFreq (void)
| Return Frequency of core. More...
uint32_t | CLOCK_GetClockOutClkFreq (void)
| Return Frequency of ClockOut. More...
uint32_t | CLOCK_GetUart0ClkFreq (void)
| Get UART0 frequency. More...
uint32_t | CLOCK_GetUart1ClkFreq (void)
| Get UART1 frequency. More...
uint32_t | CLOCK_GetFreq (clock_name_t clockName)
| Return Frequency of selected clock. More...
static uint32_t | CLOCK_GetLPOscFreq (void)
| Get watch dog OSC frequency. More...
static uint32_t | CLOCK_GetExtClkFreq (void)
| Get external clock frequency. More...

## Fractional clock operations

System PLL initialize.

Parameters

  config | System PLL configurations.

bool | CLOCK_SetFRG0ClkFreq (uint32_t freq)
| Set FRG0 output frequency. More...

## External/internal oscillator clock operations

void | CLOCK_InitExtClkin (uint32_t clkInFreq)
| Init external CLK IN, select the CLKIN as the external clock source. More...
static void | CLOCK_DeinitLpOsc (void)
| Deinit watch dog OSC.
void | CLOCK_SetFroOscFreq (clock_fro_osc_freq_t freq)
| Set FRO oscillator output frequency. More...

## Macro Definition Documentation

#define FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(2, 3, 3))

#define CLOCK_FRO_SETTING_API_ROM_ADDRESS (0x0F001CD3U)

#define ADC_CLOCKS

Value:
{ \
kCLOCK_Adc, \
}
kCLOCK_Adc
Clock gate name: Adc.
Definition: fsl_clock.h:209

#define ACMP_CLOCKS

Value:
{ \
kCLOCK_Acmp, \
}
kCLOCK_Acmp
Clock gate name: Acmp.
Definition: fsl_clock.h:207

#define DAC_CLOCKS

Value:
{ \
kCLOCK_Dac, \
}
kCLOCK_Dac
Clock gate name: Dac.
Definition: fsl_clock.h:211

#define SWM_CLOCKS

Value:
{ \
kCLOCK_Swm, \
}
kCLOCK_Swm
Clock gate name: Swm.
Definition: fsl_clock.h:198

#define ROM_CLOCKS

Value:
{ \
kCLOCK_Rom, \
}
kCLOCK_Rom
Clock gate name: Rom.
Definition: fsl_clock.h:193

#define SRAM_CLOCKS

Value:
{ \
kCLOCK_Ram0, \
}
kCLOCK_Ram0
Clock gate name: Ram0.
Definition: fsl_clock.h:194

#define IOCON_CLOCKS

Value:
{ \
kCLOCK_Iocon, \
}
kCLOCK_Iocon
Clock gate name: Iocon.
Definition: fsl_clock.h:206

#define GPIO_CLOCKS

Value:
{ \
kCLOCK_Gpio0, \
}
kCLOCK_Gpio0
Clock gate name: Gpio0.
Definition: fsl_clock.h:197

#define GPIO_INT_CLOCKS

Value:
{ \
kCLOCK_GpioInt, \
}
kCLOCK_GpioInt
Clock gate name: GpioInt.
Definition: fsl_clock.h:212

#define CRC_CLOCKS

Value:
{ \
kCLOCK_Crc, \
}
kCLOCK_Crc
Clock gate name: Crc.
Definition: fsl_clock.h:202

#define WWDT_CLOCKS

Value:
{ \
kCLOCK_Wwdt, \
}
kCLOCK_Wwdt
Clock gate name: Wwdt.
Definition: fsl_clock.h:205

#define SCT_CLOCKS

Value:
{ \
kCLOCK_Sct, \
}

#define I2C_CLOCKS

Value:
{ \
kCLOCK_I2c0, kCLOCK_I2c1, \
}
kCLOCK_I2c1
Clock gate name: I2c1.
Definition: fsl_clock.h:208
kCLOCK_I2c0
Clock gate name: I2c0.
Definition: fsl_clock.h:196

#define USART_CLOCKS

Value:
{ \
kCLOCK_Uart0, kCLOCK_Uart1, \
}
kCLOCK_Uart0
Clock gate name: Uart0.
Definition: fsl_clock.h:203
kCLOCK_Uart1
Clock gate name: Uart1.
Definition: fsl_clock.h:204

#define SPI_CLOCKS

Value:
{ \
kCLOCK_Spi0, \
}
kCLOCK_Spi0
Clock gate name: Spi0.
Definition: fsl_clock.h:201

#define CAPT_CLOCKS

Value:
{ \
kCLOCK_Capt, \
}
kCLOCK_Capt
Clock gate name: Capt.
Definition: fsl_clock.h:213

#define CTIMER_CLOCKS

Value:
{ \
kCLOCK_Ctimer0, \
}
kCLOCK_Ctimer0
Clock gate name: Ctimer0.
Definition: fsl_clock.h:210

#define MRT_CLOCKS

Value:
{ \
kCLOCK_Mrt, \
}
kCLOCK_Mrt
Clock gate name: Mrt.
Definition: fsl_clock.h:200

#define WKT_CLOCKS

Value:
{ \
kCLOCK_Wkt, \
}
kCLOCK_Wkt
Clock gate name: Wkt.
Definition: fsl_clock.h:199

#define PLU_CLOCKS

Value:
{ \
kCLOCK_PLU, \
}
kCLOCK_PLU
Clock gate name: PLU.
Definition: fsl_clock.h:214

#define CLK_GATE_DEFINE | ( |  | reg,
|  |  | bit
| ) |  | ((((reg)&0xFFU) << 8U) | ((bit)&0xFFU))

## Enumeration Type Documentation

enum clock_ip_name_t

Enumerator
kCLOCK_IpInvalid | Invalid Ip Name.
kCLOCK_Sys | Clock gate name: Sys.
kCLOCK_Rom | Clock gate name: Rom.
kCLOCK_Ram0 | Clock gate name: Ram0.
kCLOCK_Flash | Clock gate name: Flash.
kCLOCK_I2c0 | Clock gate name: I2c0.
kCLOCK_Gpio0 | Clock gate name: Gpio0.
kCLOCK_Swm | Clock gate name: Swm.
kCLOCK_Wkt | Clock gate name: Wkt.
kCLOCK_Mrt | Clock gate name: Mrt.
kCLOCK_Spi0 | Clock gate name: Spi0.
kCLOCK_Crc | Clock gate name: Crc.
kCLOCK_Uart0 | Clock gate name: Uart0.
kCLOCK_Uart1 | Clock gate name: Uart1.
kCLOCK_Wwdt | Clock gate name: Wwdt.
kCLOCK_Iocon | Clock gate name: Iocon.
kCLOCK_Acmp | Clock gate name: Acmp.
kCLOCK_I2c1 | Clock gate name: I2c1.
kCLOCK_Adc | Clock gate name: Adc.
kCLOCK_Ctimer0 | Clock gate name: Ctimer0.
kCLOCK_Dac | Clock gate name: Dac.
kCLOCK_GpioInt | Clock gate name: GpioInt.
kCLOCK_Capt | Clock gate name: Capt.
kCLOCK_PLU | Clock gate name: PLU.

enum clock_name_t

Enumerator
kCLOCK_CoreSysClk | Cpu/AHB/AHB matrix/Memories,etc.
kCLOCK_MainClk | Main clock.
kCLOCK_Fro | FRO18/24/30.
kCLOCK_FroDiv | FRO div clock.
kCLOCK_ExtClk | External Clock.
kCLOCK_LPOsc | Watchdog Oscillator.
kCLOCK_Frg0 | fractional rate0

enum clock_select_t

Enumerator
kCAPT_Clk_From_Fro | Mux CAPT_Clk from Fro.
kCAPT_Clk_From_MainClk | Mux CAPT_Clk from MainClk.
kCAPT_Clk_From_Fro_Div | Mux CAPT_Clk from Fro_Div.
kCAPT_Clk_From_LPOsc | Mux CAPT_Clk from LPOsc.
kADC_Clk_From_Fro | Mux ADC_Clk from Fro.
kADC_Clk_From_Extclk | Mux ADC_Clk from Extclk.
kUART0_Clk_From_Fro | Mux UART0_Clk from Fro.
kUART0_Clk_From_MainClk | Mux UART0_Clk from MainClk.
kUART0_Clk_From_Frg0Clk | Mux UART0_Clk from Frg0Clk.
kUART0_Clk_From_Fro_Div | Mux UART0_Clk from Fro_Div.
kUART1_Clk_From_Fro | Mux UART1_Clk from Fro.
kUART1_Clk_From_MainClk | Mux UART1_Clk from MainClk.
kUART1_Clk_From_Frg0Clk | Mux UART1_Clk from Frg0Clk.
kUART1_Clk_From_Fro_Div | Mux UART1_Clk from Fro_Div.
kI2C0_Clk_From_Fro | Mux I2C0_Clk from Fro.
kI2C0_Clk_From_MainClk | Mux I2C0_Clk from MainClk.
kI2C0_Clk_From_Frg0Clk | Mux I2C0_Clk from Frg0Clk.
kI2C0_Clk_From_Fro_Div | Mux I2C0_Clk from Fro_Div.
kI2C1_Clk_From_Fro | Mux I2C1_Clk from Fro.
kI2C1_Clk_From_MainClk | Mux I2C1_Clk from MainClk.
kI2C1_Clk_From_Frg0Clk | Mux I2C1_Clk from Frg0Clk.
kI2C1_Clk_From_Fro_Div | Mux I2C1_Clk from Fro_Div.
kSPI0_Clk_From_Fro | Mux SPI0_Clk from Fro.
kSPI0_Clk_From_MainClk | Mux SPI0_Clk from MainClk.
kSPI0_Clk_From_Frg0Clk | Mux SPI0_Clk from Frg0Clk.
kSPI0_Clk_From_Fro_Div | Mux SPI0_Clk from Fro_Div.
kFRG0_Clk_From_Fro | Mux FRG0_Clk from Fro.
kFRG0_Clk_From_MainClk | Mux FRG0_Clk from MainClk.
kCLKOUT_From_Fro | Mux CLKOUT from Fro.
kCLKOUT_From_MainClk | Mux CLKOUT from MainClk.
kCLKOUT_From_ExtClk | Mux CLKOUT from ExtClk.
kCLKOUT_From_Lposc | Mux CLKOUT from Lposc.

enum clock_divider_t

Enumerator
kCLOCK_DivAhbClk | Ahb Clock Divider.
kCLOCK_DivAdcClk | Adc Clock Divider.
kCLOCK_DivClkOut | Clk Out Divider.

enum clock_fro_osc_freq_t

fro oscillator output frequency value definition

Enumerator
kCLOCK_FroOscOut18M | FRO oscillator output 18M.
kCLOCK_FroOscOut24M | FRO oscillator output 24M.
kCLOCK_FroOscOut30M | FRO oscillator output 30M.

enum clock_main_clk_src_t

< Main clock source definition

Enumerator
kCLOCK_MainClkSrcFro | main clock source from FRO
kCLOCK_MainClkSrcExtClk | main clock source from Ext clock
kCLOCK_MainClkSrcLPOsc | main clock source from lower power oscillator
kCLOCK_MainClkSrcFroDiv | main clock source from FRO Div

## Function Documentation

void CLOCK_SetMainClkSrc | ( | clock_main_clk_src_t | src | ) |

Parameters

  src | Reference clock_main_clk_src_t to set the main clock source.

uint32_t CLOCK_GetFRG0ClkFreq | ( | void |  | ) |

Returns
  Frequency of FRG0 Clock.

uint32_t CLOCK_GetMainClkFreq | ( | void |  | ) |

Returns
  Frequency of Main Clock.

uint32_t CLOCK_GetFroFreq | ( | void |  | ) |

Returns
  Frequency of FRO.

static uint32_t CLOCK_GetCoreSysClkFreq | ( | void |  | ) |

inlinestatic

Returns
  Frequency of core.

uint32_t CLOCK_GetClockOutClkFreq | ( | void |  | ) |

Returns
  Frequency of ClockOut

uint32_t CLOCK_GetUart0ClkFreq | ( | void |  | ) |

Return values

  UART0 | frequency value.

uint32_t CLOCK_GetUart1ClkFreq | ( | void |  | ) |

Return values

  UART1 | frequency value.

uint32_t CLOCK_GetFreq | ( | clock_name_t | clockName | ) |

Returns
  Frequency of selected clock

static uint32_t CLOCK_GetLPOscFreq | ( | void |  | ) |

inlinestatic

Return values

  watch | dog OSC frequency value.

static uint32_t CLOCK_GetExtClkFreq | ( | void |  | ) |

inlinestatic

Return values

  external | clock frequency value.

bool CLOCK_SetFRG0ClkFreq | ( | uint32_t | freq | ) |

Parameters

  freq | target output frequency,freq < input and (input / freq) < 2 should be satisfy.

Return values

  true | - successfully, false - input argument is invalid.

void CLOCK_InitExtClkin | ( | uint32_t | clkInFreq | ) |

Parameters

  clkInFreq | external clock in frequency.

void CLOCK_SetFroOscFreq | ( | clock_fro_osc_freq_t | freq | ) |

Initialize the FRO clock to given frequency (18, 24 or 30 MHz).

Parameters

  freq | Please refer to definition of clock_fro_osc_freq_t, frequency must be one of 18000, 24000 or 30000 KHz.

## Variable Documentation

volatile uint32_t g_LP_Osc_Freq

This variable is used to store the lower power oscillator frequency which is set by CLOCK_InitLPOsc, and it is returned by CLOCK_GetLPOscFreq.

volatile uint32_t g_Ext_Clk_Freq

This variable is used to store the external clock frequency which is include external oscillator clock and external clk in clock frequency value, it is set by CLOCK_InitExtClkin when CLK IN is used as external clock or by CLOCK_InitSysOsc when external oscillator is used as external clock ,and it is returned by CLOCK_GetExtClkFreq.

volatile uint32_t g_Fro_Osc_Freq

This variable is used to store the FRO osc clock frequency.