/*
 * Copyright 2017-2021 NXP
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

/***********************************************************************************************************************
 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
 **********************************************************************************************************************/

#ifndef _PIN_MUX_H_
#define _PIN_MUX_H_

/***********************************************************************************************************************
 * Definitions
 **********************************************************************************************************************/

/*! @brief Direction type  */
typedef enum _pin_mux_direction
{
    kPIN_MUX_DirectionInput = 0U,        /* Input direction */
    kPIN_MUX_DirectionOutput = 1U,       /* Output direction */
    kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */
} pin_mux_direction_t;

/*!
 * @addtogroup pin_mux
 * @{
 */

/***********************************************************************************************************************
 * API
 **********************************************************************************************************************/

#if defined(__cplusplus)
extern "C" {
#endif

/*!
 * @brief Calls initialization functions.
 *
 */
void BOARD_InitBootPins(void);

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitPins(void); /* Function assigned for the Cortex-M0P */

#define IOCON_PIO_HYS_EN 0x20u     /*!<@brief Enable hysteresis */
#define IOCON_PIO_INV_DI 0x00u     /*!<@brief Input not invert */
#define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */
#define IOCON_PIO_OD_DI 0x00u      /*!<@brief Disables Open-drain function */

/*! @name PIO0_11 (number 10), CN6[10]/CN8[3]/D4/PIO0_11/M_PIO0_11
  @{ */
/* Routed pin properties */
/*!
 * @brief Peripheral name */
#define BOARD_INITLEDSPINS_LED_BLUE_PERIPHERAL GPIO
/*!
 * @brief Signal name */
#define BOARD_INITLEDSPINS_LED_BLUE_SIGNAL PIO0
/*!
 * @brief Signal channel */
#define BOARD_INITLEDSPINS_LED_BLUE_CHANNEL 11
/*!
 * @brief Routed pin name */
#define BOARD_INITLEDSPINS_LED_BLUE_PIN_NAME PIO0_11
/*!
 * @brief Label */
#define BOARD_INITLEDSPINS_LED_BLUE_LABEL "CN6[10]/CN8[3]/D4/PIO0_11/M_PIO0_11"
/*!
 * @brief Identifier */
#define BOARD_INITLEDSPINS_LED_BLUE_NAME "LED_BLUE"
/*!
 * @brief Direction */
#define BOARD_INITLEDSPINS_LED_BLUE_DIRECTION kPIN_MUX_DirectionOutput

/* Symbols to be used with GPIO driver */
/*!
 * @brief GPIO peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO
/*!
 * @brief GPIO pin number */
#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN 11U
/*!
 * @brief GPIO pin mask */
#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN_MASK (1U << 11U)
/*!
 * @brief PORT device index: 0 */
#define BOARD_INITLEDSPINS_LED_BLUE_PORT 0U
/*!
 * @brief PORT pin number */
#define BOARD_INITLEDSPINS_LED_BLUE_PIN 11U
/*!
 * @brief PORT pin mask */
#define BOARD_INITLEDSPINS_LED_BLUE_PIN_MASK (1U << 11U)
/* @} */

/*! @name PIO0_12 (number 5), S2/CN8[6]/CN6[5]/D3/M_PIO0_12/PIO0_12
  @{ */
/* Routed pin properties */
/*!
 * @brief Peripheral name */
#define BOARD_INITLEDSPINS_LED_GREEN_PERIPHERAL GPIO
/*!
 * @brief Signal name */
#define BOARD_INITLEDSPINS_LED_GREEN_SIGNAL PIO0
/*!
 * @brief Signal channel */
#define BOARD_INITLEDSPINS_LED_GREEN_CHANNEL 12
/*!
 * @brief Routed pin name */
#define BOARD_INITLEDSPINS_LED_GREEN_PIN_NAME PIO0_12
/*!
 * @brief Label */
#define BOARD_INITLEDSPINS_LED_GREEN_LABEL "S2/CN8[6]/CN6[5]/D3/M_PIO0_12/PIO0_12"
/*!
 * @brief Identifier */
#define BOARD_INITLEDSPINS_LED_GREEN_NAME "LED_GREEN"
/*!
 * @brief Direction */
#define BOARD_INITLEDSPINS_LED_GREEN_DIRECTION kPIN_MUX_DirectionOutput

/* Symbols to be used with GPIO driver */
/*!
 * @brief GPIO peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO
/*!
 * @brief GPIO pin number */
#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN 12U
/*!
 * @brief GPIO pin mask */
#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN_MASK (1U << 12U)
/*!
 * @brief PORT device index: 0 */
#define BOARD_INITLEDSPINS_LED_GREEN_PORT 0U
/*!
 * @brief PORT pin number */
#define BOARD_INITLEDSPINS_LED_GREEN_PIN 12U
/*!
 * @brief PORT pin mask */
#define BOARD_INITLEDSPINS_LED_GREEN_PIN_MASK (1U << 12U)
/* @} */

/*! @name PIO0_13 (number 4), S1/CN8[4]/CN6[4]/D2/M_PIO0_13/PIO0_13
  @{ */
/* Routed pin properties */
/*!
 * @brief Peripheral name */
#define BOARD_INITLEDSPINS_LED_RED_PERIPHERAL GPIO
/*!
 * @brief Signal name */
#define BOARD_INITLEDSPINS_LED_RED_SIGNAL PIO0
/*!
 * @brief Signal channel */
#define BOARD_INITLEDSPINS_LED_RED_CHANNEL 13
/*!
 * @brief Routed pin name */
#define BOARD_INITLEDSPINS_LED_RED_PIN_NAME PIO0_13
/*!
 * @brief Label */
#define BOARD_INITLEDSPINS_LED_RED_LABEL "S1/CN8[4]/CN6[4]/D2/M_PIO0_13/PIO0_13"
/*!
 * @brief Identifier */
#define BOARD_INITLEDSPINS_LED_RED_NAME "LED_RED"
/*!
 * @brief Direction */
#define BOARD_INITLEDSPINS_LED_RED_DIRECTION kPIN_MUX_DirectionOutput

/* Symbols to be used with GPIO driver */
/*!
 * @brief GPIO peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO
/*!
 * @brief GPIO pin number */
#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN 13U
/*!
 * @brief GPIO pin mask */
#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN_MASK (1U << 13U)
/*!
 * @brief PORT device index: 0 */
#define BOARD_INITLEDSPINS_LED_RED_PORT 0U
/*!
 * @brief PORT pin number */
#define BOARD_INITLEDSPINS_LED_RED_PIN 13U
/*!
 * @brief PORT pin mask */
#define BOARD_INITLEDSPINS_LED_RED_PIN_MASK (1U << 13U)
/* @} */

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M0P */

#define IOCON_PIO_HYS_EN 0x20u      /*!<@brief Enable hysteresis */
#define IOCON_PIO_INV_DI 0x00u      /*!<@brief Input not invert */
#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OD_DI 0x00u       /*!<@brief Disables Open-drain function */

/*! @name PIO0_0 (number 22), CN7[3]/CN8[8]/JP2/PIO0_0
  @{ */
/* Routed pin properties */
/*!
 * @brief Peripheral name */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PERIPHERAL USART0
/*!
 * @brief Signal name */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_SIGNAL RXD
/*!
 * @brief Routed pin name */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_NAME PIO0_0
/*!
 * @brief Label */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_LABEL "CN7[3]/CN8[8]/JP2/PIO0_0"
/*!
 * @brief Identifier */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_NAME "DEBUG_UART_RX"
/*!
 * @brief PORT device index: 0 */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT 0U
/*!
 * @brief PORT pin number */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 0U
/*!
 * @brief PORT pin mask */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_MASK (1U << 0U)
/* @} */

/*! @name PIO0_4 (number 7), CN6[7]/CN8[7]/CN5[5]/JP24/PIO0_4
  @{ */
/* Routed pin properties */
/*!
 * @brief Peripheral name */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PERIPHERAL USART0
/*!
 * @brief Signal name */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_SIGNAL TXD
/*!
 * @brief Routed pin name */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_NAME PIO0_4
/*!
 * @brief Label */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_LABEL "CN6[7]/CN8[7]/CN5[5]/JP24/PIO0_4"
/*!
 * @brief Identifier */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_NAME "DEBUG_UART_TX"
/*!
 * @brief PORT device index: 0 */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT 0U
/*!
 * @brief PORT pin number */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 4U
/*!
 * @brief PORT pin mask */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_MASK (1U << 4U)
/* @} */

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M0P */

#define IOCON_PIO_HYS_EN 0x20u      /*!<@brief Enable hysteresis */
#define IOCON_PIO_INV_DI 0x00u      /*!<@brief Input not invert */
#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OD_DI 0x00u       /*!<@brief Disables Open-drain function */

/*! @name SWCLK (number 8), CN6[8]/CN1[4]/U1[16]/SWCLK_PIO0_3
  @{ */
/* Routed pin properties */
/*!
 * @brief Peripheral name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PERIPHERAL SWD
/*!
 * @brief Signal name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_SIGNAL SWCLK
/*!
 * @brief Routed pin name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_NAME SWCLK
/*!
 * @brief Label */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_LABEL "CN6[8]/CN1[4]/U1[16]/SWCLK_PIO0_3"
/*!
 * @brief Identifier */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_NAME "DEBUG_SWD_SWDCLK"
/*!
 * @brief PORT device index: 0 */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT 0U
/*!
 * @brief PORT pin number */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN 3U
/*!
 * @brief PORT pin mask */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 3U)
/* @} */

/*! @name SWDIO (number 9), CN6[9]/CN1[2]/U1[17]/SWDIO_PIO0_2
  @{ */
/* Routed pin properties */
/*!
 * @brief Peripheral name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PERIPHERAL SWD
/*!
 * @brief Signal name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_SIGNAL SWDIO
/*!
 * @brief Routed pin name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_NAME SWDIO
/*!
 * @brief Label */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_LABEL "CN6[9]/CN1[2]/U1[17]/SWDIO_PIO0_2"
/*!
 * @brief Identifier */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_NAME "DEBUG_SWD_SWDIO"
/*!
 * @brief PORT device index: 0 */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT 0U
/*!
 * @brief PORT pin number */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN 2U
/*!
 * @brief PORT pin mask */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 2U)
/* @} */

/*! @name RESETN (number 6), CN6[6]/CN1[10]/S3/CN4[3]/U1[3]/U1[8]/TRST_P0_5
  @{ */
/* Routed pin properties */
/*!
 * @brief Peripheral name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PERIPHERAL SYSCON
/*!
 * @brief Signal name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_SIGNAL RESETN
/*!
 * @brief Routed pin name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN_NAME RESETN
/*!
 * @brief Label */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_LABEL "CN6[6]/CN1[10]/S3/CN4[3]/U1[3]/U1[8]/TRST_P0_5"
/*!
 * @brief Identifier */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_NAME "DEBUG_SWD_RESETN"
/*!
 * @brief PORT device index: 0 */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PORT 0U
/*!
 * @brief PORT pin number */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN 5U
/*!
 * @brief PORT pin mask */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN_MASK (1U << 5U)
/* @} */

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M0P */

#define IOCON_PIO_HYS_EN 0x20u      /*!<@brief Enable hysteresis */
#define IOCON_PIO_INV_DI 0x00u      /*!<@brief Input not invert */
#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OD_DI 0x00u       /*!<@brief Disables Open-drain function */

/*! @name PIO0_14 (number 23), CN7[2]/CN3[1]/JP4/PIO0_14
  @{ */
/* Routed pin properties */
#define BOARD_INITI2CPINS_I2C_SCL_PERIPHERAL I2C0                   /*!<@brief Peripheral name */
#define BOARD_INITI2CPINS_I2C_SCL_SIGNAL SCL                        /*!<@brief Signal name */
#define BOARD_INITI2CPINS_I2C_SCL_PIN_NAME PIO0_14                  /*!<@brief Routed pin name */
#define BOARD_INITI2CPINS_I2C_SCL_LABEL "CN7[2]/CN3[1]/JP4/PIO0_14" /*!<@brief Label */
#define BOARD_INITI2CPINS_I2C_SCL_NAME "I2C_SCL"                    /*!<@brief Identifier */
#define BOARD_INITI2CPINS_I2C_SCL_PORT 0U                           /*!<@brief PORT device index: 0 */
#define BOARD_INITI2CPINS_I2C_SCL_PIN 14U                           /*!<@brief PORT pin number */
#define BOARD_INITI2CPINS_I2C_SCL_PIN_MASK (1U << 14U)              /*!<@brief PORT pin mask */
                                                                    /* @} */

/*! @name PIO0_7 (number 20), CN7[5]/CN3[2]/JP23/CN5[4]/PIO0_7
  @{ */
/* Routed pin properties */
/*!
 * @brief Peripheral name */
#define BOARD_INITI2CPINS_I2C_SDA_PERIPHERAL I2C0
/*!
 * @brief Signal name */
#define BOARD_INITI2CPINS_I2C_SDA_SIGNAL SDA
/*!
 * @brief Routed pin name */
#define BOARD_INITI2CPINS_I2C_SDA_PIN_NAME PIO0_7
/*!
 * @brief Label */
#define BOARD_INITI2CPINS_I2C_SDA_LABEL "CN7[5]/CN3[2]/JP23/CN5[4]/PIO0_7"
/*!
 * @brief Identifier */
#define BOARD_INITI2CPINS_I2C_SDA_NAME "I2C_SDA"
/*!
 * @brief PORT device index: 0 */
#define BOARD_INITI2CPINS_I2C_SDA_PORT 0U
/*!
 * @brief PORT pin number */
#define BOARD_INITI2CPINS_I2C_SDA_PIN 7U
/*!
 * @brief PORT pin mask */
#define BOARD_INITI2CPINS_I2C_SDA_PIN_MASK (1U << 7U)
/* @} */

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitI2CPins(void); /* Function assigned for the Cortex-M0P */

#define IOCON_PIO_HYS_EN 0x20u      /*!<@brief Enable hysteresis */
#define IOCON_PIO_INV_DI 0x00u      /*!<@brief Input not invert */
#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OD_DI 0x00u       /*!<@brief Disables Open-drain function */

/*! @name PIO0_13 (number 4), S1/CN8[4]/CN6[4]/D2/M_PIO0_13/PIO0_13
  @{ */
/* Routed pin properties */
/*!
 * @brief Peripheral name */
#define BOARD_INITBUTTONSPINS_S1_PERIPHERAL GPIO
/*!
 * @brief Signal name */
#define BOARD_INITBUTTONSPINS_S1_SIGNAL PIO0
/*!
 * @brief Signal channel */
#define BOARD_INITBUTTONSPINS_S1_CHANNEL 13
/*!
 * @brief Routed pin name */
#define BOARD_INITBUTTONSPINS_S1_PIN_NAME PIO0_13
/*!
 * @brief Label */
#define BOARD_INITBUTTONSPINS_S1_LABEL "S1/CN8[4]/CN6[4]/D2/M_PIO0_13/PIO0_13"
/*!
 * @brief Identifier */
#define BOARD_INITBUTTONSPINS_S1_NAME "S1"
/*!
 * @brief Direction */
#define BOARD_INITBUTTONSPINS_S1_DIRECTION kPIN_MUX_DirectionInput

/* Symbols to be used with GPIO driver */
/*!
 * @brief GPIO peripheral base pointer */
#define BOARD_INITBUTTONSPINS_S1_GPIO GPIO
/*!
 * @brief GPIO pin number */
#define BOARD_INITBUTTONSPINS_S1_GPIO_PIN 13U
/*!
 * @brief GPIO pin mask */
#define BOARD_INITBUTTONSPINS_S1_GPIO_PIN_MASK (1U << 13U)
/*!
 * @brief PORT device index: 0 */
#define BOARD_INITBUTTONSPINS_S1_PORT 0U
/*!
 * @brief PORT pin number */
#define BOARD_INITBUTTONSPINS_S1_PIN 13U
/*!
 * @brief PORT pin mask */
#define BOARD_INITBUTTONSPINS_S1_PIN_MASK (1U << 13U)
/* @} */

/*! @name PIO0_12 (number 5), S2/CN8[6]/CN6[5]/D3/M_PIO0_12/PIO0_12
  @{ */
/* Routed pin properties */
/*!
 * @brief Peripheral name */
#define BOARD_INITBUTTONSPINS_S2_PERIPHERAL GPIO
/*!
 * @brief Signal name */
#define BOARD_INITBUTTONSPINS_S2_SIGNAL PIO0
/*!
 * @brief Signal channel */
#define BOARD_INITBUTTONSPINS_S2_CHANNEL 12
/*!
 * @brief Routed pin name */
#define BOARD_INITBUTTONSPINS_S2_PIN_NAME PIO0_12
/*!
 * @brief Label */
#define BOARD_INITBUTTONSPINS_S2_LABEL "S2/CN8[6]/CN6[5]/D3/M_PIO0_12/PIO0_12"
/*!
 * @brief Identifier */
#define BOARD_INITBUTTONSPINS_S2_NAME "S2"
/*!
 * @brief Direction */
#define BOARD_INITBUTTONSPINS_S2_DIRECTION kPIN_MUX_DirectionInput

/* Symbols to be used with GPIO driver */
/*!
 * @brief GPIO peripheral base pointer */
#define BOARD_INITBUTTONSPINS_S2_GPIO GPIO
/*!
 * @brief GPIO pin number */
#define BOARD_INITBUTTONSPINS_S2_GPIO_PIN 12U
/*!
 * @brief GPIO pin mask */
#define BOARD_INITBUTTONSPINS_S2_GPIO_PIN_MASK (1U << 12U)
/*!
 * @brief PORT device index: 0 */
#define BOARD_INITBUTTONSPINS_S2_PORT 0U
/*!
 * @brief PORT pin number */
#define BOARD_INITBUTTONSPINS_S2_PIN 12U
/*!
 * @brief PORT pin mask */
#define BOARD_INITBUTTONSPINS_S2_PIN_MASK (1U << 12U)
/* @} */

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitBUTTONsPins(void); /* Function assigned for the Cortex-M0P */

#if defined(__cplusplus)
}
#endif

/*!
 * @}
 */
#endif /* _PIN_MUX_H_ */

/***********************************************************************************************************************
 * EOF
 **********************************************************************************************************************/
