/*
 * Copyright 2021 NXP.
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#include "safety_config.h"

#if defined(__IAR_SYSTEMS_ICC__)
#pragma location = ".safety_ram"
#endif

/*******************************************************************************
 *                                                                              *
 *                           STRUCTURE FOR DIO Initialization and TEST          *
 *                                                                              *
 *******************************************************************************/

fs_dio_test_lpc_t dio_safety_test_item_0 =                               /* P0_18 */
    {.iocon_mode_shift = IOCON_PIO_MODE_SHIFT,                           /*Device depend */
     .pPort_byte       = (uint8_t *)&(GPIO->B[0][18]),                   /* Address of byte register in GPIO */
     .pPort_dir        = (uint32_t *)&(GPIO->DIR[0]),                    /* Address of dir1 register */
     .pPort_Iocon      = (uint32_t *)&(IOCON->PIO[IOCON_INDEX_PIO0_18]), /* Address of concrete IOCON register */

     .pinNum          = 18, /* Position in DIR register */
     .gpio_clkc_shift = SYSCON_SYSAHBCLKCTRL0_GPIO0_SHIFT};

fs_dio_test_lpc_t dio_safety_test_item_1 = /* P0_15 */
    {
        .iocon_mode_shift = IOCON_PIO_MODE_SHIFT,                           /*Device depend */
        .pPort_byte       = (uint8_t *)&(GPIO->B[0][15]),                   /* Address of byte register in GPIO */
        .pPort_dir        = (uint32_t *)&(GPIO->DIR[0]),                    /* Address of dir1 register */
        .pPort_Iocon      = (uint32_t *)&(IOCON->PIO[IOCON_INDEX_PIO0_15]), /* Address of concrete IOCON register */

        .pinNum          = 15, /* Position in DIR register */
        .gpio_clkc_shift = SYSCON_SYSAHBCLKCTRL0_GPIO0_SHIFT,
};

/* NULL terminated array of pointers to dio_test_t items for safety DIO test */
fs_dio_test_lpc_t *g_dio_safety_test_items[] = {&dio_safety_test_item_0, &dio_safety_test_item_1, NULL};

/*******************************************************************************
 *                                                                              *
 *                           STRUCTURE FOR AIO TEST                             *
 *                                                                              *
 *******************************************************************************/
#define ADC_MAX                 ((1 << (ADC_RESOLUTION)) - 1)
#define ADC_BANDGAP_LEVEL_RAW   (((ADC_BANDGAP_LEVEL) * (ADC_MAX)) / (ADC_REFERENCE))
#define ADC_MIN_LIMIT(val)      (uint16_t)(((val) * (100 - ADC_DEVIATION_PERCENT)) / 100)
#define ADC_MAX_LIMIT(val)      (uint16_t)(((val) * (100 + ADC_DEVIATION_PERCENT)) / 100)

fs_aio_test_a5_t aio_safety_test_item_VL =
{
  .AdcChannel = 0,
  .sequence = 0,
  .Limits.low = (uint32_t)ADC_MIN_LIMIT(0),
  .Limits.high = (uint32_t)ADC_MAX_LIMIT(60),
  .state = FS_AIO_INIT
};

fs_aio_test_a5_t aio_safety_test_item_VH =
{
  .AdcChannel = 3,
  .sequence = 0,
  .Limits.low = (uint32_t)ADC_MIN_LIMIT(ADC_MAX),
  .Limits.high = (uint32_t)ADC_MAX_LIMIT(ADC_MAX),
  .state = FS_AIO_INIT
};

fs_aio_test_a5_t aio_safety_test_item_BG =
{
  .AdcChannel = 7,
  .sequence = 0,
  .Limits.low = (uint32_t)ADC_MIN_LIMIT(ADC_BANDGAP_LEVEL_RAW),
  .Limits.high = (uint32_t)ADC_MAX_LIMIT(ADC_BANDGAP_LEVEL_RAW),
  .state = FS_AIO_INIT
};

/* NULL terminated array of pointers to fs_aio_test_a2346_t items for safety AIO test */
fs_aio_test_a5_t *g_aio_safety_test_items[] = {&aio_safety_test_item_VL,
                                                &aio_safety_test_item_VH,
                                                &aio_safety_test_item_BG,
                                                NULL};