185 lines
7.1 KiB
C
185 lines
7.1 KiB
C
/*
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2019, 2022 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_device_registers.h"
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#include "fsl_debug_console.h"
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#include "pin_mux.h"
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#include "board.h"
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#include "fsl_adc.h"
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#include "fsl_clock.h"
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#include "fsl_power.h"
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#include <stdbool.h>
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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#define DEMO_ADC_BASE ADC
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#define DEMO_ADC_SAMPLE_CHANNEL_NUMBER 7U
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#define DEMO_ADC_IRQ_ID ADC_SEQA_IRQn
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#define DEMO_ADC_IRQ_HANDLER_FUNC ADC_SEQA_IRQHandler
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#define DEMO_ADC_CLOCK_SOURCE kCLOCK_Fro
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#define DEMO_ADC_CLOCK_DIVIDER 1U
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static adc_result_info_t gAdcResultInfoStruct;
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adc_result_info_t *volatile gAdcResultInfoPtr = &gAdcResultInfoStruct;
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volatile bool gAdcConvSeqAIntFlag;
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const uint32_t g_Adc_12bitFullRange = 4096U;
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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static void ADC_Configuration(void);
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/*******************************************************************************
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* Code
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******************************************************************************/
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/*!
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* @brief Main function
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*/
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int main(void)
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{
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/* Initialize board hardware. */
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/* Attach 12 MHz clock to USART0 (debug console) */
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CLOCK_Select(BOARD_DEBUG_USART_CLK_ATTACH);
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BOARD_InitBootPins();
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BOARD_InitBootClocks();
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BOARD_InitDebugConsole();
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/* Attach FRO clock to ADC0. */
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CLOCK_Select(kADC_Clk_From_Fro);
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CLOCK_SetClkDivider(kCLOCK_DivAdcClk, 1U);
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/* Power on ADC. */
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POWER_DisablePD(kPDRUNCFG_PD_ADC0);
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PRINTF("ADC interrupt example.\r\n");
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#if !(defined(FSL_FEATURE_ADC_HAS_NO_CALIB_FUNC) && FSL_FEATURE_ADC_HAS_NO_CALIB_FUNC)
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uint32_t frequency = 0U;
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/* Calibration after power up. */
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#if defined(FSL_FEATURE_ADC_HAS_CALIB_REG) && FSL_FEATURE_ADC_HAS_CALIB_REG
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DEMO_ADC_BASE->CTRL |= ADC_CTRL_BYPASSCAL_MASK;
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frequency = CLOCK_GetFreq(kCLOCK_BusClk);
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if (true == ADC_DoOffsetCalibration(DEMO_ADC_BASE, frequency))
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#else
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#if defined(SYSCON_ADCCLKDIV_DIV_MASK)
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frequency = CLOCK_GetFreq(DEMO_ADC_CLOCK_SOURCE) / CLOCK_GetClkDivider(kCLOCK_DivAdcClk);
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#else
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frequency = CLOCK_GetFreq(DEMO_ADC_CLOCK_SOURCE);
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#endif /* SYSCON_ADCCLKDIV_DIV_MASK */
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if (true == ADC_DoSelfCalibration(DEMO_ADC_BASE, frequency))
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#endif /* FSL_FEATURE_ADC_HAS_CALIB_REG */
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{
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PRINTF("ADC Calibration Done.\r\n");
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}
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else
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{
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PRINTF("ADC Calibration Failed.\r\n");
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}
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#if defined(FSL_FEATURE_ADC_CALIBRATION_CLOCK_LOWER_THAN_30MHz) && FSL_FEATURE_ADC_CALIBRATION_CLOCK_LOWER_THAN_30MHz
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ReInitSystemclock();
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#endif
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#endif /* FSL_FEATURE_ADC_HAS_NO_CALIB_FUNC */
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/* Configure the ADC as basic polling mode. */
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ADC_Configuration();
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/* Enable the interrupt. */
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/* Enable the interrupt the for sequence A done. */
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ADC_EnableInterrupts(DEMO_ADC_BASE, kADC_ConvSeqAInterruptEnable);
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NVIC_EnableIRQ(DEMO_ADC_IRQ_ID);
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PRINTF("Configuration Done.\r\n");
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#if defined(FSL_FEATURE_ADC_HAS_CTRL_RESOL) & FSL_FEATURE_ADC_HAS_CTRL_RESOL
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PRINTF("ADC Full Range: %d\r\n", g_Adc_12bitFullRange);
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#endif /* FSL_FEATURE_ADC_HAS_CTRL_RESOL */
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while (1)
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{
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GETCHAR();
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gAdcConvSeqAIntFlag = false;
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ADC_DoSoftwareTriggerConvSeqA(DEMO_ADC_BASE);
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while (!gAdcConvSeqAIntFlag)
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{
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}
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PRINTF("gAdcResultInfoStruct.result = %d\r\n", gAdcResultInfoStruct.result);
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PRINTF("gAdcResultInfoStruct.channelNumber = %d\r\n", gAdcResultInfoStruct.channelNumber);
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PRINTF("gAdcResultInfoStruct.overrunFlag = %d\r\n", gAdcResultInfoStruct.overrunFlag ? 1U : 0U);
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PRINTF("\r\n");
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}
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}
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/*
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* ISR for ADC conversion sequence A done.
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*/
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void DEMO_ADC_IRQ_HANDLER_FUNC(void)
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{
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if (kADC_ConvSeqAInterruptFlag == (kADC_ConvSeqAInterruptFlag & ADC_GetStatusFlags(DEMO_ADC_BASE)))
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{
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ADC_GetChannelConversionResult(DEMO_ADC_BASE, DEMO_ADC_SAMPLE_CHANNEL_NUMBER, gAdcResultInfoPtr);
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ADC_ClearStatusFlags(DEMO_ADC_BASE, kADC_ConvSeqAInterruptFlag);
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gAdcConvSeqAIntFlag = true;
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}
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SDK_ISR_EXIT_BARRIER;
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}
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/*
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* Configure the ADC as normal converter in polling mode.
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*/
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void ADC_Configuration(void)
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{
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adc_config_t adcConfigStruct;
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adc_conv_seq_config_t adcConvSeqConfigStruct;
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/* Configure the converter. */
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#if defined(FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE) & FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE
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adcConfigStruct.clockMode = kADC_ClockSynchronousMode; /* Using sync clock source. */
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#endif /* FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE */
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adcConfigStruct.clockDividerNumber = DEMO_ADC_CLOCK_DIVIDER;
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#if defined(FSL_FEATURE_ADC_HAS_CTRL_RESOL) & FSL_FEATURE_ADC_HAS_CTRL_RESOL
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adcConfigStruct.resolution = kADC_Resolution12bit;
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#endif /* FSL_FEATURE_ADC_HAS_CTRL_RESOL */
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#if defined(FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL) & FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL
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adcConfigStruct.enableBypassCalibration = false;
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#endif /* FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL */
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#if defined(FSL_FEATURE_ADC_HAS_CTRL_TSAMP) & FSL_FEATURE_ADC_HAS_CTRL_TSAMP
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adcConfigStruct.sampleTimeNumber = 0U;
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#endif /* FSL_FEATURE_ADC_HAS_CTRL_TSAMP */
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#if defined(FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE) & FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE
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adcConfigStruct.enableLowPowerMode = false;
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#endif /* FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE */
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#if defined(FSL_FEATURE_ADC_HAS_TRIM_REG) & FSL_FEATURE_ADC_HAS_TRIM_REG
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adcConfigStruct.voltageRange = kADC_HighVoltageRange;
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#endif /* FSL_FEATURE_ADC_HAS_TRIM_REG */
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ADC_Init(DEMO_ADC_BASE, &adcConfigStruct);
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#if !(defined(FSL_FEATURE_ADC_HAS_NO_INSEL) && FSL_FEATURE_ADC_HAS_NO_INSEL)
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/* Use the temperature sensor input to channel 0. */
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ADC_EnableTemperatureSensor(DEMO_ADC_BASE, true);
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#endif /* FSL_FEATURE_ADC_HAS_NO_INSEL. */
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/* Enable channel DEMO_ADC_SAMPLE_CHANNEL_NUMBER's conversion in Sequence A. */
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#if defined(FSL_FEATURE_ADC_HAS_SEQ_CTRL_TSAMP) & FSL_FEATURE_ADC_HAS_SEQ_CTRL_TSAMP
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adcConvSeqConfigStruct.seqSampleTimeNumber = 0U;
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#endif /* FSL_FEATURE_ADC_HAS_SEQ_CTRL_TSAMP */
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adcConvSeqConfigStruct.channelMask =
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(1U << DEMO_ADC_SAMPLE_CHANNEL_NUMBER); /* Includes channel DEMO_ADC_SAMPLE_CHANNEL_NUMBER. */
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adcConvSeqConfigStruct.triggerMask = 0U;
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adcConvSeqConfigStruct.triggerPolarity = kADC_TriggerPolarityPositiveEdge;
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adcConvSeqConfigStruct.enableSingleStep = false;
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adcConvSeqConfigStruct.enableSyncBypass = false;
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adcConvSeqConfigStruct.interruptMode = kADC_InterruptForEachSequence;
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ADC_SetConvSeqAConfig(DEMO_ADC_BASE, &adcConvSeqConfigStruct);
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ADC_EnableConvSeqA(DEMO_ADC_BASE, true); /* Enable the conversion sequence A. */
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/* Clear the result register. */
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ADC_DoSoftwareTriggerConvSeqA(DEMO_ADC_BASE);
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while (!ADC_GetChannelConversionResult(DEMO_ADC_BASE, DEMO_ADC_SAMPLE_CHANNEL_NUMBER, &gAdcResultInfoStruct))
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{
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}
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ADC_GetConvSeqAGlobalConversionResult(DEMO_ADC_BASE, &gAdcResultInfoStruct);
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}
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