40 lines
1.2 KiB
C
40 lines
1.2 KiB
C
/*
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* Copyright 2019 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdint.h>
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#include "fsl_common.h"
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#include "clock_config.h"
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#include "board.h"
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#include "fsl_debug_console.h"
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/* Clock rate on the CLKIN pin */
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const uint32_t ExtClockIn = BOARD_EXTCLKINRATE;
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/*******************************************************************************
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* Code
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******************************************************************************/
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/* Initialize debug console. */
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status_t BOARD_InitDebugConsole(void)
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{
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#if ((SDK_DEBUGCONSOLE == DEBUGCONSOLE_REDIRECT_TO_SDK) || defined(SDK_DEBUGCONSOLE_UART))
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status_t result;
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/* Select the main clock as source clock of USART0 (debug console) */
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CLOCK_Select(BOARD_DEBUG_USART_CLK_ATTACH);
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RESET_PeripheralReset(BOARD_DEBUG_USART_RST);
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result = DbgConsole_Init(BOARD_DEBUG_USART_INSTANCE, BOARD_DEBUG_USART_BAUDRATE, BOARD_DEBUG_USART_TYPE,
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BOARD_DEBUG_USART_CLK_FREQ);
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assert(kStatus_Success == result);
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return result;
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#else
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return kStatus_Success;
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#endif
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}
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