185 lines
5.6 KiB
C
185 lines
5.6 KiB
C
/*
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* Copyright 2017-2020 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __FSL_DAC_H__
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#define __FSL_DAC_H__
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#include "fsl_common.h"
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/*!
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* @addtogroup lpc_dac
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* @{
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*/
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/*! @file */
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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/*! @brief DAC driver version 2.0.2. */
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#define LPC_DAC_DRIVER_VERSION (MAKE_VERSION(2, 0, 2))
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/*@}*/
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/*!
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* @brief The DAC settling time.
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*/
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typedef enum _dac_settling_time
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{
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kDAC_SettlingTimeIs1us = 0U, /*!< The settling time of the DAC is 1us max, and the maximum
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current is 700 mA. This allows a maximum update rate of 1 MHz. */
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kDAC_SettlingTimeIs25us = 1U, /*!< The settling time of the DAC is 2.5us and the maximum current
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is 350uA. This allows a maximum update rate of 400 kHz. */
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} dac_settling_time_t;
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/*!
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* @brief The configuration of DAC.
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*/
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typedef struct _dac_config
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{
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dac_settling_time_t settlingTime; /*!< The settling times are valid for a capacitance load on the DAC_OUT pin not
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exceeding 100 pF. A load impedance value greater than that value will cause
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settling time longer than the specified time. One or more graphs of load
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impedance vs. settling time will be included in the final data sheet. */
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} dac_config_t;
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*******************************************************************************
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* API
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******************************************************************************/
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/*!
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* @brief Initialize the DAC module.
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*
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* @param base DAC peripheral base address.
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* @param config The pointer to configuration structure. Please refer to "dac_config_t" structure.
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*/
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void DAC_Init(DAC_Type *base, const dac_config_t *config);
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/*!
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* @brief De-Initialize the DAC module.
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*
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* @param base DAC peripheral base address.
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*/
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void DAC_Deinit(DAC_Type *base);
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/*!
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* @brief Initializes the DAC user configuration structure.
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*
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* This function initializes the user configuration structure to a default value. The default values are as follows.
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* @code
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* config->settlingTime = kDAC_SettlingTimeIs1us;
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* @endcode
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* @param config Pointer to the configuration structure. See "dac_config_t".
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*/
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void DAC_GetDefaultConfig(dac_config_t *config);
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/*!
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* @brief Enable/Diable double-buffering feature. Notice: Disabling the double-buffering feature will disable counter
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* opreation.
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* If double-buffering feature is disabled, any writes to the CR address will go directly to the CR register.
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* If double-buffering feature is enabled, any write to the CR register will only load the pre-buffer,
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* which shares its register address with the CR register. The CR itself will be loaded from the pre-buffer
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* whenever the counter reaches zero and the DMA request is set.
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*
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* @param base DAC peripheral base address.
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* @param enable Enable or disable the feature.
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*/
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void DAC_EnableDoubleBuffering(DAC_Type *base, bool enable);
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/*!
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* @brief Write DAC output value into CR register or pre-buffer. The DAC output voltage is VALUE*((VREFP)/1024).
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*
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* @param base DAC peripheral base address.
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* @param value Setting the value for items in the buffer. 10-bits are available.
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*/
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void DAC_SetBufferValue(DAC_Type *base, uint32_t value);
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/*!
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* @brief Write DAC counter value into CNTVAL register.
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* When the counter is enabled bit, the 16-bit counter will begin counting down, at the rate selected by PCLK,
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* from the value programmed into the DACCNTVAL register. The counter is decremented Each time the counter
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* reaches zero, the counter will be reloaded by the value of DACCNTVAL and the DMA request bit INT_DMA_REQ will be set
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* in hardware.
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*
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* @param base DAC peripheral basic address.
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* @param value Setting the value for items in the counter. 16-bits are available.
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*/
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void DAC_SetCounterValue(DAC_Type *base, uint32_t value);
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#if defined(FSL_FEATURE_DAC_HAS_CTRL_DMA_ENA) && FSL_FEATURE_DAC_HAS_CTRL_DMA_ENA
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/*!
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* @brief Enable/Disable the DMA access.
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*
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* @param base DAC peripheral base address.
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* @param enable Enable or disable the feature.
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*/
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static inline void DAC_EnableDMA(DAC_Type *base, bool enable)
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{
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if (enable)
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{
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base->CTRL |= DAC_CTRL_DMA_ENA_MASK;
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}
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else
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{
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base->CTRL &= ~DAC_CTRL_DMA_ENA_MASK;
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}
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}
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#endif /* FSL_FEATURE_DAC_HAS_CTRL_DMA_ENA */
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/*!
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* @brief Enable/Disable the counter operation.
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*
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* @param base DAC peripheral base address.
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* @param enable Enable or disable the feature.
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*/
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static inline void DAC_EnableCounter(DAC_Type *base, bool enable)
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{
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if (enable)
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{
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base->CTRL |= DAC_CTRL_CNT_ENA_MASK;
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}
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else
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{
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base->CTRL &= ~DAC_CTRL_CNT_ENA_MASK;
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}
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}
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/*!
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* @brief Get the status flag of DMA or interrupt request.
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*
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* @param base DAC peripheral base address.
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* @return If return 'true', it means DMA request or interrupt occurs.
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* If return 'false', it means DMA request or interrupt doesn't occur.
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*/
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static inline bool DAC_GetDMAInterruptRequestFlag(DAC_Type *base)
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{
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#if defined(FSL_FEATURE_DAC_HAS_CTRL_DMA_ENA) && FSL_FEATURE_DAC_HAS_CTRL_DMA_ENA
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if (0U != (DAC_CTRL_INT_DMA_REQ_MASK & base->CTRL))
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#else
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if (0U != (DAC_CTRL_INT_CPU_REQ_MASK & base->CTRL))
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#endif /* FSL_FEATURE_DAC_HAS_CTRL_DMA_ENA */
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{
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return true;
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}
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else
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{
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return false;
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}
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}
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#if defined(__cplusplus)
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}
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#endif
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/* @} */
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#endif /* __FSL_DAC_H__ */
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