182 lines
6.6 KiB
C
182 lines
6.6 KiB
C
/*
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** ###################################################################
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** Processors: LPC845M301JBD48
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** LPC845M301JBD64
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** LPC845M301JHI33
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** LPC845M301JHI48
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**
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** Compilers: GNU C Compiler
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** IAR ANSI C/C++ Compiler for ARM
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** Keil ARM C/C++ Compiler
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** MCUXpresso Compiler
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**
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** Reference manual: LPC84x User manual Rev.1.6 8 Dec 2017
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** Version: rev. 1.2, 2017-06-08
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** Build: b210815
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**
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** Abstract:
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** Provides a system configuration function and a global variable that
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** contains the system frequency. It configures the device and initializes
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** the oscillator (PLL) that is part of the microcontroller device.
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**
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** Copyright 2016 Freescale Semiconductor, Inc.
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** Copyright 2016-2021 NXP
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** All rights reserved.
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**
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** SPDX-License-Identifier: BSD-3-Clause
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**
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** http: www.nxp.com
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** mail: support@nxp.com
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**
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** Revisions:
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** - rev. 1.0 (2016-08-12)
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** Initial version.
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** - rev. 1.1 (2016-11-25)
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** Update CANFD and Classic CAN register.
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** Add MAC TIMERSTAMP registers.
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** - rev. 1.2 (2017-06-08)
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** Remove RTC_CTRL_RTC_OSC_BYPASS.
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** SYSCON_ARMTRCLKDIV rename to SYSCON_ARMTRACECLKDIV.
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** Remove RESET and HALT from SYSCON_AHBCLKDIV.
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**
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** ###################################################################
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*/
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/*!
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* @file LPC845
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* @version 1.2
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* @date 2017-06-08
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* @brief Device specific configuration file for LPC845 (implementation file)
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*
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* Provides a system configuration function and a global variable that contains
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* the system frequency. It configures the device and initializes the oscillator
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* (PLL) that is part of the microcontroller device.
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*/
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#include <stdint.h>
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#include "fsl_device_registers.h"
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/* ----------------------------------------------------------------------------
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-- Core clock
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---------------------------------------------------------------------------- */
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uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
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/* ----------------------------------------------------------------------------
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-- SystemInit()
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---------------------------------------------------------------------------- */
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void SystemInit (void) {
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#if defined(__MCUXPRESSO)
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extern void(*const g_pfnVectors[]) (void);
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SCB->VTOR = (uint32_t) &g_pfnVectors;
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#else
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extern void *__Vectors;
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SCB->VTOR = (uint32_t) &__Vectors;
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#endif
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FLASH_CTRL->FLASHCFG &= ~FLASH_CTRL_FLASHCFG_FLASHTIM_MASK; /* set 1 system clock flash access time. */
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SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
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SystemInitHook();
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}
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/* ----------------------------------------------------------------------------
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-- SystemCoreClockUpdate()
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---------------------------------------------------------------------------- */
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void SystemCoreClockUpdate (void) {
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uint32_t wdt_osc = 0U;
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uint32_t fro_osc = 0U;
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/* Determine clock frequency according to clock register values */
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switch ((SYSCON->FROOSCCTRL ) & 0x03U) {
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case 0U: fro_osc = 18000000U; break;
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case 1U: fro_osc = 24000000U; break;
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case 2U: fro_osc = 30000000U; break;
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case 3U: fro_osc = 30000000U; break;
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default: fro_osc = 0U; break;
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}
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if (((SYSCON->FROOSCCTRL >> SYSCON_FROOSCCTRL_FRO_DIRECT_SHIFT) & 0x01U) == 0U) {
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fro_osc = fro_osc >> 1U;
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}
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switch ((SYSCON->WDTOSCCTRL >> SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) & 0x0FU) {
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case 0U: wdt_osc = 0U; break;
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case 1U: wdt_osc = 600000U; break;
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case 2U: wdt_osc = 1050000U; break;
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case 3U: wdt_osc = 1400000U; break;
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case 4U: wdt_osc = 1750000U; break;
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case 5U: wdt_osc = 2100000U; break;
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case 6U: wdt_osc = 2400000U; break;
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case 7U: wdt_osc = 2700000U; break;
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case 8U: wdt_osc = 3000000U; break;
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case 9U: wdt_osc = 3250000U; break;
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case 10U: wdt_osc = 3500000U; break;
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case 11U: wdt_osc = 3750000U; break;
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case 12U: wdt_osc = 4000000U; break;
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case 13U: wdt_osc = 4200000U; break;
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case 14U: wdt_osc = 4400000U; break;
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case 15U: wdt_osc = 4600000U; break;
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default: wdt_osc = 0U; break;
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}
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wdt_osc /= (((SYSCON->WDTOSCCTRL & SYSCON_WDTOSCCTRL_DIVSEL_MASK) + 1U) << 1U);
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switch (SYSCON->MAINCLKPLLSEL & 0x01U) {
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case 0U: /* main_clk_pre_pll */
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switch (SYSCON->MAINCLKSEL & SYSCON_MAINCLKSEL_SEL_MASK) {
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case 0U: /* Free running oscillator (FRO) */
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SystemCoreClock = fro_osc;
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break;
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case 1U: /* System oscillator */
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SystemCoreClock = CLK_OSC_IN;
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break;
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case 2U: /* watchdog oscillator */
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SystemCoreClock = wdt_osc;
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break;
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case 3U: /* Free running oscillator (FRO) / 2 */
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SystemCoreClock = (fro_osc >> 1U);
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break;
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default:
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SystemCoreClock = 0U;
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break;
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}
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break;
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case 1U: /* System PLL Clock Out */
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switch (SYSCON->SYSPLLCLKSEL & SYSCON_SYSPLLCLKSEL_SEL_MASK) {
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case 0U: /* Free running oscillator (FRO) */
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SystemCoreClock = fro_osc * ((SYSCON->SYSPLLCTRL & SYSCON_SYSPLLCTRL_MSEL_MASK) + 1U);
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break;
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case 1U: /* System oscillator */
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SystemCoreClock = CLK_OSC_IN * ((SYSCON->SYSPLLCTRL & SYSCON_SYSPLLCTRL_MSEL_MASK) + 1U);
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break;
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case 2U: /* watchdog oscillator */
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SystemCoreClock = wdt_osc * ((SYSCON->SYSPLLCTRL & SYSCON_SYSPLLCTRL_MSEL_MASK) + 1U);
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break;
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case 3U: /* Free running oscillator (FRO) / 2 */
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SystemCoreClock = (fro_osc >> 1U) * ((SYSCON->SYSPLLCTRL & SYSCON_SYSPLLCTRL_MSEL_MASK) + 1U);
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break;
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default:
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SystemCoreClock = 0U;
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break;
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}
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break;
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default:
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SystemCoreClock = 0U;
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break;
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}
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SystemCoreClock /= SYSCON->SYSAHBCLKDIV;
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}
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/* ----------------------------------------------------------------------------
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-- SystemInitHook()
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---------------------------------------------------------------------------- */
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__attribute__ ((weak)) void SystemInitHook (void) {
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/* Void implementation of the weak function. */
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}
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