496 lines
18 KiB
C
496 lines
18 KiB
C
/* ----------------------------------------------------------------------
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* Project: CMSIS DSP Library
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* Title: arm_biquad_cascade_df1_f32.c
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* Description: Processing function for the floating-point Biquad cascade DirectFormI(DF1) filter
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*
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* $Date: 18. March 2019
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* $Revision: V1.6.0
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*
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* Target Processor: Cortex-M cores
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* -------------------------------------------------------------------- */
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/*
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* Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "arm_math.h"
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/**
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@ingroup groupFilters
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*/
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/**
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@defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I Structure
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This set of functions implements arbitrary order recursive (IIR) filters.
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The filters are implemented as a cascade of second order Biquad sections.
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The functions support Q15, Q31 and floating-point data types.
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Fast version of Q15 and Q31 also available.
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The functions operate on blocks of input and output data and each call to the function
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processes <code>blockSize</code> samples through the filter.
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<code>pSrc</code> points to the array of input data and
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<code>pDst</code> points to the array of output data.
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Both arrays contain <code>blockSize</code> values.
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@par Algorithm
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Each Biquad stage implements a second order filter using the difference equation:
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<pre>
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y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
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</pre>
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A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
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\image html Biquad.gif "Single Biquad filter stage"
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Coefficients <code>b0, b1 and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
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Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
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Pay careful attention to the sign of the feedback coefficients.
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Some design tools use the difference equation
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<pre>
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y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
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</pre>
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In this case the feedback coefficients <code>a1</code> and <code>a2</code>
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must be negated when used with the CMSIS DSP Library.
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@par
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Higher order filters are realized as a cascade of second order sections.
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<code>numStages</code> refers to the number of second order stages used.
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For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
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\image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
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A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
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@par
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The <code>pState</code> points to state variables array.
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Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
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The state variables are arranged in the <code>pState</code> array as:
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<pre>
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{x[n-1], x[n-2], y[n-1], y[n-2]}
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</pre>
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@par
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The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
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The state array has a total length of <code>4*numStages</code> values.
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The state variables are updated after each block of data is processed, the coefficients are untouched.
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@par Instance Structure
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The coefficients and state variables for a filter are stored together in an instance data structure.
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A separate instance structure must be defined for each filter.
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Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
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There are separate instance structure declarations for each of the 3 supported data types.
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@par Init Function
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There is also an associated initialization function for each data type.
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The initialization function performs following operations:
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- Sets the values of the internal structure fields.
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- Zeros out the values in the state buffer.
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To do this manually without calling the init function, assign the follow subfields of the instance structure:
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numStages, pCoeffs, pState. Also set all of the values in pState to zero.
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@par
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Use of the initialization function is optional.
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However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
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To place an instance structure into a const data section, the instance structure must be manually initialized.
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Set the values in the state buffer to zeros before static initialization.
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The code below statically initializes each of the 3 different data type filter instance structures
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<pre>
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arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};
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arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};
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arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};
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</pre>
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where <code>numStages</code> is the number of Biquad stages in the filter;
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<code>pState</code> is the address of the state buffer;
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<code>pCoeffs</code> is the address of the coefficient buffer;
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<code>postShift</code> shift to be applied.
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@par Fixed-Point Behavior
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Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions.
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Following issues must be considered:
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- Scaling of coefficients
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- Filter gain
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- Overflow and saturation
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@par Scaling of coefficients
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Filter coefficients are represented as fractional values and
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coefficients are restricted to lie in the range <code>[-1 +1)</code>.
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The fixed-point functions have an additional scaling parameter <code>postShift</code>
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which allow the filter coefficients to exceed the range <code>[+1 -1)</code>.
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At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
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\image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
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This essentially scales the filter coefficients by <code>2^postShift</code>.
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For example, to realize the coefficients
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<pre>
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{1.5, -0.8, 1.2, 1.6, -0.9}
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</pre>
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set the pCoeffs array to:
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<pre>
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{0.75, -0.4, 0.6, 0.8, -0.45}
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</pre>
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and set <code>postShift=1</code>
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@par Filter gain
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The frequency response of a Biquad filter is a function of its coefficients.
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It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.
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This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.
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To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
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@par Overflow and saturation
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For Q15 and Q31 versions, it is described separately as part of the function specific documentation below.
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*/
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/**
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@addtogroup BiquadCascadeDF1
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@{
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*/
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/**
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@brief Processing function for the floating-point Biquad cascade filter.
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@param[in] S points to an instance of the floating-point Biquad cascade structure
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@param[in] pSrc points to the block of input data
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@param[out] pDst points to the block of output data
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@param[in] blockSize number of samples to process
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@return none
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*/
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#if defined(ARM_MATH_NEON)
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void arm_biquad_cascade_df1_f32(
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const arm_biquad_casd_df1_inst_f32 * S,
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const float32_t * pSrc,
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float32_t * pDst,
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uint32_t blockSize)
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{
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const float32_t *pIn = pSrc; /* source pointer */
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float32_t *pOut = pDst; /* destination pointer */
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float32_t *pState = S->pState; /* pState pointer */
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const float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */
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float32_t acc; /* Simulates the accumulator */
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uint32_t sample, stage = S->numStages; /* loop counters */
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float32x4_t Xn;
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float32x2_t Yn;
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float32x2_t a;
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float32x4_t b;
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float32x4_t x,tmp;
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float32x2_t t;
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float32x2x2_t y;
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float32_t Xns;
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while (stage > 0U)
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{
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/* Reading the coefficients */
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Xn = vld1q_f32(pState);
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Yn = vld1_f32(pState + 2);
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b = vld1q_f32(pCoeffs);
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b = vrev64q_f32(b);
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b = vcombine_f32(vget_high_f32(b), vget_low_f32(b));
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a = vld1_f32(pCoeffs + 3);
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a = vrev64_f32(a);
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b[0] = 0.0;
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pCoeffs += 5;
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/* Reading the pState values */
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/* Apply loop unrolling and compute 4 output values simultaneously. */
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/* The variable acc hold output values that are being computed:
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*
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* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
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* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
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* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
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* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
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*/
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/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
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** a second loop below computes the remaining 1 to 3 samples. */
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sample = blockSize >> 2U;
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while (sample > 0U)
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{
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/* Read the first 4 inputs */
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x = vld1q_f32(pIn);
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pIn += 4;
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tmp = vextq_f32(Xn, x, 1);
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t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp));
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t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp));
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t = vmla_f32(t, a, Yn);
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t = vpadd_f32(t, t);
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Yn = vext_f32(Yn, t, 1);
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tmp = vextq_f32(Xn, x, 2);
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t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp));
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t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp));
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t = vmla_f32(t, a, Yn);
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t = vpadd_f32(t, t);
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Yn = vext_f32(Yn, t, 1);
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y.val[0] = Yn;
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tmp = vextq_f32(Xn, x, 3);
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t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp));
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t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp));
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t = vmla_f32(t, a, Yn);
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t = vpadd_f32(t, t);
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Yn = vext_f32(Yn, t, 1);
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Xn = x;
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t = vmul_f32(vget_high_f32(b), vget_high_f32(Xn));
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t = vmla_f32(t, vget_low_f32(b), vget_low_f32(Xn));
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t = vmla_f32(t, a, Yn);
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t = vpadd_f32(t, t);
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Yn = vext_f32(Yn, t, 1);
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y.val[1] = Yn;
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tmp = vcombine_f32(y.val[0], y.val[1]);
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/* Store the 4 outputs and increment the pointer */
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vst1q_f32(pOut, tmp);
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pOut += 4;
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/* Decrement the loop counter */
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sample--;
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}
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/* If the block size is not a multiple of 4, compute any remaining output samples here.
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** No loop unrolling is used. */
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sample = blockSize & 0x3U;
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while (sample > 0U)
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{
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/* Read the input */
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Xns = *pIn++;
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/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
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acc = (b[1] * Xn[2]) + (b[2] * Xn[3]) + (b[3] * Xns) + (a[0] * Yn[0]) + (a[1] * Yn[1]);
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/* Store the result in the accumulator in the destination buffer. */
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*pOut++ = acc;
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/* Every time after the output is computed state should be updated. */
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/* The states should be updated as: */
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/* Xn2 = Xn1 */
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/* Xn1 = Xn */
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/* Yn2 = Yn1 */
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/* Yn1 = acc */
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Xn[2] = Xn[3];
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Xn[3] = Xns;
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Yn[0] = Yn[1];
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Yn[1] = acc;
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/* Decrement the loop counter */
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sample--;
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}
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vst1q_f32(pState,vcombine_f32(vrev64_f32(vget_high_f32(Xn)),vrev64_f32(Yn)));
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pState += 4;
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/* Store the updated state variables back into the pState array */
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/* The first stage goes from the input buffer to the output buffer. */
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/* Subsequent numStages occur in-place in the output buffer */
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pIn = pDst;
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/* Reset the output pointer */
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pOut = pDst;
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/* Decrement the loop counter */
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stage--;
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}
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}
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#else
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void arm_biquad_cascade_df1_f32(
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const arm_biquad_casd_df1_inst_f32 * S,
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const float32_t * pSrc,
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float32_t * pDst,
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uint32_t blockSize)
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{
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const float32_t *pIn = pSrc; /* Source pointer */
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float32_t *pOut = pDst; /* Destination pointer */
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float32_t *pState = S->pState; /* pState pointer */
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const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
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float32_t acc; /* Accumulator */
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float32_t b0, b1, b2, a1, a2; /* Filter coefficients */
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float32_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */
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float32_t Xn; /* Temporary input */
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uint32_t sample, stage = S->numStages; /* Loop counters */
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do
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{
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/* Reading the coefficients */
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b0 = *pCoeffs++;
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b1 = *pCoeffs++;
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b2 = *pCoeffs++;
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a1 = *pCoeffs++;
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a2 = *pCoeffs++;
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/* Reading the pState values */
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Xn1 = pState[0];
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Xn2 = pState[1];
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Yn1 = pState[2];
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Yn2 = pState[3];
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#if defined (ARM_MATH_LOOPUNROLL)
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/* Apply loop unrolling and compute 4 output values simultaneously. */
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/* Variable acc hold output values that are being computed:
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*
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* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
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* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
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* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
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* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
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*/
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/* Loop unrolling: Compute 4 outputs at a time */
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sample = blockSize >> 2U;
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while (sample > 0U)
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{
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/* Read the first input */
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Xn = *pIn++;
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/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
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Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
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/* Store output in destination buffer. */
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*pOut++ = Yn2;
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/* Every time after the output is computed state should be updated. */
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/* The states should be updated as: */
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/* Xn2 = Xn1 */
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/* Xn1 = Xn */
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/* Yn2 = Yn1 */
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/* Yn1 = acc */
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/* Read the second input */
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Xn2 = *pIn++;
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/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
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Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1);
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/* Store output in destination buffer. */
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*pOut++ = Yn1;
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/* Every time after the output is computed state should be updated. */
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/* The states should be updated as: */
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/* Xn2 = Xn1 */
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/* Xn1 = Xn */
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/* Yn2 = Yn1 */
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/* Yn1 = acc */
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/* Read the third input */
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Xn1 = *pIn++;
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/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
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Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2);
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/* Store output in destination buffer. */
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*pOut++ = Yn2;
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/* Every time after the output is computed state should be updated. */
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/* The states should be updated as: */
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/* Xn2 = Xn1 */
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/* Xn1 = Xn */
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/* Yn2 = Yn1 */
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/* Yn1 = acc */
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/* Read the forth input */
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Xn = *pIn++;
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/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
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Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1);
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/* Store output in destination buffer. */
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*pOut++ = Yn1;
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/* Every time after the output is computed state should be updated. */
|
|
/* The states should be updated as: */
|
|
/* Xn2 = Xn1 */
|
|
/* Xn1 = Xn */
|
|
/* Yn2 = Yn1 */
|
|
/* Yn1 = acc */
|
|
Xn2 = Xn1;
|
|
Xn1 = Xn;
|
|
|
|
/* decrement loop counter */
|
|
sample--;
|
|
}
|
|
|
|
/* Loop unrolling: Compute remaining outputs */
|
|
sample = blockSize & 0x3U;
|
|
|
|
#else
|
|
|
|
/* Initialize blkCnt with number of samples */
|
|
sample = blockSize;
|
|
|
|
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
|
|
|
while (sample > 0U)
|
|
{
|
|
/* Read the input */
|
|
Xn = *pIn++;
|
|
|
|
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
|
|
acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
|
|
|
|
/* Store output in destination buffer. */
|
|
*pOut++ = acc;
|
|
|
|
/* Every time after the output is computed state should be updated. */
|
|
/* The states should be updated as: */
|
|
/* Xn2 = Xn1 */
|
|
/* Xn1 = Xn */
|
|
/* Yn2 = Yn1 */
|
|
/* Yn1 = acc */
|
|
Xn2 = Xn1;
|
|
Xn1 = Xn;
|
|
Yn2 = Yn1;
|
|
Yn1 = acc;
|
|
|
|
/* decrement loop counter */
|
|
sample--;
|
|
}
|
|
|
|
/* Store the updated state variables back into the pState array */
|
|
*pState++ = Xn1;
|
|
*pState++ = Xn2;
|
|
*pState++ = Yn1;
|
|
*pState++ = Yn2;
|
|
|
|
/* The first stage goes from the input buffer to the output buffer. */
|
|
/* Subsequent numStages occur in-place in the output buffer */
|
|
pIn = pDst;
|
|
|
|
/* Reset output pointer */
|
|
pOut = pDst;
|
|
|
|
/* decrement loop counter */
|
|
stage--;
|
|
|
|
} while (stage > 0U);
|
|
|
|
}
|
|
|
|
#endif /* #if defined(ARM_MATH_NEON) */
|
|
/**
|
|
@} end of BiquadCascadeDF1 group
|
|
*/
|