139 lines
9.3 KiB
C
139 lines
9.3 KiB
C
/*
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* Copyright 2018, 2021, 2023 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/***********************************************************************************************************************
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* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
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* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
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**********************************************************************************************************************/
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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!!GlobalInfo
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product: Pins v12.0
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processor: MIMXRT1021xxxxx
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package_id: MIMXRT1021DAG5A
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mcu_data: ksdk2_0
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processor_version: 0.12.10
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pin_labels:
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- {pin_num: '107', pin_signal: GPIO_AD_B0_04, label: PHY_RESET, identifier: PHY_RESET}
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- {pin_num: '84', pin_signal: GPIO_AD_B1_06, label: PHY_INTR, identifier: PHY_INTR}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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#include "fsl_common.h"
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#include "fsl_iomuxc.h"
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#include "fsl_gpio.h"
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#include "pin_mux.h"
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/* FUNCTION ************************************************************************************************************
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*
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* Function Name : BOARD_InitBootPins
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* Description : Calls initialization functions.
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*
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* END ****************************************************************************************************************/
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void BOARD_InitBootPins(void) {
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BOARD_InitPins();
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}
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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BOARD_InitPins:
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- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
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- pin_list:
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- {pin_num: '101', peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_07, slew_rate: Slow, software_input_on: Disable, open_drain: Disable, speed: MHZ_100,
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drive_strength: R0_6, pull_keeper_select: Keeper, pull_keeper_enable: Enable, pull_up_down_config: Pull_Down_100K_Ohm, hysteresis_enable: Disable}
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- {pin_num: '105', peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_06, slew_rate: Slow, software_input_on: Disable, open_drain: Disable, speed: MHZ_100,
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drive_strength: R0_6, pull_keeper_select: Keeper, pull_keeper_enable: Enable, pull_up_down_config: Pull_Down_100K_Ohm, hysteresis_enable: Disable}
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- {pin_num: '98', peripheral: ENET, signal: 'enet_rx_data, 0', pin_signal: GPIO_AD_B0_10, slew_rate: Fast, software_input_on: Disable, open_drain: Disable, speed: MHZ_200,
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drive_strength: R0_5, pull_keeper_select: Pull, pull_keeper_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, hysteresis_enable: Disable}
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- {pin_num: '99', peripheral: ENET, signal: 'enet_rx_data, 1', pin_signal: GPIO_AD_B0_09, slew_rate: Fast, software_input_on: Disable, open_drain: Disable, speed: MHZ_200,
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drive_strength: R0_5, pull_keeper_select: Pull, pull_keeper_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, hysteresis_enable: Disable}
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- {pin_num: '97', peripheral: ENET, signal: enet_rx_en, pin_signal: GPIO_AD_B0_11, slew_rate: Fast, software_input_on: Disable, open_drain: Disable, speed: MHZ_200,
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drive_strength: R0_5, pull_keeper_select: Pull, pull_keeper_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, hysteresis_enable: Disable}
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- {pin_num: '94', peripheral: ENET, signal: 'enet_tx_data, 0', pin_signal: GPIO_AD_B0_14, slew_rate: Fast, software_input_on: Disable, open_drain: Disable, speed: MHZ_200,
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drive_strength: R0_5, pull_keeper_select: Pull, pull_keeper_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, hysteresis_enable: Disable}
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- {pin_num: '93', peripheral: ENET, signal: 'enet_tx_data, 1', pin_signal: GPIO_AD_B0_15, slew_rate: Fast, software_input_on: Disable, open_drain: Disable, speed: MHZ_200,
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drive_strength: R0_5, pull_keeper_select: Pull, pull_keeper_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, hysteresis_enable: Disable}
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- {pin_num: '95', peripheral: ENET, signal: enet_tx_en, pin_signal: GPIO_AD_B0_13, slew_rate: Fast, software_input_on: Disable, open_drain: Disable, speed: MHZ_200,
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drive_strength: R0_5, pull_keeper_select: Pull, pull_keeper_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, hysteresis_enable: Disable}
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- {pin_num: '100', peripheral: ENET, signal: enet_ref_clk, pin_signal: GPIO_AD_B0_08, slew_rate: Fast, software_input_on: Enable, open_drain: Disable, speed: MHZ_200,
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drive_strength: R0_5, pull_keeper_select: Pull, pull_keeper_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, hysteresis_enable: Disable}
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- {pin_num: '96', peripheral: ENET, signal: enet_rx_er, pin_signal: GPIO_AD_B0_12, slew_rate: Fast, software_input_on: Disable, open_drain: Disable, speed: MHZ_200,
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drive_strength: R0_5, pull_keeper_select: Pull, pull_keeper_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, hysteresis_enable: Disable}
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- {pin_num: '116', peripheral: ENET, signal: enet_mdio, pin_signal: GPIO_EMC_40, slew_rate: Fast, software_input_on: Disable, open_drain: Disable, speed: MHZ_200,
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drive_strength: R0_5, pull_keeper_select: Pull, pull_keeper_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, hysteresis_enable: Disable}
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- {pin_num: '115', peripheral: ENET, signal: enet_mdc, pin_signal: GPIO_EMC_41, slew_rate: Fast, software_input_on: Disable, open_drain: Disable, speed: MHZ_200,
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drive_strength: R0_5, pull_keeper_select: Pull, pull_keeper_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, hysteresis_enable: Disable}
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- {pin_num: '107', peripheral: GPIO1, signal: 'gpio_io, 04', pin_signal: GPIO_AD_B0_04, direction: OUTPUT, gpio_init_state: 'true', slew_rate: Fast, software_input_on: Disable,
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open_drain: Disable, speed: MHZ_100, drive_strength: R0_5, pull_keeper_select: Pull, pull_keeper_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, hysteresis_enable: Disable}
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- {pin_num: '84', peripheral: GPIO1, signal: 'gpio_io, 22', pin_signal: GPIO_AD_B1_06, direction: INPUT, gpio_interrupt: kGPIO_IntLowLevel, slew_rate: Fast, software_input_on: Disable,
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open_drain: Disable, speed: MHZ_100, drive_strength: R0_5, pull_keeper_select: Pull, pull_keeper_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, hysteresis_enable: Disable}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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/* FUNCTION ************************************************************************************************************
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*
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* Function Name : BOARD_InitPins
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* Description : Configures pin routing and optionally pin electrical features.
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*
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* END ****************************************************************************************************************/
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void BOARD_InitPins(void) {
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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/* GPIO configuration of PHY_RESET on GPIO_AD_B0_04 (pin 107) */
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gpio_pin_config_t PHY_RESET_config = {
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.direction = kGPIO_DigitalOutput,
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.outputLogic = 1U,
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.interruptMode = kGPIO_NoIntmode
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};
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/* Initialize GPIO functionality on GPIO_AD_B0_04 (pin 107) */
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GPIO_PinInit(GPIO1, 4U, &PHY_RESET_config);
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/* GPIO configuration of PHY_INTR on GPIO_AD_B1_06 (pin 84) */
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gpio_pin_config_t PHY_INTR_config = {
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.direction = kGPIO_DigitalInput,
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.outputLogic = 0U,
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.interruptMode = kGPIO_IntLowLevel
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};
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/* Initialize GPIO functionality on GPIO_AD_B1_06 (pin 84) */
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GPIO_PinInit(GPIO1, 22U, &PHY_INTR_config);
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/* Enable GPIO pin interrupt on GPIO_AD_B1_06 (pin 84) */
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GPIO_PortEnableInterrupts(GPIO1, 1U << 22U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_04_GPIO1_IO04, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_08_ENET_REF_CLK1, 1U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_ENET_RDATA01, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_ENET_RDATA00, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_11_ENET_RX_EN, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_ENET_RX_ER, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_ENET_TX_EN, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_14_ENET_TDATA00, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_15_ENET_TDATA01, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_GPIO1_IO22, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_40_ENET_MDIO, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_41_ENET_MDC, 0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_04_GPIO1_IO04, 0xB0A9U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_08_ENET_REF_CLK1, 0xB0E9U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_09_ENET_RDATA01, 0xB0E9U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_10_ENET_RDATA00, 0xB0E9U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_11_ENET_RX_EN, 0xB0E9U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_ENET_RX_ER, 0xB0E9U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_ENET_TX_EN, 0xB0E9U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_14_ENET_TDATA00, 0xB0E9U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_15_ENET_TDATA01, 0xB0E9U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_06_GPIO1_IO22, 0xB0A9U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_40_ENET_MDIO, 0xB0E9U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_41_ENET_MDC, 0xB0E9U);
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}
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/***********************************************************************************************************************
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* EOF
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**********************************************************************************************************************/
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