183 lines
9.3 KiB
C
183 lines
9.3 KiB
C
/*
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* Copyright 2019-2020 ,2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/***********************************************************************************************************************
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* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
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* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
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**********************************************************************************************************************/
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#ifndef _PIN_MUX_H_
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#define _PIN_MUX_H_
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/***********************************************************************************************************************
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* Definitions
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**********************************************************************************************************************/
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/*! @brief Direction type */
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typedef enum _pin_mux_direction
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{
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kPIN_MUX_DirectionInput = 0U, /* Input direction */
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kPIN_MUX_DirectionOutput = 1U, /* Output direction */
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kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */
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} pin_mux_direction_t;
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/*!
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* @addtogroup pin_mux
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* @{
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*/
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/***********************************************************************************************************************
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* API
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**********************************************************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @brief Calls initialization functions.
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*
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*/
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void BOARD_InitBootPins(void);
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/* GPIO_AD_B0_07 (number 101), UART1_RXD/J17[4] */
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/* Routed pin properties */
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#define BOARD_UART1_RXD_PERIPHERAL LPUART1 /*!< Peripheral name */
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#define BOARD_UART1_RXD_SIGNAL RX /*!< Signal name */
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/* GPIO_AD_B0_06 (number 105), UART1_TXD/J17[6] */
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/* Routed pin properties */
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#define BOARD_UART1_TXD_PERIPHERAL LPUART1 /*!< Peripheral name */
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#define BOARD_UART1_TXD_SIGNAL TX /*!< Signal name */
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/* GPIO_AD_B1_00 (number 92), SAI1_MCLK */
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/* Routed pin properties */
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#define BOARD_SAI1_MCLK_PERIPHERAL SAI1 /*!< Peripheral name */
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#define BOARD_SAI1_MCLK_SIGNAL sai_mclk /*!< Signal name */
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/* GPIO_AD_B1_01 (number 91), SAI1_TX_BCLK */
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/* Routed pin properties */
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#define BOARD_SAI1_TX_BCLK_PERIPHERAL SAI1 /*!< Peripheral name */
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#define BOARD_SAI1_TX_BCLK_SIGNAL sai_tx_bclk /*!< Signal name */
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/* GPIO_AD_B1_02 (number 90), SAI1_TX_SYNC/J19[10] */
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/* Routed pin properties */
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#define BOARD_SAI1_TX_SYNC_PERIPHERAL SAI1 /*!< Peripheral name */
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#define BOARD_SAI1_TX_SYNC_SIGNAL sai_tx_sync /*!< Signal name */
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/* GPIO_AD_B1_03 (number 89), SAI1_TXD/J19[9] */
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/* Routed pin properties */
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#define BOARD_SAI1_TXD_PERIPHERAL SAI1 /*!< Peripheral name */
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#define BOARD_SAI1_TXD_SIGNAL sai_tx_data0 /*!< Signal name */
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/* GPIO_AD_B1_05 (number 87), SAI1_RXD */
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/* Routed pin properties */
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#define BOARD_SAI1_RXD_PERIPHERAL SAI1 /*!< Peripheral name */
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#define BOARD_SAI1_RXD_SIGNAL sai_rx_data0 /*!< Signal name */
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/* GPIO_AD_B1_14 (number 75), I2C1_SCL/U10[17]/J18[6] */
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/* Routed pin properties */
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#define BOARD_I2C1_SCL_PERIPHERAL LPI2C1 /*!< Peripheral name */
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#define BOARD_I2C1_SCL_SIGNAL SCL /*!< Signal name */
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/* GPIO_AD_B1_15 (number 74), I2C1_SDA/U10[18]/J18[5] */
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/* Routed pin properties */
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#define BOARD_I2C1_SDA_PERIPHERAL LPI2C1 /*!< Peripheral name */
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#define BOARD_I2C1_SDA_SIGNAL SDA /*!< Signal name */
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/* GPIO_SD_B1_04 (number 27), INT1_COMBO */
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/* Routed pin properties */
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#define BOARD_INT1_COMBO_PERIPHERAL GPIO3 /*!< Peripheral name */
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#define BOARD_INT1_COMBO_SIGNAL gpio_io /*!< Signal name */
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#define BOARD_INT1_COMBO_CHANNEL 24U /*!< Signal channel */
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/* Symbols to be used with GPIO driver */
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#define BOARD_INT1_COMBO_GPIO GPIO3 /*!< GPIO peripheral base pointer */
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#define BOARD_INT1_COMBO_GPIO_PIN 24U /*!< GPIO pin number */
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#define BOARD_INT1_COMBO_GPIO_PIN_MASK (1U << 24U) /*!< GPIO pin mask */
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#define BOARD_INT1_COMBO_PORT GPIO3 /*!< PORT peripheral base pointer */
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#define BOARD_INT1_COMBO_PIN 24U /*!< PORT pin number */
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#define BOARD_INT1_COMBO_PIN_MASK (1U << 24U) /*!< PORT pin mask */
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/* GPIO_SD_B0_06 (number 41), SD_CD_SW/J15[9] */
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/* Routed pin properties */
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#define BOARD_SD_CD_SW_PERIPHERAL GPIO3 /*!< Peripheral name */
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#define BOARD_SD_CD_SW_SIGNAL gpio_io /*!< Signal name */
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#define BOARD_SD_CD_SW_CHANNEL 19U /*!< Signal channel */
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/* Symbols to be used with GPIO driver */
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#define BOARD_SD_CD_SW_GPIO GPIO3 /*!< GPIO peripheral base pointer */
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#define BOARD_SD_CD_SW_GPIO_PIN 19U /*!< GPIO pin number */
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#define BOARD_SD_CD_SW_GPIO_PIN_MASK (1U << 19U) /*!< GPIO pin mask */
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#define BOARD_SD_CD_SW_PORT GPIO3 /*!< PORT peripheral base pointer */
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#define BOARD_SD_CD_SW_PIN 19U /*!< PORT pin number */
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#define BOARD_SD_CD_SW_PIN_MASK (1U << 19U) /*!< PORT pin mask */
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/* GPIO_AD_B1_07 (number 83), SD0_VSELECT/J19[1] */
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/* Routed pin properties */
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#define BOARD_SD0_VSELECT_PERIPHERAL USDHC1 /*!< Peripheral name */
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#define BOARD_SD0_VSELECT_SIGNAL usdhc_vselect /*!< Signal name */
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/* GPIO_SD_B0_02 (number 46), SD1_CMD/J15[3] */
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/* Routed pin properties */
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#define BOARD_SD1_CMD_PERIPHERAL USDHC1 /*!< Peripheral name */
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#define BOARD_SD1_CMD_SIGNAL usdhc_cmd /*!< Signal name */
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/* GPIO_SD_B0_03 (number 45), SD1_CLK/J15[5] */
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/* Routed pin properties */
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#define BOARD_SD1_CLK_PERIPHERAL USDHC1 /*!< Peripheral name */
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#define BOARD_SD1_CLK_SIGNAL usdhc_clk /*!< Signal name */
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/* GPIO_SD_B0_04 (number 43), SD1_D0/J15[7] */
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/* Routed pin properties */
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#define BOARD_SD1_D0_PERIPHERAL USDHC1 /*!< Peripheral name */
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#define BOARD_SD1_D0_SIGNAL usdhc_data /*!< Signal name */
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#define BOARD_SD1_D0_CHANNEL 0U /*!< Signal channel */
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/* GPIO_SD_B0_05 (number 42), SD1_D1/J15[8] */
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/* Routed pin properties */
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#define BOARD_SD1_D1_PERIPHERAL USDHC1 /*!< Peripheral name */
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#define BOARD_SD1_D1_SIGNAL usdhc_data /*!< Signal name */
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#define BOARD_SD1_D1_CHANNEL 1U /*!< Signal channel */
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/* GPIO_SD_B0_00 (number 48), SD1_D2/J15[1] */
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/* Routed pin properties */
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#define BOARD_SD1_D2_PERIPHERAL USDHC1 /*!< Peripheral name */
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#define BOARD_SD1_D2_SIGNAL usdhc_data /*!< Signal name */
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#define BOARD_SD1_D2_CHANNEL 2U /*!< Signal channel */
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/* GPIO_SD_B0_01 (number 47), SD1_D3/J15[2] */
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/* Routed pin properties */
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#define BOARD_SD1_D3_PERIPHERAL USDHC1 /*!< Peripheral name */
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#define BOARD_SD1_D3_SIGNAL usdhc_data /*!< Signal name */
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#define BOARD_SD1_D3_CHANNEL 3U /*!< Signal channel */
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/* GPIO_AD_B0_11 (number 97), ENET_CRS_DV/U11[18]/J19[3] */
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/* Routed pin properties */
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#define BOARD_ENET_CRS_DV_PERIPHERAL ARM /*!< Peripheral name */
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#define BOARD_ENET_CRS_DV_SIGNAL arm_trace_swo /*!< Signal name */
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/*!
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* @brief Configures pin routing and optionally pin electrical features.
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*
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*/
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void BOARD_InitPins(void);
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#if defined(__cplusplus)
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}
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#endif
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/*!
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* @}
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*/
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#endif /* _PIN_MUX_H_ */
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/***********************************************************************************************************************
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* EOF
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**********************************************************************************************************************/
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