55 lines
1.7 KiB
C
55 lines
1.7 KiB
C
/*
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* Copyright 2022 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _RTE_DEVICE_H
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#define _RTE_DEVICE_H
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extern void LPSPI1_InitPins();
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extern void LPSPI1_DeinitPins();
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extern void LPI2C4_InitPins();
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extern void LPI2C4_DeinitPins();
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/* Driver name mapping. */
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/* User needs to provide the implementation of LPSPIX_GetFreq/LPSPIX_InitPins/LPSPIX_DeinitPins for the enabled LPSPI
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* instance. */
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#define RTE_SPI1 1
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#define RTE_SPI1_PIN_INIT LPSPI1_InitPins
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#define RTE_SPI1_PIN_DEINIT LPSPI1_DeinitPins
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#define RTE_SPI1_DMA_EN 1
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/* User needs to provide the implementation of LPI2CX_GetFreq/LPI2CX_InitPins/LPI2CX_DeinitPins for the enabled LPI2C
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* instance. */
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#define RTE_I2C4 1
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#define RTE_I2C4_PIN_INIT LPI2C4_InitPins
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#define RTE_I2C4_PIN_DEINIT LPI2C4_DeinitPins
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#define RTE_I2C4_DMA_EN 0
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/* SPI configuration. */
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#define SPI0_RX_FIFO_SIZE 8
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#define SPI0_TX_FIFO_SIZE 8
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#define SPI1_RX_FIFO_SIZE 8
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#define SPI1_TX_FIFO_SIZE 8
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#define RTE_SPI1_SSEL_NUM kSPI_Ssel0
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#define RTE_SPI1_DMA_TX_CH 11
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#define RTE_SPI1_DMA_TX_PERI_SEL (uint8_t) kDmaRequestMuxLPSPI1Tx
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#define RTE_SPI1_DMA_TX_DMAMUX_BASE DMAMUX
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#define RTE_SPI1_DMA_TX_DMA_BASE DMA0
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#define RTE_SPI1_DMA_RX_CH 10
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#define RTE_SPI1_DMA_RX_PERI_SEL (uint8_t) kDmaRequestMuxLPSPI1Rx
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#define RTE_SPI1_DMA_RX_DMAMUX_BASE DMAMUX
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#define RTE_SPI1_DMA_RX_DMA_BASE DMA0
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#define RTE_SPI1_PCS_TO_SCK_DELAY 0
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#define RTE_SPI1_SCK_TO_PCS_DELAY 0
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#define RTE_SPI1_BETWEEN_TRANSFER_DELAY 50 /* For 10MHz baudrate. delay(ns) = 10^9/baudrate/2. */
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#define RTE_SPI1_MASTER_PCS_PIN_SEL kLPSPI_MasterPcs0
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#define RTE_SPI1_SCK_TO_PSC_DELAY RTE_SPI1_SCK_TO_PCS_DELAY
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#endif /* _RTE_DEVICE_H */
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