93 lines
5.0 KiB
C
93 lines
5.0 KiB
C
/*
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* Copyright 2018 ,2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/***********************************************************************************************************************
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* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
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* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
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**********************************************************************************************************************/
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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!!GlobalInfo
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product: Pins v9.0
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processor: MIMXRT1021xxxxx
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package_id: MIMXRT1021DAG5A
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mcu_data: ksdk2_0
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processor_version: 9.0.1
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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#include "fsl_common.h"
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#include "fsl_iomuxc.h"
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#include "pin_mux.h"
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/* FUNCTION ************************************************************************************************************
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*
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* Function Name : BOARD_InitBootPins
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* Description : Calls initialization functions.
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*
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* END ****************************************************************************************************************/
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void BOARD_InitBootPins(void) {
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BOARD_InitPins();
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}
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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BOARD_InitPins:
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- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
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- pin_list:
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- {pin_num: '101', peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_07, software_input_on: Disable, open_drain: Disable}
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- {pin_num: '105', peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_06, software_input_on: Disable, open_drain: Disable}
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- {pin_num: '76', peripheral: GPIO1, signal: 'gpio_io, 29', pin_signal: GPIO_AD_B1_13, software_input_on: Disable, open_drain: Disable}
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- {pin_num: '41', peripheral: GPIO3, signal: 'gpio_io, 19', pin_signal: GPIO_SD_B0_06, software_input_on: Disable, open_drain: Disable}
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- {pin_num: '83', peripheral: USDHC1, signal: usdhc_vselect, pin_signal: GPIO_AD_B1_07, software_input_on: Disable, open_drain: Disable}
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- {pin_num: '48', peripheral: USDHC1, signal: 'usdhc_data, 2', pin_signal: GPIO_SD_B0_00, software_input_on: Disable, open_drain: Disable}
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- {pin_num: '47', peripheral: USDHC1, signal: 'usdhc_data, 3', pin_signal: GPIO_SD_B0_01, software_input_on: Disable, open_drain: Disable}
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- {pin_num: '46', peripheral: USDHC1, signal: usdhc_cmd, pin_signal: GPIO_SD_B0_02, software_input_on: Disable, open_drain: Disable}
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- {pin_num: '45', peripheral: USDHC1, signal: usdhc_clk, pin_signal: GPIO_SD_B0_03, software_input_on: Disable, open_drain: Disable}
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- {pin_num: '43', peripheral: USDHC1, signal: 'usdhc_data, 0', pin_signal: GPIO_SD_B0_04, software_input_on: Disable, open_drain: Disable}
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- {pin_num: '42', peripheral: USDHC1, signal: 'usdhc_data, 1', pin_signal: GPIO_SD_B0_05, software_input_on: Disable, open_drain: Disable}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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/* FUNCTION ************************************************************************************************************
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*
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* Function Name : BOARD_InitPins
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* Description : Configures pin routing and optionally pin electrical features.
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*
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* END ****************************************************************************************************************/
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void BOARD_InitPins(void) {
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_USDHC1_VSELECT, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_13_GPIO1_IO29, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_00_USDHC1_DATA2, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_01_USDHC1_DATA3, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_02_USDHC1_CMD, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_03_USDHC1_CLK, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_04_USDHC1_DATA0, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA1, 0U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_06_GPIO3_IO19, 0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_07_USDHC1_VSELECT, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_13_GPIO1_IO29, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_00_USDHC1_DATA2, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_01_USDHC1_DATA3, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_02_USDHC1_CMD, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_03_USDHC1_CLK, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_04_USDHC1_DATA0, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA1, 0x10B0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_06_GPIO3_IO19, 0x10B0U);
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}
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/***********************************************************************************************************************
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* EOF
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**********************************************************************************************************************/
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