357 lines
16 KiB
C
357 lines
16 KiB
C
/*
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* Copyright 2021-2023 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/* Wi-Fi boards configuration list */
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/* AzureWave AW-NM191-uSD */
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#if defined(WIFI_88W8801_BOARD_AW_NM191_USD)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8801
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x1B \
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}
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/* AzureWave AW-NM191MA */
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#elif defined(WIFI_88W8801_BOARD_AW_NM191MA)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8801
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define WIFI_BT_USE_M2_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x1B \
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}
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/* AzureWave AW-AM457-uSD */
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#elif defined(WIFI_IW416_BOARD_AW_AM457_USD)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8978
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define WIFI_BT_USE_USD_INTERFACE
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#define OVERRIDE_CALIBRATION_DATA "WIFI_IW416_BOARD_AW_AM457_CAL_DATA_EXT.h"
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
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}
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/* AzureWave AW-AM457MA */
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#elif defined(WIFI_IW416_BOARD_AW_AM457MA)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8978
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define WIFI_BT_USE_M2_INTERFACE
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#define OVERRIDE_CALIBRATION_DATA "WIFI_IW416_BOARD_AW_AM457_CAL_DATA_EXT.h"
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
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}
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/* AzureWave AW-AM510-uSD */
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#elif defined(WIFI_IW416_BOARD_AW_AM510_USD)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8978
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define CONFIG_BR_SCO_PCM_DIRECTION 1
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
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}
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/* AzureWave AW-AM510MA */
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#elif defined(WIFI_IW416_BOARD_AW_AM510MA)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8978
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define CONFIG_BR_SCO_PCM_DIRECTION 1
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#define WIFI_BT_USE_M2_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
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}
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/* AzureWave AW-CM358-uSD */
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#elif defined(WIFI_88W8987_BOARD_AW_CM358_USD)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8987
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
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}
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/* AzureWave AW-CM358MA */
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#elif defined(WIFI_88W8987_BOARD_AW_CM358MA)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8987
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_M2_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
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}
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/* Murata 2DS + Murata uSD-M.2 adapter */
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#elif defined(WIFI_88W8801_BOARD_MURATA_2DS_USD)
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_CA.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_EU.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_JP.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_US.h"
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_WW.h"
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#define SD8801
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingSDR25HighSpeedMode
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x0E \
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}
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/* Murata 2DS */
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#elif defined(WIFI_88W8801_BOARD_MURATA_2DS_M2)
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_CA.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_EU.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_JP.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_US.h"
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_WW.h"
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#define SD8801
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingSDR25HighSpeedMode
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#define WIFI_BT_USE_M2_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x0E \
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}
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/* Murata 1XK + Murata uSD-M.2 adapter */
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#elif defined(WIFI_IW416_BOARD_MURATA_1XK_USD)
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_CA.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_EU.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_JP.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_US.h"
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_WW.h"
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#define SD8978
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x0, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0x6 \
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}
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/* Murata 1XK */
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#elif defined(WIFI_IW416_BOARD_MURATA_1XK_M2)
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_CA.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_EU.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_JP.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_US.h"
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_WW.h"
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#define SD8978
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_M2_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x0, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0x6 \
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}
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/* Murata 1ZM + Murata uSD-M.2 adapter */
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#elif defined(WIFI_88W8987_BOARD_MURATA_1ZM_USD)
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_CA.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_EU.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_JP.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_US.h"
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_WW.h"
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#define SD8987
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x6, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0x6 \
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}
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/* Murata 1ZM */
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#elif defined(WIFI_88W8987_BOARD_MURATA_1ZM_M2)
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_CA.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_EU.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_JP.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_US.h"
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_WW.h"
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#define SD8987
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_M2_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x6, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0x6 \
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}
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/* USD Firecrest module */
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#elif defined(WIFI_IW612_BOARD_RD_USD)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD9177
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#define SDMMCHOST_OPERATION_VOLTAGE_3V3
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0xA, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xA \
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}
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/* RD Firecrest module with M2 interface */
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#elif defined(WIFI_IW612_BOARD_RD_M2)
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_CA_RU_Tx_power.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_EU_RU_Tx_power.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_JP_RU_Tx_power.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_US_RU_Tx_power.h"
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_WW.h"
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#define SD9177
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_M2_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0xA, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xA \
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}
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/* 2EL Firecrest module with uSD adapter */
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#elif defined(WIFI_IW612_BOARD_MURATA_2EL_USD)
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_CA_RU_Tx_power.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_EU_RU_Tx_power.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_JP_RU_Tx_power.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_US_RU_Tx_power.h"
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_WW.h"
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#define SD9177
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0xA, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xA \
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}
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/* 2EL Firecrest module with M2 interface */
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#elif defined(WIFI_IW612_BOARD_MURATA_2EL_M2)
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_CA_RU_Tx_power.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_EU_RU_Tx_power.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_JP_RU_Tx_power.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_US_RU_Tx_power.h"
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_WW.h"
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#define SD9177
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_M2_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0xA, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xA \
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}
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/* u-blox EVK-LILY-W131/-W132 */
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#elif defined(WIFI_88W8801_BOARD_UBX_LILY_W1_USD)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8801
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#define SDMMCHOST_OPERATION_VOLTAGE_3V3
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x1B \
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}
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/* u-blox EVK-JODY-W263 */
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#elif defined(WIFI_88W8987_BOARD_UBX_JODY_W2_USD)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8987
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
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}
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/* Murata 2DL + Murata uSD-M.2 adapter */
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#elif defined(WIFI_IW611_BOARD_MURATA_2DL_USD)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_WW.h"
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#define SD9177
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0xA, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xA \
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}
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/* Murata 2DL */
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#elif defined(WIFI_IW611_BOARD_MURATA_2DL_M2)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2EL_WW.h"
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#define SD9177
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_M2_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0xA, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xA \
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}
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/* u-blox JODY W5 uSD */
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#elif defined(WIFI_AW611_BOARD_UBX_JODY_W5_USD)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_jody_w5_WW.h"
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#define SD9177
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0xA, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xA \
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}
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/* u-blox JODY W5 M2 */
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#elif defined(WIFI_AW611_BOARD_UBX_JODY_W5_M2)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_jody_w5_WW.h"
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#define SD9177
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_M2_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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|
{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0xA, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xA \
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}
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|
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/* u-blox EVK-MAYA-W161/-W166 */
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#elif defined(WIFI_IW416_BOARD_UBX_MAYA_W1_USD)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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|
#define SD8978
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|
#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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|
#define WIFI_BT_USE_USD_INTERFACE
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|
#define WLAN_ED_MAC_CTRL \
|
|
{ \
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|
.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
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|
}
|
|
|
|
/* K32W061 transceiver */
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|
#elif defined(K32W061_TRANSCEIVER)
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|
/*
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|
* Wifi functions are not used with K32W061 but wifi files require to
|
|
* be built, so stub macro are defined. Wifi functions won't be used at
|
|
* link stage for k32w061 transceiver
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|
*
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|
*/
|
|
#define SD8987
|
|
|
|
#elif defined(WIFI_BOARD_RW610)
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|
#define RW610
|
|
#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW_rw610.h"
|
|
|
|
#else
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|
#error "Please define macro related to wifi board"
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|
#endif
|