52 lines
1.8 KiB
C
52 lines
1.8 KiB
C
/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2019 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_aipstz.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.aipstz"
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#endif
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*!
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* brief Configure the privilege level for master.
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*
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* param base AIPSTZ peripheral base pointer
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* param master Masters for AIPSTZ.
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* param privilegeConfig Configuration is ORed from aipstz_master_privilege_level_t.
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*/
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void AIPSTZ_SetMasterPriviledgeLevel(AIPSTZ_Type *base, aipstz_master_t master, uint32_t privilegeConfig)
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{
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uint32_t mask = ((uint32_t)master >> 8U) - 1U;
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uint32_t shift = (uint32_t)master & 0xFFU;
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base->MPR = (base->MPR & (~(mask << shift))) | (privilegeConfig << shift);
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}
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/*!
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* brief Configure the access for peripheral.
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*
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* param base AIPSTZ peripheral base pointer
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* param master Peripheral for AIPSTZ.
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* param accessControl Configuration is ORed from aipstz_peripheral_access_control_t.
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*/
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void AIPSTZ_SetPeripheralAccessControl(AIPSTZ_Type *base, aipstz_peripheral_t peripheral, uint32_t accessControl)
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{
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volatile uint32_t *reg = (uint32_t *)((uint32_t)base + ((uint32_t)peripheral >> 16U));
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uint32_t mask = (((uint32_t)peripheral & 0xFF00U) >> 8U) - 1U;
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uint32_t shift = (uint32_t)peripheral & 0xFFU;
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*reg = (*reg & (~(mask << shift))) | ((accessControl & mask) << shift);
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}
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