719 lines
28 KiB
C
719 lines
28 KiB
C
/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2020, 2022 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef FSL_FLEXIO_SPI_H_
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#define FSL_FLEXIO_SPI_H_
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#include "fsl_common.h"
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#include "fsl_flexio.h"
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/*!
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* @addtogroup flexio_spi
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*! @{ */
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/*! @brief FlexIO SPI driver version. */
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#define FSL_FLEXIO_SPI_DRIVER_VERSION (MAKE_VERSION(2, 3, 3))
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/*! @} */
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#ifndef FLEXIO_SPI_DUMMYDATA
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/*! @brief FlexIO SPI dummy transfer data, the data is sent while txData is NULL. */
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#define FLEXIO_SPI_DUMMYDATA (0x00U)
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#endif
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/*! @brief Retry times for waiting flag. */
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#ifndef SPI_RETRY_TIMES
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#define SPI_RETRY_TIMES 0U /* Define to zero means keep waiting until the flag is assert/deassert. */
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#endif
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/*! @brief Get the transfer data format of width and bit order. */
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#define FLEXIO_SPI_XFER_DATA_FORMAT(flag) ((flag) & (0x7U))
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/*! @brief Error codes for the FlexIO SPI driver. */
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enum
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{
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kStatus_FLEXIO_SPI_Busy = MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 1), /*!< FlexIO SPI is busy. */
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kStatus_FLEXIO_SPI_Idle = MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 2), /*!< SPI is idle */
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kStatus_FLEXIO_SPI_Error = MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 3), /*!< FlexIO SPI error. */
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kStatus_FLEXIO_SPI_Timeout =
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MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 4), /*!< FlexIO SPI timeout polling status flags. */
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};
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/*! @brief FlexIO SPI clock phase configuration. */
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typedef enum _flexio_spi_clock_phase
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{
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kFLEXIO_SPI_ClockPhaseFirstEdge = 0x0U, /*!< First edge on SPSCK occurs at the middle of the first
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* cycle of a data transfer. */
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kFLEXIO_SPI_ClockPhaseSecondEdge = 0x1U, /*!< First edge on SPSCK occurs at the start of the
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* first cycle of a data transfer. */
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} flexio_spi_clock_phase_t;
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/*! @brief FlexIO SPI data shifter direction options. */
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typedef enum _flexio_spi_shift_direction
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{
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kFLEXIO_SPI_MsbFirst = 0, /*!< Data transfers start with most significant bit. */
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kFLEXIO_SPI_LsbFirst = 1, /*!< Data transfers start with least significant bit. */
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} flexio_spi_shift_direction_t;
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/*! @brief FlexIO SPI data length mode options. */
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typedef enum _flexio_spi_data_bitcount_mode
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{
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kFLEXIO_SPI_8BitMode = 0x08U, /*!< 8-bit data transmission mode. */
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kFLEXIO_SPI_16BitMode = 0x10U, /*!< 16-bit data transmission mode. */
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kFLEXIO_SPI_32BitMode = 0x20U, /*!< 32-bit data transmission mode. */
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} flexio_spi_data_bitcount_mode_t;
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/*! @brief Define FlexIO SPI interrupt mask. */
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enum _flexio_spi_interrupt_enable
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{
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kFLEXIO_SPI_TxEmptyInterruptEnable = 0x1U, /*!< Transmit buffer empty interrupt enable. */
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kFLEXIO_SPI_RxFullInterruptEnable = 0x2U, /*!< Receive buffer full interrupt enable. */
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};
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/*! @brief Define FlexIO SPI status mask. */
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enum _flexio_spi_status_flags
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{
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kFLEXIO_SPI_TxBufferEmptyFlag = 0x1U, /*!< Transmit buffer empty flag. */
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kFLEXIO_SPI_RxBufferFullFlag = 0x2U, /*!< Receive buffer full flag. */
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};
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/*! @brief Define FlexIO SPI DMA mask. */
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enum _flexio_spi_dma_enable
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{
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kFLEXIO_SPI_TxDmaEnable = 0x1U, /*!< Tx DMA request source */
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kFLEXIO_SPI_RxDmaEnable = 0x2U, /*!< Rx DMA request source */
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kFLEXIO_SPI_DmaAllEnable = 0x3U, /*!< All DMA request source*/
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};
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/*! @brief Define FlexIO SPI transfer flags.
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* @note Use kFLEXIO_SPI_csContinuous and one of the other flags to OR together to form the transfer flag. */
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enum _flexio_spi_transfer_flags
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{
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kFLEXIO_SPI_8bitMsb = 0x0U, /*!< FlexIO SPI 8-bit MSB first */
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kFLEXIO_SPI_8bitLsb = 0x1U, /*!< FlexIO SPI 8-bit LSB first */
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kFLEXIO_SPI_16bitMsb = 0x2U, /*!< FlexIO SPI 16-bit MSB first */
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kFLEXIO_SPI_16bitLsb = 0x3U, /*!< FlexIO SPI 16-bit LSB first */
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kFLEXIO_SPI_32bitMsb = 0x4U, /*!< FlexIO SPI 32-bit MSB first */
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kFLEXIO_SPI_32bitLsb = 0x5U, /*!< FlexIO SPI 32-bit LSB first */
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kFLEXIO_SPI_csContinuous = 0x8U, /*!< Enable the CS signal continuous mode */
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};
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/*! @brief Define FlexIO SPI access structure typedef. */
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typedef struct _flexio_spi_type
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{
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FLEXIO_Type *flexioBase; /*!< FlexIO base pointer. */
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uint8_t SDOPinIndex; /*!< Pin select for data output. To set SDO pin in Hi-Z state, user needs to mux the pin as
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GPIO input and disable all pull up/down in application. */
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uint8_t SDIPinIndex; /*!< Pin select for data input. */
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uint8_t SCKPinIndex; /*!< Pin select for clock. */
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uint8_t CSnPinIndex; /*!< Pin select for enable. */
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uint8_t shifterIndex[2]; /*!< Shifter index used in FlexIO SPI. */
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uint8_t timerIndex[2]; /*!< Timer index used in FlexIO SPI. */
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} FLEXIO_SPI_Type;
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/*! @brief Define FlexIO SPI master configuration structure. */
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typedef struct _flexio_spi_master_config
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{
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bool enableMaster; /*!< Enable/disable FlexIO SPI master after configuration. */
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bool enableInDoze; /*!< Enable/disable FlexIO operation in doze mode. */
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bool enableInDebug; /*!< Enable/disable FlexIO operation in debug mode. */
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bool enableFastAccess; /*!< Enable/disable fast access to FlexIO registers,
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fast access requires the FlexIO clock to be at least
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twice the frequency of the bus clock. */
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uint32_t baudRate_Bps; /*!< Baud rate in Bps. */
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flexio_spi_clock_phase_t phase; /*!< Clock phase. */
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flexio_spi_data_bitcount_mode_t dataMode; /*!< 8bit or 16bit mode. */
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} flexio_spi_master_config_t;
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/*! @brief Define FlexIO SPI slave configuration structure. */
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typedef struct _flexio_spi_slave_config
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{
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bool enableSlave; /*!< Enable/disable FlexIO SPI slave after configuration. */
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bool enableInDoze; /*!< Enable/disable FlexIO operation in doze mode. */
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bool enableInDebug; /*!< Enable/disable FlexIO operation in debug mode. */
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bool enableFastAccess; /*!< Enable/disable fast access to FlexIO registers,
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fast access requires the FlexIO clock to be at least
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twice the frequency of the bus clock. */
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flexio_spi_clock_phase_t phase; /*!< Clock phase. */
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flexio_spi_data_bitcount_mode_t dataMode; /*!< 8bit or 16bit mode. */
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} flexio_spi_slave_config_t;
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/*! @brief Define FlexIO SPI transfer structure. */
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typedef struct _flexio_spi_transfer
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{
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uint8_t *txData; /*!< Send buffer. */
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uint8_t *rxData; /*!< Receive buffer. */
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size_t dataSize; /*!< Transfer bytes. */
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uint8_t flags; /*!< FlexIO SPI control flag, MSB first or LSB first. */
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} flexio_spi_transfer_t;
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/*! @brief typedef for flexio_spi_master_handle_t in advance. */
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typedef struct _flexio_spi_master_handle flexio_spi_master_handle_t;
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/*! @brief Slave handle is the same with master handle. */
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typedef flexio_spi_master_handle_t flexio_spi_slave_handle_t;
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/*! @brief FlexIO SPI master callback for finished transmit */
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typedef void (*flexio_spi_master_transfer_callback_t)(FLEXIO_SPI_Type *base,
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flexio_spi_master_handle_t *handle,
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status_t status,
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void *userData);
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/*! @brief FlexIO SPI slave callback for finished transmit */
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typedef void (*flexio_spi_slave_transfer_callback_t)(FLEXIO_SPI_Type *base,
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flexio_spi_slave_handle_t *handle,
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status_t status,
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void *userData);
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/*! @brief Define FlexIO SPI handle structure. */
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struct _flexio_spi_master_handle
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{
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uint8_t *txData; /*!< Transfer buffer. */
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uint8_t *rxData; /*!< Receive buffer. */
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size_t transferSize; /*!< Total bytes to be transferred. */
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volatile size_t txRemainingBytes; /*!< Send data remaining in bytes. */
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volatile size_t rxRemainingBytes; /*!< Receive data remaining in bytes. */
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volatile uint32_t state; /*!< FlexIO SPI internal state. */
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uint8_t bytePerFrame; /*!< SPI mode, 2bytes or 1byte in a frame */
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flexio_spi_shift_direction_t direction; /*!< Shift direction. */
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flexio_spi_master_transfer_callback_t callback; /*!< FlexIO SPI callback. */
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void *userData; /*!< Callback parameter. */
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};
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif /*_cplusplus*/
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/*!
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* @name FlexIO SPI Configuration
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* @{
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*/
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/*!
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* @brief Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI master hardware,
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* and configures the FlexIO SPI with FlexIO SPI master configuration. The
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* configuration structure can be filled by the user, or be set with default values
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* by the FLEXIO_SPI_MasterGetDefaultConfig().
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*
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* @note 1.FlexIO SPI master only support CPOL = 0, which means clock inactive low.
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* 2.For FlexIO SPI master, the input valid time is 1.5 clock cycles, for slave the output valid time
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* is 2.5 clock cycles. So if FlexIO SPI master communicates with other spi IPs, the maximum baud
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* rate is FlexIO clock frequency divided by 2*2=4. If FlexIO SPI master communicates with FlexIO
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* SPI slave, the maximum baud rate is FlexIO clock frequency divided by (1.5+2.5)*2=8.
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*
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* Example
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@code
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FLEXIO_SPI_Type spiDev = {
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.flexioBase = FLEXIO,
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.SDOPinIndex = 0,
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.SDIPinIndex = 1,
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.SCKPinIndex = 2,
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.CSnPinIndex = 3,
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.shifterIndex = {0,1},
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.timerIndex = {0,1}
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};
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flexio_spi_master_config_t config = {
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.enableMaster = true,
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.enableInDoze = false,
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.enableInDebug = true,
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.enableFastAccess = false,
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.baudRate_Bps = 500000,
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.phase = kFLEXIO_SPI_ClockPhaseFirstEdge,
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.direction = kFLEXIO_SPI_MsbFirst,
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.dataMode = kFLEXIO_SPI_8BitMode
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};
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FLEXIO_SPI_MasterInit(&spiDev, &config, srcClock_Hz);
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@endcode
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*
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* @param base Pointer to the FLEXIO_SPI_Type structure.
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* @param masterConfig Pointer to the flexio_spi_master_config_t structure.
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* @param srcClock_Hz FlexIO source clock in Hz.
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*/
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void FLEXIO_SPI_MasterInit(FLEXIO_SPI_Type *base, flexio_spi_master_config_t *masterConfig, uint32_t srcClock_Hz);
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/*!
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* @brief Resets the FlexIO SPI timer and shifter config.
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*
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* @param base Pointer to the FLEXIO_SPI_Type.
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*/
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void FLEXIO_SPI_MasterDeinit(FLEXIO_SPI_Type *base);
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/*!
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* @brief Gets the default configuration to configure the FlexIO SPI master. The configuration
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* can be used directly by calling the FLEXIO_SPI_MasterConfigure().
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* Example:
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@code
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flexio_spi_master_config_t masterConfig;
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FLEXIO_SPI_MasterGetDefaultConfig(&masterConfig);
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@endcode
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* @param masterConfig Pointer to the flexio_spi_master_config_t structure.
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*/
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void FLEXIO_SPI_MasterGetDefaultConfig(flexio_spi_master_config_t *masterConfig);
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/*!
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* @brief Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI slave hardware
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* configuration, and configures the FlexIO SPI with FlexIO SPI slave configuration. The
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* configuration structure can be filled by the user, or be set with default values
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* by the FLEXIO_SPI_SlaveGetDefaultConfig().
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*
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* @note 1.Only one timer is needed in the FlexIO SPI slave. As a result, the second timer index is ignored.
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* 2.FlexIO SPI slave only support CPOL = 0, which means clock inactive low.
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* 3.For FlexIO SPI master, the input valid time is 1.5 clock cycles, for slave the output valid time
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* is 2.5 clock cycles. So if FlexIO SPI slave communicates with other spi IPs, the maximum baud
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* rate is FlexIO clock frequency divided by 3*2=6. If FlexIO SPI slave communicates with FlexIO
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* SPI master, the maximum baud rate is FlexIO clock frequency divided by (1.5+2.5)*2=8.
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* Example
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@code
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FLEXIO_SPI_Type spiDev = {
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.flexioBase = FLEXIO,
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.SDOPinIndex = 0,
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.SDIPinIndex = 1,
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.SCKPinIndex = 2,
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.CSnPinIndex = 3,
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.shifterIndex = {0,1},
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.timerIndex = {0}
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};
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flexio_spi_slave_config_t config = {
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.enableSlave = true,
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.enableInDoze = false,
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.enableInDebug = true,
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.enableFastAccess = false,
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.phase = kFLEXIO_SPI_ClockPhaseFirstEdge,
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.direction = kFLEXIO_SPI_MsbFirst,
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.dataMode = kFLEXIO_SPI_8BitMode
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};
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FLEXIO_SPI_SlaveInit(&spiDev, &config);
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@endcode
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* @param base Pointer to the FLEXIO_SPI_Type structure.
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* @param slaveConfig Pointer to the flexio_spi_slave_config_t structure.
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*/
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void FLEXIO_SPI_SlaveInit(FLEXIO_SPI_Type *base, flexio_spi_slave_config_t *slaveConfig);
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/*!
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* @brief Gates the FlexIO clock.
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*
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* @param base Pointer to the FLEXIO_SPI_Type.
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*/
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void FLEXIO_SPI_SlaveDeinit(FLEXIO_SPI_Type *base);
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/*!
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* @brief Gets the default configuration to configure the FlexIO SPI slave. The configuration
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* can be used directly for calling the FLEXIO_SPI_SlaveConfigure().
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* Example:
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@code
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flexio_spi_slave_config_t slaveConfig;
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FLEXIO_SPI_SlaveGetDefaultConfig(&slaveConfig);
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@endcode
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* @param slaveConfig Pointer to the flexio_spi_slave_config_t structure.
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*/
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void FLEXIO_SPI_SlaveGetDefaultConfig(flexio_spi_slave_config_t *slaveConfig);
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/*! @} */
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/*!
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* @name Status
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* @{
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*/
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/*!
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* @brief Gets FlexIO SPI status flags.
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*
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* @param base Pointer to the FLEXIO_SPI_Type structure.
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* @return status flag; Use the status flag to AND the following flag mask and get the status.
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* @arg kFLEXIO_SPI_TxEmptyFlag
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* @arg kFLEXIO_SPI_RxEmptyFlag
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*/
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uint32_t FLEXIO_SPI_GetStatusFlags(FLEXIO_SPI_Type *base);
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/*!
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* @brief Clears FlexIO SPI status flags.
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*
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* @param base Pointer to the FLEXIO_SPI_Type structure.
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* @param mask status flag
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* The parameter can be any combination of the following values:
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* @arg kFLEXIO_SPI_TxEmptyFlag
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* @arg kFLEXIO_SPI_RxEmptyFlag
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*/
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void FLEXIO_SPI_ClearStatusFlags(FLEXIO_SPI_Type *base, uint32_t mask);
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/*! @} */
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/*!
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* @name Interrupts
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* @{
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*/
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/*!
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* @brief Enables the FlexIO SPI interrupt.
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*
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* This function enables the FlexIO SPI interrupt.
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*
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* @param base Pointer to the FLEXIO_SPI_Type structure.
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* @param mask interrupt source. The parameter can be any combination of the following values:
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* @arg kFLEXIO_SPI_RxFullInterruptEnable
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* @arg kFLEXIO_SPI_TxEmptyInterruptEnable
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*/
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void FLEXIO_SPI_EnableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask);
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/*!
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* @brief Disables the FlexIO SPI interrupt.
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*
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* This function disables the FlexIO SPI interrupt.
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*
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* @param base Pointer to the FLEXIO_SPI_Type structure.
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* @param mask interrupt source The parameter can be any combination of the following values:
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* @arg kFLEXIO_SPI_RxFullInterruptEnable
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* @arg kFLEXIO_SPI_TxEmptyInterruptEnable
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*/
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void FLEXIO_SPI_DisableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask);
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/*! @} */
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/*!
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* @name DMA Control
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* @{
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*/
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/*!
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* @brief Enables/disables the FlexIO SPI transmit DMA. This function enables/disables the FlexIO SPI Tx DMA,
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* which means that asserting the kFLEXIO_SPI_TxEmptyFlag does/doesn't trigger the DMA request.
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*
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* @param base Pointer to the FLEXIO_SPI_Type structure.
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* @param mask SPI DMA source.
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* @param enable True means enable DMA, false means disable DMA.
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*/
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void FLEXIO_SPI_EnableDMA(FLEXIO_SPI_Type *base, uint32_t mask, bool enable);
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/*!
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* @brief Gets the FlexIO SPI transmit data register address for MSB first transfer.
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*
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* This function returns the SPI data register address, which is mainly used by DMA/eDMA.
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*
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* @param base Pointer to the FLEXIO_SPI_Type structure.
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* @param direction Shift direction of MSB first or LSB first.
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* @return FlexIO SPI transmit data register address.
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*/
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static inline uint32_t FLEXIO_SPI_GetTxDataRegisterAddress(FLEXIO_SPI_Type *base,
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flexio_spi_shift_direction_t direction)
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{
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if (direction == kFLEXIO_SPI_MsbFirst)
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{
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return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBufferBitSwapped,
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base->shifterIndex[0]) +
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3U;
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}
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else
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{
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return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBuffer, base->shifterIndex[0]);
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}
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}
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/*!
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* @brief Gets the FlexIO SPI receive data register address for the MSB first transfer.
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*
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* This function returns the SPI data register address, which is mainly used by DMA/eDMA.
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*
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* @param base Pointer to the FLEXIO_SPI_Type structure.
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* @param direction Shift direction of MSB first or LSB first.
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* @return FlexIO SPI receive data register address.
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*/
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static inline uint32_t FLEXIO_SPI_GetRxDataRegisterAddress(FLEXIO_SPI_Type *base,
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flexio_spi_shift_direction_t direction)
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{
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if (direction == kFLEXIO_SPI_MsbFirst)
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{
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return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBufferBitSwapped, base->shifterIndex[1]);
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}
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else
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{
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return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBuffer, base->shifterIndex[1]) + 3U;
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}
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|
}
|
|
|
|
/*! @} */
|
|
|
|
/*!
|
|
* @name Bus Operations
|
|
* @{
|
|
*/
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|
|
|
/*!
|
|
* @brief Enables/disables the FlexIO SPI module operation.
|
|
*
|
|
* @param base Pointer to the FLEXIO_SPI_Type.
|
|
* @param enable True to enable, false does not have any effect.
|
|
*/
|
|
static inline void FLEXIO_SPI_Enable(FLEXIO_SPI_Type *base, bool enable)
|
|
{
|
|
if (enable)
|
|
{
|
|
base->flexioBase->CTRL |= FLEXIO_CTRL_FLEXEN_MASK;
|
|
}
|
|
}
|
|
|
|
/*!
|
|
* @brief Sets baud rate for the FlexIO SPI transfer, which is only used for the master.
|
|
*
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|
* @param base Pointer to the FLEXIO_SPI_Type structure.
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|
* @param baudRate_Bps Baud Rate needed in Hz.
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|
* @param srcClockHz SPI source clock frequency in Hz.
|
|
*/
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|
void FLEXIO_SPI_MasterSetBaudRate(FLEXIO_SPI_Type *base, uint32_t baudRate_Bps, uint32_t srcClockHz);
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|
|
|
/*!
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|
* @brief Writes one byte of data, which is sent using the MSB method.
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|
*
|
|
* @note This is a non-blocking API, which returns directly after the data is put into the
|
|
* data register but the data transfer is not finished on the bus. Ensure that
|
|
* the TxEmptyFlag is asserted before calling this API.
|
|
*
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|
* @param base Pointer to the FLEXIO_SPI_Type structure.
|
|
* @param direction Shift direction of MSB first or LSB first.
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|
* @param data 8/16/32 bit data.
|
|
*/
|
|
static inline void FLEXIO_SPI_WriteData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, uint32_t data)
|
|
{
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|
if (direction == kFLEXIO_SPI_MsbFirst)
|
|
{
|
|
base->flexioBase->SHIFTBUFBBS[base->shifterIndex[0]] = data;
|
|
}
|
|
else
|
|
{
|
|
base->flexioBase->SHIFTBUF[base->shifterIndex[0]] = data;
|
|
}
|
|
}
|
|
|
|
/*!
|
|
* @brief Reads 8 bit/16 bit data.
|
|
*
|
|
* @note This is a non-blocking API, which returns directly after the data is read from the
|
|
* data register. Ensure that the RxFullFlag is asserted before calling this API.
|
|
*
|
|
* @param base Pointer to the FLEXIO_SPI_Type structure.
|
|
* @param direction Shift direction of MSB first or LSB first.
|
|
* @return 8 bit/16 bit data received.
|
|
*/
|
|
static inline uint32_t FLEXIO_SPI_ReadData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction)
|
|
{
|
|
if (direction == kFLEXIO_SPI_MsbFirst)
|
|
{
|
|
return (uint32_t)(base->flexioBase->SHIFTBUFBIS[base->shifterIndex[1]]);
|
|
}
|
|
else
|
|
{
|
|
return (uint32_t)(base->flexioBase->SHIFTBUFBYS[base->shifterIndex[1]]);
|
|
}
|
|
}
|
|
|
|
/*!
|
|
* @brief Sends a buffer of data bytes.
|
|
*
|
|
* @note This function blocks using the polling method until all bytes have been sent.
|
|
*
|
|
* @param base Pointer to the FLEXIO_SPI_Type structure.
|
|
* @param direction Shift direction of MSB first or LSB first.
|
|
* @param buffer The data bytes to send.
|
|
* @param size The number of data bytes to send.
|
|
* @retval kStatus_Success Successfully create the handle.
|
|
* @retval kStatus_FLEXIO_SPI_Timeout The transfer timed out and was aborted.
|
|
*/
|
|
status_t FLEXIO_SPI_WriteBlocking(FLEXIO_SPI_Type *base,
|
|
flexio_spi_shift_direction_t direction,
|
|
const uint8_t *buffer,
|
|
size_t size);
|
|
|
|
/*!
|
|
* @brief Receives a buffer of bytes.
|
|
*
|
|
* @note This function blocks using the polling method until all bytes have been received.
|
|
*
|
|
* @param base Pointer to the FLEXIO_SPI_Type structure.
|
|
* @param direction Shift direction of MSB first or LSB first.
|
|
* @param buffer The buffer to store the received bytes.
|
|
* @param size The number of data bytes to be received.
|
|
* @retval kStatus_Success Successfully create the handle.
|
|
* @retval kStatus_FLEXIO_SPI_Timeout The transfer timed out and was aborted.
|
|
*/
|
|
status_t FLEXIO_SPI_ReadBlocking(FLEXIO_SPI_Type *base,
|
|
flexio_spi_shift_direction_t direction,
|
|
uint8_t *buffer,
|
|
size_t size);
|
|
|
|
/*!
|
|
* @brief Receives a buffer of bytes.
|
|
*
|
|
* @note This function blocks via polling until all bytes have been received.
|
|
*
|
|
* @param base pointer to FLEXIO_SPI_Type structure
|
|
* @param xfer FlexIO SPI transfer structure, see #flexio_spi_transfer_t.
|
|
* @retval kStatus_Success Successfully create the handle.
|
|
* @retval kStatus_FLEXIO_SPI_Timeout The transfer timed out and was aborted.
|
|
*/
|
|
status_t FLEXIO_SPI_MasterTransferBlocking(FLEXIO_SPI_Type *base, flexio_spi_transfer_t *xfer);
|
|
|
|
/*!
|
|
* @brief Flush tx/rx shifters.
|
|
*
|
|
* @param base Pointer to the FLEXIO_SPI_Type structure.
|
|
*/
|
|
void FLEXIO_SPI_FlushShifters(FLEXIO_SPI_Type *base);
|
|
/*! @} */
|
|
|
|
/*Transactional APIs*/
|
|
|
|
/*!
|
|
* @name Transactional
|
|
* @{
|
|
*/
|
|
|
|
/*!
|
|
* @brief Initializes the FlexIO SPI Master handle, which is used in transactional functions.
|
|
*
|
|
* @param base Pointer to the FLEXIO_SPI_Type structure.
|
|
* @param handle Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
|
|
* @param callback The callback function.
|
|
* @param userData The parameter of the callback function.
|
|
* @retval kStatus_Success Successfully create the handle.
|
|
* @retval kStatus_OutOfRange The FlexIO type/handle/ISR table out of range.
|
|
*/
|
|
status_t FLEXIO_SPI_MasterTransferCreateHandle(FLEXIO_SPI_Type *base,
|
|
flexio_spi_master_handle_t *handle,
|
|
flexio_spi_master_transfer_callback_t callback,
|
|
void *userData);
|
|
|
|
/*!
|
|
* @brief Master transfer data using IRQ.
|
|
*
|
|
* This function sends data using IRQ. This is a non-blocking function, which returns
|
|
* right away. When all data is sent out/received, the callback function is called.
|
|
*
|
|
* @param base Pointer to the FLEXIO_SPI_Type structure.
|
|
* @param handle Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
|
|
* @param xfer FlexIO SPI transfer structure. See #flexio_spi_transfer_t.
|
|
* @retval kStatus_Success Successfully start a transfer.
|
|
* @retval kStatus_InvalidArgument Input argument is invalid.
|
|
* @retval kStatus_FLEXIO_SPI_Busy SPI is not idle, is running another transfer.
|
|
*/
|
|
status_t FLEXIO_SPI_MasterTransferNonBlocking(FLEXIO_SPI_Type *base,
|
|
flexio_spi_master_handle_t *handle,
|
|
flexio_spi_transfer_t *xfer);
|
|
|
|
/*!
|
|
* @brief Aborts the master data transfer, which used IRQ.
|
|
*
|
|
* @param base Pointer to the FLEXIO_SPI_Type structure.
|
|
* @param handle Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
|
|
*/
|
|
void FLEXIO_SPI_MasterTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle);
|
|
|
|
/*!
|
|
* @brief Gets the data transfer status which used IRQ.
|
|
*
|
|
* @param base Pointer to the FLEXIO_SPI_Type structure.
|
|
* @param handle Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
|
|
* @param count Number of bytes transferred so far by the non-blocking transaction.
|
|
* @retval kStatus_InvalidArgument count is Invalid.
|
|
* @retval kStatus_Success Successfully return the count.
|
|
*/
|
|
status_t FLEXIO_SPI_MasterTransferGetCount(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, size_t *count);
|
|
|
|
/*!
|
|
* @brief FlexIO SPI master IRQ handler function.
|
|
*
|
|
* @param spiType Pointer to the FLEXIO_SPI_Type structure.
|
|
* @param spiHandle Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
|
|
*/
|
|
void FLEXIO_SPI_MasterTransferHandleIRQ(void *spiType, void *spiHandle);
|
|
|
|
/*!
|
|
* @brief Initializes the FlexIO SPI Slave handle, which is used in transactional functions.
|
|
*
|
|
* @param base Pointer to the FLEXIO_SPI_Type structure.
|
|
* @param handle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
|
|
* @param callback The callback function.
|
|
* @param userData The parameter of the callback function.
|
|
* @retval kStatus_Success Successfully create the handle.
|
|
* @retval kStatus_OutOfRange The FlexIO type/handle/ISR table out of range.
|
|
*/
|
|
status_t FLEXIO_SPI_SlaveTransferCreateHandle(FLEXIO_SPI_Type *base,
|
|
flexio_spi_slave_handle_t *handle,
|
|
flexio_spi_slave_transfer_callback_t callback,
|
|
void *userData);
|
|
|
|
/*!
|
|
* @brief Slave transfer data using IRQ.
|
|
*
|
|
* This function sends data using IRQ. This is a non-blocking function, which returns
|
|
* right away. When all data is sent out/received, the callback function is called.
|
|
* @param handle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
|
|
*
|
|
* @param base Pointer to the FLEXIO_SPI_Type structure.
|
|
* @param xfer FlexIO SPI transfer structure. See #flexio_spi_transfer_t.
|
|
* @retval kStatus_Success Successfully start a transfer.
|
|
* @retval kStatus_InvalidArgument Input argument is invalid.
|
|
* @retval kStatus_FLEXIO_SPI_Busy SPI is not idle; it is running another transfer.
|
|
*/
|
|
status_t FLEXIO_SPI_SlaveTransferNonBlocking(FLEXIO_SPI_Type *base,
|
|
flexio_spi_slave_handle_t *handle,
|
|
flexio_spi_transfer_t *xfer);
|
|
|
|
/*!
|
|
* @brief Aborts the slave data transfer which used IRQ, share same API with master.
|
|
*
|
|
* @param base Pointer to the FLEXIO_SPI_Type structure.
|
|
* @param handle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
|
|
*/
|
|
static inline void FLEXIO_SPI_SlaveTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle)
|
|
{
|
|
FLEXIO_SPI_MasterTransferAbort(base, handle);
|
|
}
|
|
/*!
|
|
* @brief Gets the data transfer status which used IRQ, share same API with master.
|
|
*
|
|
* @param base Pointer to the FLEXIO_SPI_Type structure.
|
|
* @param handle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
|
|
* @param count Number of bytes transferred so far by the non-blocking transaction.
|
|
* @retval kStatus_InvalidArgument count is Invalid.
|
|
* @retval kStatus_Success Successfully return the count.
|
|
*/
|
|
static inline status_t FLEXIO_SPI_SlaveTransferGetCount(FLEXIO_SPI_Type *base,
|
|
flexio_spi_slave_handle_t *handle,
|
|
size_t *count)
|
|
{
|
|
return FLEXIO_SPI_MasterTransferGetCount(base, handle, count);
|
|
}
|
|
|
|
/*!
|
|
* @brief FlexIO SPI slave IRQ handler function.
|
|
*
|
|
* @param spiType Pointer to the FLEXIO_SPI_Type structure.
|
|
* @param spiHandle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
|
|
*/
|
|
void FLEXIO_SPI_SlaveTransferHandleIRQ(void *spiType, void *spiHandle);
|
|
|
|
/*! @} */
|
|
|
|
#if defined(__cplusplus)
|
|
}
|
|
#endif /*_cplusplus*/
|
|
/*! @} */
|
|
|
|
#endif /*FSL_FLEXIO_SPI_H_*/
|