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765 lines
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 <span id="projectnumber">Rev 2.15.000</span>
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<a href="#typedef-members">Typedefs</a> |
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<a href="#enum-members">Enumerations</a> |
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<a href="#func-members">Functions</a> </div>
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<div class="headertitle">
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<div class="title">SRC: System Reset Controller Driver</div> </div>
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<div class="contents">
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<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
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<p>The MCUXpresso SDK provides a peripheral driver for the System Reset Controller (SRC) module.</p>
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<p>The System Reset Controller (SRC) controls the reset and boot operation of the SoC. It is responsible for the generation of all reset signals and boot decoding. The reset controller determines the source and the type of reset, such as POR, WARM, COLD, and performs the necessary reset qualification and stretching sequences. Based on the type of reset, the reset logic generates the reset sequence for the entire IC. </p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
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Typedefs</h2></td></tr>
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<tr class="memitem:ga8ab4968fbeb3aeff87002c5f04a79c12"><td class="memItemLeft" align="right" valign="top">typedef enum <br class="typebreak"/>
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<a class="el" href="a00279.html#ga9001fa7e0c13473ca9351c94866aab30">_src_warm_reset_bypass_count</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00279.html#ga8ab4968fbeb3aeff87002c5f04a79c12">src_warm_reset_bypass_count_t</a></td></tr>
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<tr class="memdesc:ga8ab4968fbeb3aeff87002c5f04a79c12"><td class="mdescLeft"> </td><td class="mdescRight">Selection of WARM reset bypass count. <a href="#ga8ab4968fbeb3aeff87002c5f04a79c12">More...</a><br/></td></tr>
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<tr class="separator:ga8ab4968fbeb3aeff87002c5f04a79c12"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
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Enumerations</h2></td></tr>
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<tr class="memitem:gaf647f7dbfbed8b1612675ab132cfa244"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00279.html#gaf647f7dbfbed8b1612675ab132cfa244">_src_reset_status_flags</a> { <br/>
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  <a class="el" href="a00279.html#ggaf647f7dbfbed8b1612675ab132cfa244a35d666ccd943a593bc1af289e6233adb">kSRC_TemperatureSensorResetFlag</a> = SRC_SRSR_TSR_MASK,
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<br/>
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  <a class="el" href="a00279.html#ggaf647f7dbfbed8b1612675ab132cfa244a0cfd86a5b8b7110fac02e1304d33d218">kSRC_Wdog3ResetFlag</a> = SRC_SRSR_WDOG3_RST_B_MASK,
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<br/>
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  <a class="el" href="a00279.html#ggaf647f7dbfbed8b1612675ab132cfa244aac41e066587c8a4c8bc79348307a56b3">kSRC_JTAGSystemResetFlag</a>,
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<br/>
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  <a class="el" href="a00279.html#ggaf647f7dbfbed8b1612675ab132cfa244abc557d5e2e199f9727744af4b181602b">kSRC_JTAGSoftwareResetFlag</a> = SRC_SRSR_SJC_MASK,
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<br/>
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  <a class="el" href="a00279.html#ggaf647f7dbfbed8b1612675ab132cfa244a8a43d19a82614c4c1d571dad1f492628">kSRC_JTAGGeneratedResetFlag</a> = SRC_SRSR_JTAG_MASK,
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<br/>
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  <a class="el" href="a00279.html#ggaf647f7dbfbed8b1612675ab132cfa244abce52ce03031bdb1b0d76576daf418df">kSRC_WatchdogResetFlag</a> = SRC_SRSR_WDOG_MASK,
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<br/>
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  <a class="el" href="a00279.html#ggaf647f7dbfbed8b1612675ab132cfa244af8e87b67801dd22376d5b284722d02e3">kSRC_IppUserResetFlag</a> = SRC_SRSR_IPP_USER_RESET_B_MASK,
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<br/>
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  <a class="el" href="a00279.html#ggaf647f7dbfbed8b1612675ab132cfa244a3008203f1efa3b9385545f53445844fb">kSRC_CsuResetFlag</a> = SRC_SRSR_CSU_RESET_B_MASK,
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<br/>
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  <a class="el" href="a00279.html#ggaf647f7dbfbed8b1612675ab132cfa244a7aefc2a8dc90e667f7be06afc3efd4c0">kSRC_CoreLockupResetFlag</a> = SRC_SRSR_LOCKUP_MASK,
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<br/>
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  <a class="el" href="a00279.html#ggaf647f7dbfbed8b1612675ab132cfa244af7eba139e63dffc69983a262551a8856">kSRC_IppResetPinFlag</a> = SRC_SRSR_IPP_RESET_B_MASK
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<br/>
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}</td></tr>
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<tr class="memdesc:gaf647f7dbfbed8b1612675ab132cfa244"><td class="mdescLeft"> </td><td class="mdescRight">SRC reset status flags. <a href="a00279.html#gaf647f7dbfbed8b1612675ab132cfa244">More...</a><br/></td></tr>
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<tr class="separator:gaf647f7dbfbed8b1612675ab132cfa244"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9001fa7e0c13473ca9351c94866aab30"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00279.html#ga9001fa7e0c13473ca9351c94866aab30">_src_warm_reset_bypass_count</a> { <br/>
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  <a class="el" href="a00279.html#gga9001fa7e0c13473ca9351c94866aab30ae2e8afc71fab41ccbac78e6a8d69ff62">kSRC_WarmResetWaitAlways</a> = 0U,
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<br/>
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  <a class="el" href="a00279.html#gga9001fa7e0c13473ca9351c94866aab30ad20bc2e2d97c95046d65940f111e9584">kSRC_WarmResetWaitClk16</a> = 1U,
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<br/>
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  <a class="el" href="a00279.html#gga9001fa7e0c13473ca9351c94866aab30a8c3d2f6cd0c0f36da9a342e3c3eb77f8">kSRC_WarmResetWaitClk32</a> = 2U,
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<br/>
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  <a class="el" href="a00279.html#gga9001fa7e0c13473ca9351c94866aab30a5bbedec3e30404b252af1b02af0042c0">kSRC_WarmResetWaitClk64</a> = 3U
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<br/>
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}</td></tr>
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<tr class="memdesc:ga9001fa7e0c13473ca9351c94866aab30"><td class="mdescLeft"> </td><td class="mdescRight">Selection of WARM reset bypass count. <a href="a00279.html#ga9001fa7e0c13473ca9351c94866aab30">More...</a><br/></td></tr>
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<tr class="separator:ga9001fa7e0c13473ca9351c94866aab30"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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Functions</h2></td></tr>
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<tr class="memitem:ga1acc402410430b368530084805b022ac"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00279.html#ga1acc402410430b368530084805b022ac">SRC_EnableWDOG3Reset</a> (SRC_Type *base, bool enable)</td></tr>
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<tr class="memdesc:ga1acc402410430b368530084805b022ac"><td class="mdescLeft"> </td><td class="mdescRight">Enable the WDOG3 reset. <a href="#ga1acc402410430b368530084805b022ac">More...</a><br/></td></tr>
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<tr class="separator:ga1acc402410430b368530084805b022ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa00efe244ad4bf9f2b2fbf434adba463"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00279.html#gaa00efe244ad4bf9f2b2fbf434adba463">SRC_EnableCoreDebugResetAfterPowerGate</a> (SRC_Type *base, bool enable)</td></tr>
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<tr class="memdesc:gaa00efe244ad4bf9f2b2fbf434adba463"><td class="mdescLeft"> </td><td class="mdescRight">Debug reset would be asserted after power gating event. <a href="#gaa00efe244ad4bf9f2b2fbf434adba463">More...</a><br/></td></tr>
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<tr class="separator:gaa00efe244ad4bf9f2b2fbf434adba463"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga720bd353336716e97c2ed486f3f972e9"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00279.html#ga720bd353336716e97c2ed486f3f972e9">SRC_DoSoftwareResetARMCore0</a> (SRC_Type *base)</td></tr>
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<tr class="memdesc:ga720bd353336716e97c2ed486f3f972e9"><td class="mdescLeft"> </td><td class="mdescRight">Do software reset the ARM core0 only. <a href="#ga720bd353336716e97c2ed486f3f972e9">More...</a><br/></td></tr>
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<tr class="separator:ga720bd353336716e97c2ed486f3f972e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0893922f62b39cf97053d6909d2b6721"><td class="memItemLeft" align="right" valign="top">static bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00279.html#ga0893922f62b39cf97053d6909d2b6721">SRC_GetSoftwareResetARMCore0Done</a> (SRC_Type *base)</td></tr>
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<tr class="memdesc:ga0893922f62b39cf97053d6909d2b6721"><td class="mdescLeft"> </td><td class="mdescRight">Check if the software for ARM core0 is done. <a href="#ga0893922f62b39cf97053d6909d2b6721">More...</a><br/></td></tr>
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<tr class="separator:ga0893922f62b39cf97053d6909d2b6721"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac96321bdff82d5abc821d061323447df"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00279.html#gac96321bdff82d5abc821d061323447df">SRC_EnableWDOGReset</a> (SRC_Type *base, bool enable)</td></tr>
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<tr class="memdesc:gac96321bdff82d5abc821d061323447df"><td class="mdescLeft"> </td><td class="mdescRight">Enable the WDOG Reset in SRC. <a href="#gac96321bdff82d5abc821d061323447df">More...</a><br/></td></tr>
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<tr class="separator:gac96321bdff82d5abc821d061323447df"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae7bda7dc2533fc1f2a40b106b6f8d185"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00279.html#gae7bda7dc2533fc1f2a40b106b6f8d185">SRC_EnableLockupReset</a> (SRC_Type *base, bool enable)</td></tr>
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<tr class="memdesc:gae7bda7dc2533fc1f2a40b106b6f8d185"><td class="mdescLeft"> </td><td class="mdescRight">Enable the lockup reset. <a href="#gae7bda7dc2533fc1f2a40b106b6f8d185">More...</a><br/></td></tr>
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<tr class="separator:gae7bda7dc2533fc1f2a40b106b6f8d185"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga34abd9ece8bad43b617ced6e018af08c"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00279.html#ga34abd9ece8bad43b617ced6e018af08c">SRC_GetBootModeWord1</a> (SRC_Type *base)</td></tr>
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<tr class="memdesc:ga34abd9ece8bad43b617ced6e018af08c"><td class="mdescLeft"> </td><td class="mdescRight">Get the boot mode register 1 value. <a href="#ga34abd9ece8bad43b617ced6e018af08c">More...</a><br/></td></tr>
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<tr class="separator:ga34abd9ece8bad43b617ced6e018af08c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab850f1217901abfd78a35096a3b30d64"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00279.html#gab850f1217901abfd78a35096a3b30d64">SRC_GetBootModeWord2</a> (SRC_Type *base)</td></tr>
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<tr class="memdesc:gab850f1217901abfd78a35096a3b30d64"><td class="mdescLeft"> </td><td class="mdescRight">Get the boot mode register 2 value. <a href="#gab850f1217901abfd78a35096a3b30d64">More...</a><br/></td></tr>
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<tr class="separator:gab850f1217901abfd78a35096a3b30d64"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac15086ff9e2d490efc95b8a5577cbae6"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00279.html#gac15086ff9e2d490efc95b8a5577cbae6">SRC_GetResetStatusFlags</a> (SRC_Type *base)</td></tr>
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<tr class="memdesc:gac15086ff9e2d490efc95b8a5577cbae6"><td class="mdescLeft"> </td><td class="mdescRight">Get the status flags of SRC. <a href="#gac15086ff9e2d490efc95b8a5577cbae6">More...</a><br/></td></tr>
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<tr class="separator:gac15086ff9e2d490efc95b8a5577cbae6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga36d75f094528c8d5e37a77b4d45b617e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00279.html#ga36d75f094528c8d5e37a77b4d45b617e">SRC_ClearResetStatusFlags</a> (SRC_Type *base, uint32_t flags)</td></tr>
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<tr class="memdesc:ga36d75f094528c8d5e37a77b4d45b617e"><td class="mdescLeft"> </td><td class="mdescRight">Clear the status flags of SRC. <a href="#ga36d75f094528c8d5e37a77b4d45b617e">More...</a><br/></td></tr>
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<tr class="separator:ga36d75f094528c8d5e37a77b4d45b617e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8c2062f093d4a0d164354ac7a2f4b3e2"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00279.html#ga8c2062f093d4a0d164354ac7a2f4b3e2">SRC_SetGeneralPurposeRegister</a> (SRC_Type *base, uint32_t index, uint32_t value)</td></tr>
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<tr class="memdesc:ga8c2062f093d4a0d164354ac7a2f4b3e2"><td class="mdescLeft"> </td><td class="mdescRight">Set value to general purpose registers. <a href="#ga8c2062f093d4a0d164354ac7a2f4b3e2">More...</a><br/></td></tr>
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<tr class="separator:ga8c2062f093d4a0d164354ac7a2f4b3e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8c5e46dd8c4e1bd20aa737cfef532ab1"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00279.html#ga8c5e46dd8c4e1bd20aa737cfef532ab1">SRC_GetGeneralPurposeRegister</a> (SRC_Type *base, uint32_t index)</td></tr>
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<tr class="memdesc:ga8c5e46dd8c4e1bd20aa737cfef532ab1"><td class="mdescLeft"> </td><td class="mdescRight">Get the value from general purpose registers. <a href="#ga8c5e46dd8c4e1bd20aa737cfef532ab1">More...</a><br/></td></tr>
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<tr class="separator:ga8c5e46dd8c4e1bd20aa737cfef532ab1"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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Driver version</h2></td></tr>
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<tr class="memitem:gab27a1d7efba9d270e93527f1d2c54605"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00279.html#gab27a1d7efba9d270e93527f1d2c54605">FSL_SRC_DRIVER_VERSION</a>   (<a class="el" href="a00260.html#ga812138aa3315b0c6953c1a26130bcc37">MAKE_VERSION</a>(2, 0, 1))</td></tr>
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<tr class="memdesc:gab27a1d7efba9d270e93527f1d2c54605"><td class="mdescLeft"> </td><td class="mdescRight">SRC driver version 2.0.1. <a href="#gab27a1d7efba9d270e93527f1d2c54605">More...</a><br/></td></tr>
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<tr class="separator:gab27a1d7efba9d270e93527f1d2c54605"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<h2 class="groupheader">Macro Definition Documentation</h2>
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<a class="anchor" id="gab27a1d7efba9d270e93527f1d2c54605"></a>
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<td class="memname">#define FSL_SRC_DRIVER_VERSION   (<a class="el" href="a00260.html#ga812138aa3315b0c6953c1a26130bcc37">MAKE_VERSION</a>(2, 0, 1))</td>
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</tr>
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</table>
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</div><div class="memdoc">
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</div>
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</div>
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<h2 class="groupheader">Typedef Documentation</h2>
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<a class="anchor" id="ga8ab4968fbeb3aeff87002c5f04a79c12"></a>
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<td class="memname">typedef enum <a class="el" href="a00279.html#ga9001fa7e0c13473ca9351c94866aab30">_src_warm_reset_bypass_count</a> <a class="el" href="a00279.html#ga8ab4968fbeb3aeff87002c5f04a79c12">src_warm_reset_bypass_count_t</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>This type defines the 32KHz clock cycles to count before bypassing the MMDC acknowledge for WARM reset. If the MMDC acknowledge is not asserted before this counter is elapsed, a COLD reset will be initiated. </p>
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</div>
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</div>
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<h2 class="groupheader">Enumeration Type Documentation</h2>
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<a class="anchor" id="gaf647f7dbfbed8b1612675ab132cfa244"></a>
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<div class="memitem">
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<td class="memname">enum <a class="el" href="a00279.html#gaf647f7dbfbed8b1612675ab132cfa244">_src_reset_status_flags</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaf647f7dbfbed8b1612675ab132cfa244a35d666ccd943a593bc1af289e6233adb"></a>kSRC_TemperatureSensorResetFlag</em> </td><td class="fielddoc">
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<p>Indicates whether the reset was the result of software reset from on-chip Temperature Sensor. </p>
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<p>Temperature Sensor Interrupt needs to be served before this bit can be cleaned. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggaf647f7dbfbed8b1612675ab132cfa244a0cfd86a5b8b7110fac02e1304d33d218"></a>kSRC_Wdog3ResetFlag</em> </td><td class="fielddoc">
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<p>IC Watchdog3 Time-out reset. </p>
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<p>Indicates whether the reset was the result of the watchdog3 time-out event. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggaf647f7dbfbed8b1612675ab132cfa244aac41e066587c8a4c8bc79348307a56b3"></a>kSRC_JTAGSystemResetFlag</em> </td><td class="fielddoc">
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<p>Indicates whether the reset was the result of software reset form JTAG. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggaf647f7dbfbed8b1612675ab132cfa244abc557d5e2e199f9727744af4b181602b"></a>kSRC_JTAGSoftwareResetFlag</em> </td><td class="fielddoc">
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<p>Indicates whether the reset was the result of setting SJC_GPCCR bit 31. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggaf647f7dbfbed8b1612675ab132cfa244a8a43d19a82614c4c1d571dad1f492628"></a>kSRC_JTAGGeneratedResetFlag</em> </td><td class="fielddoc">
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<p>Indicates a reset has been caused by JTAG selection of certain IR codes: EXTEST or HIGHZ. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggaf647f7dbfbed8b1612675ab132cfa244abce52ce03031bdb1b0d76576daf418df"></a>kSRC_WatchdogResetFlag</em> </td><td class="fielddoc">
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<p>Indicates a reset has been caused by the watchdog timer timing out. </p>
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<p>This reset source can be blocked by disabling the watchdog. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggaf647f7dbfbed8b1612675ab132cfa244af8e87b67801dd22376d5b284722d02e3"></a>kSRC_IppUserResetFlag</em> </td><td class="fielddoc">
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<p>Indicates whether the reset was the result of the ipp_user_reset_b qualified reset. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggaf647f7dbfbed8b1612675ab132cfa244a3008203f1efa3b9385545f53445844fb"></a>kSRC_CsuResetFlag</em> </td><td class="fielddoc">
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<p>Indicates whether the reset was the result of the csu_reset_b input. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggaf647f7dbfbed8b1612675ab132cfa244a7aefc2a8dc90e667f7be06afc3efd4c0"></a>kSRC_CoreLockupResetFlag</em> </td><td class="fielddoc">
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<p>Indicates a reset has been caused by the ARM core indication of a LOCKUP event. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggaf647f7dbfbed8b1612675ab132cfa244af7eba139e63dffc69983a262551a8856"></a>kSRC_IppResetPinFlag</em> </td><td class="fielddoc">
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<p>Indicates whether reset was the result of ipp_reset_b pin (Power-up sequence). </p>
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</td></tr>
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</table>
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</div>
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</div>
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<a class="anchor" id="ga9001fa7e0c13473ca9351c94866aab30"></a>
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<tr>
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<td class="memname">enum <a class="el" href="a00279.html#ga9001fa7e0c13473ca9351c94866aab30">_src_warm_reset_bypass_count</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>This type defines the 32KHz clock cycles to count before bypassing the MMDC acknowledge for WARM reset. If the MMDC acknowledge is not asserted before this counter is elapsed, a COLD reset will be initiated. </p>
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga9001fa7e0c13473ca9351c94866aab30ae2e8afc71fab41ccbac78e6a8d69ff62"></a>kSRC_WarmResetWaitAlways</em> </td><td class="fielddoc">
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<p>System will wait until MMDC acknowledge is asserted. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga9001fa7e0c13473ca9351c94866aab30ad20bc2e2d97c95046d65940f111e9584"></a>kSRC_WarmResetWaitClk16</em> </td><td class="fielddoc">
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<p>Wait 16 32KHz clock cycles before switching the reset. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga9001fa7e0c13473ca9351c94866aab30a8c3d2f6cd0c0f36da9a342e3c3eb77f8"></a>kSRC_WarmResetWaitClk32</em> </td><td class="fielddoc">
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<p>Wait 32 32KHz clock cycles before switching the reset. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga9001fa7e0c13473ca9351c94866aab30a5bbedec3e30404b252af1b02af0042c0"></a>kSRC_WarmResetWaitClk64</em> </td><td class="fielddoc">
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<p>Wait 64 32KHz clock cycles before switching the reset. </p>
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</td></tr>
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</table>
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</div>
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</div>
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<h2 class="groupheader">Function Documentation</h2>
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<td class="memname">static void SRC_EnableWDOG3Reset </td>
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<td>(</td>
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<td class="paramtype">SRC_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">bool </td>
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<td class="paramname"><em>enable</em> </td>
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<td></td>
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<td>)</td>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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<p>The WDOG3 reset is enabled by default.</p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>SRC peripheral base address. </td></tr>
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<tr><td class="paramname">enable</td><td>Enable the reset or not. </td></tr>
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</table>
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</dd>
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</dl>
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<td class="memname">static void SRC_EnableCoreDebugResetAfterPowerGate </td>
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<td>(</td>
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<td class="paramtype">SRC_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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<td class="paramkey"></td>
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<td class="paramtype">bool </td>
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<td class="paramname"><em>enable</em> </td>
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<td>)</td>
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</td>
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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<dl class="params"><dt>Parameters</dt><dd>
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<tr><td class="paramname">base</td><td>SRC peripheral base address. </td></tr>
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<tr><td class="paramname">enable</td><td>Enable the reset or not. </td></tr>
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</table>
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</dd>
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</dl>
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<td class="memname">static void SRC_DoSoftwareResetARMCore0 </td>
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<td>(</td>
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<td class="paramtype">SRC_Type * </td>
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<td class="paramname"><em>base</em></td><td>)</td>
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<td></td>
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</td>
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>SRC peripheral base address. </td></tr>
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</table>
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<td class="memname">static bool SRC_GetSoftwareResetARMCore0Done </td>
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<td>(</td>
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<td class="paramtype">SRC_Type * </td>
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<td class="paramname"><em>base</em></td><td>)</td>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>SRC peripheral base address. </td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>If the reset is done. </dd></dl>
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<td class="memname">static void SRC_EnableWDOGReset </td>
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<td>(</td>
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<td class="paramtype">SRC_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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<td class="paramkey"></td>
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<td class="paramname"><em>enable</em> </td>
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<p>WDOG Reset is enabled in SRC by default. If the WDOG event to SRC is masked, it would not create a reset to the chip. During the time the WDOG event is masked, when the WDOG event flag is asserted, it would remain asserted regardless of servicing the WDOG module. The only way to clear that bit is the hardware reset.</p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>SRC peripheral base address. </td></tr>
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<tr><td class="paramname">enable</td><td>Enable the reset or not. </td></tr>
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<td class="memname">static void SRC_EnableLockupReset </td>
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<td>(</td>
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<td class="paramname"><em>base</em>, </td>
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<td class="paramkey"></td>
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<dl class="params"><dt>Parameters</dt><dd>
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<tr><td class="paramname">base</td><td>SRC peripheral base address. </td></tr>
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<tr><td class="paramname">enable</td><td>Enable the reset or not. </td></tr>
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<td class="memname">static uint32_t SRC_GetBootModeWord1 </td>
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<td>(</td>
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<p>The Boot Mode register contains bits that reflect the status of BOOT_CFGx pins of the chip. See to chip-specific document for detail information about value.</p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>SRC peripheral base address. </td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>status of BOOT_CFGx pins of the chip. </dd></dl>
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</div>
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<a class="anchor" id="gab850f1217901abfd78a35096a3b30d64"></a>
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<td class="mlabels-left">
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<table class="memname">
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<td class="memname">static uint32_t SRC_GetBootModeWord2 </td>
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<td>(</td>
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<td class="paramtype">SRC_Type * </td>
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<td class="paramname"><em>base</em></td><td>)</td>
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<td></td>
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</tr>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</div><div class="memdoc">
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<p>The Boot Mode register contains bits that reflect the status of BOOT_MODEx Pins and fuse values that controls boot of the chip. See to chip-specific document for detail information about value.</p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>SRC peripheral base address. </td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>status of BOOT_MODEx Pins and fuse values that controls boot of the chip. </dd></dl>
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</div>
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</div>
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<a class="anchor" id="gac15086ff9e2d490efc95b8a5577cbae6"></a>
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<td class="mlabels-left">
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<td class="memname">static uint32_t SRC_GetResetStatusFlags </td>
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<td>(</td>
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<td class="paramtype">SRC_Type * </td>
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<td class="paramname"><em>base</em></td><td>)</td>
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<td></td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>SRC peripheral base address. </td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>Mask value of status flags, see to <a class="el" href="a00279.html#gaf647f7dbfbed8b1612675ab132cfa244" title="SRC reset status flags. ">_src_reset_status_flags</a>. </dd></dl>
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<a class="anchor" id="ga36d75f094528c8d5e37a77b4d45b617e"></a>
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<div class="memitem">
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<td class="memname">void SRC_ClearResetStatusFlags </td>
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<td>(</td>
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<td class="paramtype">SRC_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
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<td class="paramname"><em>flags</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>SRC peripheral base address. </td></tr>
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<tr><td class="paramname">flags</td><td>value of status flags to be cleared, see to <a class="el" href="a00279.html#gaf647f7dbfbed8b1612675ab132cfa244" title="SRC reset status flags. ">_src_reset_status_flags</a>. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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</div>
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<a class="anchor" id="ga8c2062f093d4a0d164354ac7a2f4b3e2"></a>
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<div class="memitem">
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<td class="mlabels-left">
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<td class="memname">static void SRC_SetGeneralPurposeRegister </td>
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<td>(</td>
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<td class="paramtype">SRC_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
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<td class="paramname"><em>index</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
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<td class="paramname"><em>value</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>General purpose registers (GPRx) would hold the value during reset process. Wakeup function could be kept in these register. For example, the GPR1 holds the entry function for waking-up from Partial SLEEP mode while the GPR2 holds the argument. Other GPRx register would store the arbitray values.</p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
|
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<tr><td class="paramname">base</td><td>SRC peripheral base address. </td></tr>
|
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<tr><td class="paramname">index</td><td>The index of GPRx register array. Note index 0 reponses the GPR1 register. </td></tr>
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<tr><td class="paramname">value</td><td>Setting value for GPRx register. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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</div>
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<a class="anchor" id="ga8c5e46dd8c4e1bd20aa737cfef532ab1"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="mlabels">
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<tr>
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<td class="mlabels-left">
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<table class="memname">
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<tr>
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<td class="memname">static uint32_t SRC_GetGeneralPurposeRegister </td>
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<td>(</td>
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<td class="paramtype">SRC_Type * </td>
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<td class="paramname"><em>base</em>, </td>
|
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</tr>
|
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<tr>
|
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<td class="paramkey"></td>
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<td></td>
|
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<td class="paramtype">uint32_t </td>
|
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<td class="paramname"><em>index</em> </td>
|
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SRC peripheral base address. </td></tr>
|
|
<tr><td class="paramname">index</td><td>The index of GPRx register array. Note index 0 reponses the GPR1 register. </td></tr>
|
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</table>
|
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</dd>
|
|
</dl>
|
|
<dl class="section return"><dt>Returns</dt><dd>The setting value for GPRx register. </dd></dl>
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</div>
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</div>
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