MCUXpresso_MIMXRT1021xxxxx/boards/evkmimxrt1020/driver_examples/pit/pit.c
2022-08-23 23:00:33 +08:00

109 lines
3.2 KiB
C

/*
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2019 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include "fsl_debug_console.h"
#include "pin_mux.h"
#include "clock_config.h"
#include "board.h"
#include "fsl_pit.h"
/*******************************************************************************
* Definitions
******************************************************************************/
#define DEMO_PIT_BASEADDR PIT
#define DEMO_PIT_CHANNEL kPIT_Chnl_0
#define PIT_LED_HANDLER PIT_IRQHandler
#define PIT_IRQ_ID PIT_IRQn
/* Get source clock for PIT driver */
#define PIT_SOURCE_CLOCK CLOCK_GetFreq(kCLOCK_OscClk)
#define LED_INIT() USER_LED_INIT(LOGIC_LED_OFF)
#define LED_TOGGLE() USER_LED_TOGGLE()
/*******************************************************************************
* Prototypes
******************************************************************************/
/*******************************************************************************
* Variables
******************************************************************************/
volatile bool pitIsrFlag = false;
/*******************************************************************************
* Code
******************************************************************************/
void PIT_LED_HANDLER(void)
{
/* Clear interrupt flag.*/
PIT_ClearStatusFlags(DEMO_PIT_BASEADDR, DEMO_PIT_CHANNEL, kPIT_TimerFlag);
pitIsrFlag = true;
/* Added for, and affects, all PIT handlers. For CPU clock which is much larger than the IP bus clock,
* CPU can run out of the interrupt handler before the interrupt flag being cleared, resulting in the
* CPU's entering the handler again and again. Adding DSB can prevent the issue from happening.
*/
__DSB();
}
/*!
* @brief Main function
*/
int main(void)
{
/* Structure of initialize PIT */
pit_config_t pitConfig;
/* Board pin, clock, debug console init */
BOARD_ConfigMPU();
BOARD_InitBootPins();
BOARD_InitBootClocks();
BOARD_InitDebugConsole();
/* Enable clock gate for GPIO1 */
CLOCK_EnableClock(kCLOCK_Gpio1);
/* Set PERCLK_CLK source to OSC_CLK*/
CLOCK_SetMux(kCLOCK_PerclkMux, 1U);
/* Set PERCLK_CLK divider to 1 */
CLOCK_SetDiv(kCLOCK_PerclkDiv, 0U);
/* Initialize and enable LED */
LED_INIT();
/*
* pitConfig.enableRunInDebug = false;
*/
PIT_GetDefaultConfig(&pitConfig);
/* Init pit module */
PIT_Init(DEMO_PIT_BASEADDR, &pitConfig);
/* Set timer period for channel 0 */
PIT_SetTimerPeriod(DEMO_PIT_BASEADDR, DEMO_PIT_CHANNEL, USEC_TO_COUNT(1000000U, PIT_SOURCE_CLOCK));
/* Enable timer interrupts for channel 0 */
PIT_EnableInterrupts(DEMO_PIT_BASEADDR, DEMO_PIT_CHANNEL, kPIT_TimerInterruptEnable);
/* Enable at the NVIC */
EnableIRQ(PIT_IRQ_ID);
/* Start channel 0 */
PRINTF("\r\nStarting channel No.0 ...");
PIT_StartTimer(DEMO_PIT_BASEADDR, DEMO_PIT_CHANNEL);
while (true)
{
/* Check whether occur interupt and toggle LED */
if (true == pitIsrFlag)
{
PRINTF("\r\n Channel No.0 interrupt is occurred !");
LED_TOGGLE();
pitIsrFlag = false;
}
}
}