105 lines
3.2 KiB
C
105 lines
3.2 KiB
C
/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "pin_mux.h"
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#include "clock_config.h"
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#include "board.h"
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#include "fsl_pit.h"
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#include "fsl_xbara.h"
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#include "fsl_debug_console.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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#define DEMO_XBARA_USER_CHANNEL_INPUT kXBARA1_InputPitTrigger0
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#define DEMO_XBARA_USER_CHANNEL_OUTPUT kXBARA1_OutputDmaChMuxReq30
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#define BUS_CLK_FREQ CLOCK_GetFreq(kCLOCK_OscClk)
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#define DEMO_XBARA_BASEADDR XBARA
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#define DEMO_PIT_BASEADDR PIT
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#define DEMO_XBARA_IRQn XBAR1_IRQ_0_1_IRQn
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#define DEMO_XBARA_IRQHandler XBAR1_IRQ_0_1_IRQHandler
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#define PIT_CHANNEL kPIT_Chnl_0
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#define PIT_PERIOD 1000000U
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*******************************************************************************
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* Variables
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******************************************************************************/
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volatile bool xbaraIsrFlag = false;
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/*******************************************************************************
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* Code
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******************************************************************************/
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void DEMO_XBARA_IRQHandler(void)
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{
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if (XBARA_GetStatusFlags(DEMO_XBARA_BASEADDR) & kXBARA_EdgeDetectionOut0)
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{
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/* Clear interrupt flag. */
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XBARA_ClearStatusFlags(DEMO_XBARA_BASEADDR, kXBARA_EdgeDetectionOut0);
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xbaraIsrFlag = true;
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}
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SDK_ISR_EXIT_BARRIER;
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}
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/*!
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* @brief Main function
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*/
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int main(void)
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{
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/* Structure of initialize XBARA. */
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xbara_control_config_t xbaraConfig;
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/* Structure of initialize PIT. */
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pit_config_t pitConfig;
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pitConfig.enableRunInDebug = false;
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/* Init board hardware. */
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BOARD_InitBootPins();
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BOARD_InitBootClocks();
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BOARD_InitDebugConsole();
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PRINTF("\r\nXBARA Peripheral Driver Example.");
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/* Init pit module. */
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PIT_Init(DEMO_PIT_BASEADDR, &pitConfig);
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/* Set timer period for channels using. */
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PIT_SetTimerPeriod(DEMO_PIT_BASEADDR, PIT_CHANNEL, USEC_TO_COUNT(PIT_PERIOD, BUS_CLK_FREQ));
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/* Start channel using. */
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PIT_StartTimer(DEMO_PIT_BASEADDR, PIT_CHANNEL);
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/* Init xbara module. */
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XBARA_Init(DEMO_XBARA_BASEADDR);
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/* Configure the XBARA signal connections. */
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XBARA_SetSignalsConnection(DEMO_XBARA_BASEADDR, DEMO_XBARA_USER_CHANNEL_INPUT, DEMO_XBARA_USER_CHANNEL_OUTPUT);
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/* Configure the XBARA interrupt. */
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xbaraConfig.activeEdge = kXBARA_EdgeRising;
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xbaraConfig.requestType = kXBARA_RequestInterruptEnalbe;
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XBARA_SetOutputSignalConfig(DEMO_XBARA_BASEADDR, DEMO_XBARA_USER_CHANNEL_OUTPUT, &xbaraConfig);
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/* Enable at the NVIC. */
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EnableIRQ(DEMO_XBARA_IRQn);
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while (true)
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{
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if (true == xbaraIsrFlag)
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{
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PRINTF("\r\nXBARA interrupt is occurred !");
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xbaraIsrFlag = false;
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}
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}
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}
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