MCUXpresso_MIMXRT1052xxxxB/boards/evkbimxrt1050/aws_examples/ota_demo_enet/pin_mux.h
Yilin Sun 6baf4427ce
Updated to v2.15.000
Signed-off-by: Yilin Sun <imi415@imi.moe>
2024-03-18 23:15:10 +08:00

93 lines
4.0 KiB
C

/*
* Copyright 2017-2023 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _PIN_MUX_H_
#define _PIN_MUX_H_
/***********************************************************************************************************************
* Definitions
**********************************************************************************************************************/
/*! @brief Direction type */
typedef enum _pin_mux_direction
{
kPIN_MUX_DirectionInput = 0U, /* Input direction */
kPIN_MUX_DirectionOutput = 1U, /* Output direction */
kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */
} pin_mux_direction_t;
/*!
* @addtogroup pin_mux
* @{
*/
/***********************************************************************************************************************
* API
**********************************************************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif
/*!
* @brief Calls initialization functions.
*
*/
void BOARD_InitBootPins(void);
/* GPIO_AD_B0_09 (coord F14), PHY_RESET */
/* Routed pin properties */
#define BOARD_INITPINS_PHY_RESET_PERIPHERAL GPIO1 /*!< Peripheral name */
#define BOARD_INITPINS_PHY_RESET_SIGNAL gpio_io /*!< Signal name */
#define BOARD_INITPINS_PHY_RESET_CHANNEL 9U /*!< Signal channel */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_PHY_RESET_GPIO GPIO1 /*!< GPIO peripheral base pointer */
#define BOARD_INITPINS_PHY_RESET_GPIO_PIN 9U /*!< GPIO pin number */
#define BOARD_INITPINS_PHY_RESET_GPIO_PIN_MASK (1U << 9U) /*!< GPIO pin mask */
#define BOARD_INITPINS_PHY_RESET_PORT GPIO1 /*!< PORT peripheral base pointer */
#define BOARD_INITPINS_PHY_RESET_PIN 9U /*!< PORT pin number */
#define BOARD_INITPINS_PHY_RESET_PIN_MASK (1U << 9U) /*!< PORT pin mask */
/* GPIO_AD_B0_10 (coord G13), PHY_INTR */
/* Routed pin properties */
#define BOARD_INITPINS_PHY_INTR_PERIPHERAL GPIO1 /*!< Peripheral name */
#define BOARD_INITPINS_PHY_INTR_SIGNAL gpio_io /*!< Signal name */
#define BOARD_INITPINS_PHY_INTR_CHANNEL 10U /*!< Signal channel */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_PHY_INTR_GPIO GPIO1 /*!< GPIO peripheral base pointer */
#define BOARD_INITPINS_PHY_INTR_GPIO_PIN 10U /*!< GPIO pin number */
#define BOARD_INITPINS_PHY_INTR_GPIO_PIN_MASK (1U << 10U) /*!< GPIO pin mask */
#define BOARD_INITPINS_PHY_INTR_PORT GPIO1 /*!< PORT peripheral base pointer */
#define BOARD_INITPINS_PHY_INTR_PIN 10U /*!< PORT pin number */
#define BOARD_INITPINS_PHY_INTR_PIN_MASK (1U << 10U) /*!< PORT pin mask */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitPins(void);
#if defined(__cplusplus)
}
#endif
/*!
* @}
*/
#endif /* _PIN_MUX_H_ */
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/