48 lines
1.4 KiB
C
48 lines
1.4 KiB
C
/*
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* Copyright 2019 NXP
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* All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _APP_H_
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#define _APP_H_
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*${macro:start}*/
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#define EXAMPLE_FLEXSPI FLEXSPI
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#define FLASH_SIZE 0x2000 /* 64Mb/KByte */
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#define EXAMPLE_FLEXSPI_AMBA_BASE FlexSPI_AMBA_BASE
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#define FLASH_PAGE_SIZE 256
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#define NOR_FLASH_START_ADDRESS (20U * 0x1000U)
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#define EXAMPLE_FLEXSPI_CLOCK kCLOCK_FlexSpi
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#define CACHE_MAINTAIN 0x01U
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#if defined(CACHE_MAINTAIN) && CACHE_MAINTAIN
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#include "fsl_cache.h"
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#endif
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/*${macro:end}*/
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*${prototype:start}*/
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void BOARD_InitHardware(void);
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static inline void FLEXSPI_ClockInit(void)
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{
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const clock_usb_pll_config_t g_ccmConfigUsbPll = {.loopDivider = 0U};
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CLOCK_InitUsb1Pll(&g_ccmConfigUsbPll);
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CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 24); /* Set PLL3 PFD0 clock 360MHZ. */
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CLOCK_SetMux(kCLOCK_FlexspiMux, 0x3); /* Choose PLL3 PFD0 clock as flexspi source clock. */
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CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2); /* flexspi clock 120M. */
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}
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/*${prototype:end}*/
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#endif /* _APP_H_ */
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