114 lines
4.5 KiB
C
114 lines
4.5 KiB
C
/*
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* Copyright 2021 NXP
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* All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __SERIAL_PORT_SPI_H__
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#define __SERIAL_PORT_SPI_H__
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#include "fsl_adapter_spi.h"
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/*!
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* @addtogroup serial_port_uart
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* @ingroup serialmanager
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @brief serial port uart handle size*/
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#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
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#if (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
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#define SERIAL_PORT_SPI_MASTER_HANDLE_SIZE (36U + HAL_SPI_MASTER_HANDLE_SIZE + HAL_SPI_MASTER_DMA_HANDLE_SIZE)
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#else
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#define SERIAL_PORT_SPI_MASTER_HANDLE_SIZE (36U + HAL_SPI_MASTER_HANDLE_SIZE)
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#endif
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#else
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#define SERIAL_PORT_SPI_MASTER_HANDLE_SIZE (HAL_SPI_MASTER_HANDLE_SIZE)
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#endif
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#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
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#if (defined(HAL_SPI_SLAVE_DMA_ENABLE) && (HAL_SPI_SLAVE_DMA_ENABLE > 0U))
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#define SERIAL_PORT_SPI_SLAVE_HANDLE_SIZE (36U + HAL_SPI_SLAVE_HANDLE_SIZE + HAL_SPI_SLAVE_DMA_HANDLE_SIZE)
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#else
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#define SERIAL_PORT_SPI_SLAVE_HANDLE_SIZE (36U + HAL_SPI_SLAVE_HANDLE_SIZE)
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#endif
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#else
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#define SERIAL_PORT_SPI_SLAVE_HANDLE_SIZE (HAL_SPI_SLAVE_HANDLE_SIZE)
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#endif
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#ifndef SERIAL_USE_CONFIGURE_STRUCTURE
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#define SERIAL_USE_CONFIGURE_STRUCTURE (0U) /*!< Enable or disable the confgure structure pointer */
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#endif
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/*! @brief spi clock polarity configuration.*/
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typedef enum _serial_spi_clock_polarity
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{
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kSerial_SpiClockPolarityActiveHigh = 0x0U, /*!< Active-high spi clock (idles low). */
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kSerial_SpiClockPolarityActiveLow /*!< Active-low spi clock (idles high). */
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} serial_spi_clock_polarity_t;
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/*! @brief spi clock phase configuration.*/
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typedef enum _serial_spi_clock_phase
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{
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kSerial_SpiClockPhaseFirstEdge = 0x0U, /*!< First edge on SPSCK occurs at the middle of the first
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* cycle of a data transfer. */
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kSerial_SpiClockPhaseSecondEdge /*!< First edge on SPSCK occurs at the start of the
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* first cycle of a data transfer. */
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} serial_spi_clock_phase_t;
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/*! @brief spi data shifter direction options.*/
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typedef enum _serial_spi_shift_direction
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{
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kSerial_SpiMsbFirst = 0x0U, /*!< Data transfers start with most significant bit. */
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kSerial_SpiLsbFirst /*!< Data transfers start with least significant bit. */
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} serial_spi_shift_direction_t;
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/*! @brief spi master user configure structure.*/
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typedef struct _serial_spi_master_config
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{
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uint32_t srcClock_Hz; /*!< Clock source for spi in Hz */
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uint32_t baudRate_Bps; /*!< Baud Rate for spi in Hz */
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serial_spi_clock_polarity_t polarity; /*!< Clock polarity */
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serial_spi_clock_phase_t phase; /*!< Clock phase */
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serial_spi_shift_direction_t direction; /*!< MSB or LSB */
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uint8_t instance; /*!< Instance of the spi */
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bool enableMaster; /*!< Enable spi at initialization time */
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uint32_t configFlags; /*!< Transfer config Flags */
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#if (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
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bool enableDMA; /*!< Enable DMA at initialization time */
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void *dmaConfig; /*!< DMA configure pointer */
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#endif
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} serial_spi_master_config_t;
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/*! @brief spi slave user configure structure.*/
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typedef struct _serial_spi_slave_config
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{
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hal_spi_clock_polarity_t polarity; /*!< Clock polarity */
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hal_spi_clock_phase_t phase; /*!< Clock phase */
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hal_spi_shift_direction_t direction; /*!< MSB or LSB */
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uint8_t instance; /*!< Instance of the spi */
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bool enableSlave; /*!< Enable spi at initialization time */
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uint32_t configFlags; /*!< Transfer config Flags */
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#if (defined(HAL_SPI_SLAVE_DMA_ENABLE) && (HAL_SPI_SLAVE_DMA_ENABLE > 0U))
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bool enableDMA; /*!< Enable DMA at initialization time */
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void *dmaConfig; /*!< DMA configure pointer */
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#endif
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} serial_spi_slave_config_t;
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/*! @brief spi transfer structure */
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typedef struct _serial_spi_transfer
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{
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uint8_t *txData; /*!< Send buffer */
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uint8_t *rxData; /*!< Receive buffer */
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size_t dataSize; /*!< Transfer bytes */
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uint32_t flags; /*!< spi control flag.*/
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} serial_spi_transfer_t;
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/*! @} */
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#endif /* __SERIAL_PORT_SPI_H__ */
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