84 lines
3.4 KiB
C
84 lines
3.4 KiB
C
/*
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* Copyright (c) 2015 - 2016, Freescale Semiconductor, Inc.
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* Copyright 2016 - 2018 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __SERIAL_PORT_USB_H__
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#define __SERIAL_PORT_USB_H__
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#if defined(SDK_OS_FREE_RTOS)
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#include "FreeRTOS.h"
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#endif
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/*!
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* @addtogroup serial_port_usb
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* @ingroup serialmanager
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @brief serial port usb handle size*/
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#define SERIAL_PORT_USB_CDC_HANDLE_SIZE (72U)
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/*! @brief USB interrupt priority*/
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#if defined(__GIC_PRIO_BITS)
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#ifndef USB_DEVICE_INTERRUPT_PRIORITY
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#define USB_DEVICE_INTERRUPT_PRIORITY (25U)
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#endif
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#else
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#if defined(configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY)
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#ifndef USB_DEVICE_INTERRUPT_PRIORITY
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#define USB_DEVICE_INTERRUPT_PRIORITY (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY)
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#endif
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#else
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/* The default value 3 is used to support different ARM Core, such as CM0P, CM4, CM7, and CM33, etc.
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* The minimum number of priority bits implemented in the NVIC is 2 on these SOCs. The value of mininum
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* priority is 3 (2^2 - 1). So, the default value is 3.
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*/
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#ifndef USB_DEVICE_INTERRUPT_PRIORITY
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#define USB_DEVICE_INTERRUPT_PRIORITY (3U)
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#endif
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#endif
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#endif
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/*! @brief USB controller ID */
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typedef enum _serial_port_usb_cdc_controller_index
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{
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kSerialManager_UsbControllerKhci0 = 0U, /*!< KHCI 0U */
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kSerialManager_UsbControllerKhci1 = 1U, /*!< KHCI 1U, Currently, there are no platforms which have two KHCI IPs,
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this is reserved to be used in the future. */
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kSerialManager_UsbControllerEhci0 = 2U, /*!< EHCI 0U */
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kSerialManager_UsbControllerEhci1 = 3U, /*!< EHCI 1U, Currently, there are no platforms which have two EHCI IPs,
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this is reserved to be used in the future. */
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kSerialManager_UsbControllerLpcIp3511Fs0 = 4U, /*!< LPC USB IP3511 FS controller 0 */
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kSerialManager_UsbControllerLpcIp3511Fs1 = 5U, /*!< LPC USB IP3511 FS controller 1, there are no platforms which
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have two IP3511 IPs, this is reserved to be used in the future. */
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kSerialManager_UsbControllerLpcIp3511Hs0 = 6U, /*!< LPC USB IP3511 HS controller 0 */
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kSerialManager_UsbControllerLpcIp3511Hs1 = 7U, /*!< LPC USB IP3511 HS controller 1, there are no platforms which
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have two IP3511 IPs, this is reserved to be used in the future. */
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kSerialManager_UsbControllerOhci0 = 8U, /*!< OHCI 0U */
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kSerialManager_UsbControllerOhci1 = 9U, /*!< OHCI 1U, Currently, there are no platforms which have two OHCI IPs,
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this is reserved to be used in the future. */
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kSerialManager_UsbControllerIp3516Hs0 = 10U, /*!< IP3516HS 0U */
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kSerialManager_UsbControllerIp3516Hs1 = 11U, /*!< IP3516HS 1U, Currently, there are no platforms which have two
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IP3516HS IPs, this is reserved to be used in the future. */
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} serial_port_usb_cdc_controller_index_t;
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/*! @brief serial port usb config struct*/
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typedef struct _serial_port_usb_cdc_config
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{
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serial_port_usb_cdc_controller_index_t controllerIndex; /*!< controller index */
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} serial_port_usb_cdc_config_t;
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/*! @} */
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#endif /* __SERIAL_PORT_USB_H__ */
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