646 lines
22 KiB
C
646 lines
22 KiB
C
/*
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* Copyright (c) 2013-2016 ARM Limited. All rights reserved.
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* Copyright (c) 2016, Freescale Semiconductor, Inc. Not a Contribution.
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* Copyright 2016-2021, 2023 NXP. Not a Contribution.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "fsl_enet_cmsis.h"
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.enet_cmsis"
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#endif
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#define ARM_ETH_MAC_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2, 3)
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/* Define the alignment macro. */
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#if defined(FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL) && FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL
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#if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE) && \
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((!defined(FSL_SDK_DISBLE_L2CACHE_PRESENT)) || (FSL_SDK_DISBLE_L2CACHE_PRESENT == 0))
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#define CMSIS_CACHE_LINESIZE_MAX MAX(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE, FSL_FEATURE_L2CACHE_LINESIZE_BYTE)
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#define CMSIS_ENET_BUFF_ALIGNMENT MAX(ENET_BUFF_ALIGNMENT, CMSIS_CACHE_LINESIZE_MAX)
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#elif defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
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#define CMSIS_ENET_BUFF_ALIGNMENT MAX(ENET_BUFF_ALIGNMENT, FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
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#endif
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#else
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#define CMSIS_ENET_BUFF_ALIGNMENT ENET_BUFF_ALIGNMENT
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#endif
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/* Define the ENET buffer information. */
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#define ENET_RXBD_NUM (4)
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#define ENET_TXBD_NUM (4)
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#define ENET_RXBUFF_SIZE (ENET_FRAME_MAX_FRAMELEN)
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#define ENET_TXBUFF_SIZE (ENET_FRAME_MAX_FRAMELEN)
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/* Define the timeout macro. */
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#define ENET_SMI_TIMEOUT_COUNT 0xffff
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typedef struct _cmsis_enet_mac_driver_state
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{
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cmsis_enet_mac_resource_t *resource; /*!< Basic enet resource. */
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enet_handle_t *handle; /*!< ENET handler. */
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enet_buffer_config_t *buffers; /*!< Buffers res*/
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ARM_ETH_MAC_SignalEvent_t cb_event; /*!< Callback function. */
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volatile enet_tx_bd_struct_t *txBdTs; /*!< Tx timestamp index. */
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uint8_t flags; /*!< Control and state flags. */
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} cmsis_enet_mac_driver_state_t;
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static const ARM_DRIVER_VERSION s_enetDriverVersion = {ARM_ETH_MAC_API_VERSION, ARM_ETH_MAC_DRV_VERSION};
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/* Driver Capabilities */
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static const ARM_ETH_MAC_CAPABILITIES s_enetDriverCapabilities = {
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0, /* checksum_offload_rx_ip4 */
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0, /* checksum_offload_rx_ip6 */
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0, /* checksum_offload_rx_udp */
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0, /* checksum_offload_rx_tcp */
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0, /* checksum_offload_rx_icmp */
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0, /* checksum_offload_tx_ip4 */
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0, /* checksum_offload_tx_ip6 */
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0, /* checksum_offload_tx_udp */
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0, /* checksum_offload_tx_tcp */
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0, /* checksum_offload_tx_icmp */
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(RTE_ENET_RMII) ? ARM_ETH_INTERFACE_RMII : ARM_ETH_INTERFACE_MII, /* media_interface */
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0, /* mac_address */
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1, /* event_rx_frame */
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1, /* event_tx_frame */
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1, /* event_wakeup */
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0 /* precision_timer */
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};
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static ARM_DRIVER_VERSION ENETx_GetVersion(void)
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{
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return s_enetDriverVersion;
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}
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static ARM_ETH_MAC_CAPABILITIES ENETx_GetCapabilities(void)
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{
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return s_enetDriverCapabilities;
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}
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static int32_t ENET_CommonInitialize(ARM_ETH_MAC_SignalEvent_t cb_event, cmsis_enet_mac_driver_state_t *enet)
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{
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if ((enet->flags & ENET_FLAG_INIT) == 0U)
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{
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enet->cb_event = cb_event;
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enet->flags = ENET_FLAG_INIT;
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}
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return ARM_DRIVER_OK;
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}
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static void ENET_SetInterruptCallback(ENET_Type *base,
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enet_handle_t *handle,
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#if FSL_FEATURE_ENET_QUEUE > 1
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uint32_t ringId,
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#endif
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enet_event_t event,
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enet_frame_info_t *frameInfo,
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void *userData)
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{
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uint32_t newEvent;
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switch (event)
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{
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case kENET_RxEvent:
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newEvent = ARM_ETH_MAC_EVENT_RX_FRAME;
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break;
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case kENET_TxEvent:
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newEvent = ARM_ETH_MAC_EVENT_TX_FRAME;
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break;
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case kENET_WakeUpEvent:
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newEvent = ARM_ETH_MAC_EVENT_WAKEUP;
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break;
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case kENET_TimeStampEvent:
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newEvent = ARM_ETH_MAC_EVENT_TIMER_ALARM;
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break;
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default:
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newEvent = ETH_MAC_EVENT_OTHERS;
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break;
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}
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/* User data is actually CMSIS driver callback. */
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if (userData != NULL)
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{
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((ARM_ETH_MAC_SignalEvent_t)userData)(newEvent);
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}
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}
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static int32_t ENET_CommonUninitialize(cmsis_enet_mac_driver_state_t *enet)
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{
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enet->flags = ENET_FLAG_UNINIT;
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return ARM_DRIVER_OK;
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}
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static int32_t ENET_CommonControl(uint32_t control, uint32_t arg, cmsis_enet_mac_driver_state_t *enet)
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{
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int32_t result = ARM_DRIVER_OK;
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if (enet->flags == ENET_FLAG_UNINIT)
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{
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return ARM_DRIVER_ERROR;
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}
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switch (control)
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{
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case (uint32_t)ARM_ETH_MAC_CONFIGURE:
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{
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uint32_t rcr = enet->resource->base->RCR;
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uint32_t tcr = enet->resource->base->TCR;
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#if defined(FSL_FEATURE_ENET_HAS_AVB) && FSL_FEATURE_ENET_HAS_AVB
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uint32_t ecr = enet->resource->base->ECR;
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if (FSL_FEATURE_ENET_INSTANCE_HAS_AVBn(enet->resource->base) > 0)
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{
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ecr &= ~ENET_ECR_SPEED_MASK;
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}
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#endif /* FSL_FEATURE_ENET_HAS_AVB */
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switch (arg & (uint32_t)ARM_ETH_MAC_SPEED_Msk)
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{
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case (uint32_t)ARM_ETH_MAC_SPEED_10M:
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rcr |= ENET_RCR_RMII_10T_MASK;
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break;
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case (uint32_t)ARM_ETH_MAC_SPEED_100M:
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rcr &= ~ENET_RCR_RMII_10T_MASK;
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break;
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#if defined(FSL_FEATURE_ENET_HAS_AVB) && FSL_FEATURE_ENET_HAS_AVB
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case (uint32_t)ARM_ETH_MAC_SPEED_1G:
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/* If the selected enet doesn't support 1G, return unsupported status */
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if (FSL_FEATURE_ENET_INSTANCE_HAS_AVBn(enet->resource->base) > 0)
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{
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ecr |= ENET_ECR_SPEED_MASK;
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rcr &= ~ENET_RCR_RMII_10T_MASK;
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}
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else
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{
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result = ARM_DRIVER_ERROR_UNSUPPORTED;
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}
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break;
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#endif /* FSL_FEATURE_ENET_HAS_AVB */
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default:
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result = ARM_DRIVER_ERROR_UNSUPPORTED;
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break;
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}
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if (result != ARM_DRIVER_OK)
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{
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return result;
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}
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switch (arg & ARM_ETH_MAC_DUPLEX_Msk)
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{
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case (uint32_t)ARM_ETH_MAC_DUPLEX_HALF:
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rcr |= ENET_RCR_DRT_MASK;
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tcr &= ~ENET_TCR_FDEN_MASK;
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break;
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case (uint32_t)ARM_ETH_MAC_DUPLEX_FULL:
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rcr &= ~ENET_RCR_DRT_MASK;
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tcr |= ENET_TCR_FDEN_MASK;
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break;
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default:
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result = ARM_DRIVER_ERROR_UNSUPPORTED;
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break;
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}
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if (result != ARM_DRIVER_OK)
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{
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return result;
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}
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if ((arg & (ARM_ETH_MAC_CHECKSUM_OFFLOAD_RX | ARM_ETH_MAC_CHECKSUM_OFFLOAD_TX)) != 0U)
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{
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return ARM_DRIVER_ERROR_UNSUPPORTED;
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}
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if ((arg & ARM_ETH_MAC_ADDRESS_BROADCAST) != 0U)
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{
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rcr &= ~ENET_RCR_BC_REJ_MASK;
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}
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else
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{
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rcr |= ENET_RCR_BC_REJ_MASK;
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}
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if ((arg & ARM_ETH_MAC_ADDRESS_MULTICAST) != 0U)
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{
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return ARM_DRIVER_ERROR_UNSUPPORTED;
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}
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if ((arg & ARM_ETH_MAC_ADDRESS_ALL) != 0U)
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{
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rcr |= ENET_RCR_PROM_MASK;
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}
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if ((arg & ARM_ETH_MAC_LOOPBACK) != 0U)
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{
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/* Loop back only supported on MII mode. */
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if ((rcr & ENET_RCR_RMII_MODE_MASK) == 0U)
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{
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rcr |= ENET_RCR_LOOP_MASK;
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rcr &= ~ENET_RCR_DRT_MASK;
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}
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}
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enet->resource->base->RCR = rcr;
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enet->resource->base->TCR = tcr;
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#if defined(FSL_FEATURE_ENET_HAS_AVB) && FSL_FEATURE_ENET_HAS_AVB
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if (FSL_FEATURE_ENET_INSTANCE_HAS_AVBn(enet->resource->base) > 0)
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{
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enet->resource->base->ECR = ecr;
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}
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#endif /* FSL_FEATURE_ENET_HAS_AVB */
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}
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break;
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case (uint32_t)ARM_ETH_MAC_CONTROL_TX:
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if (arg != 0U)
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{
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enet->resource->base->TDAR = ENET_TDAR_TDAR_MASK;
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}
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else
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{
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enet->resource->base->TDAR &= ~ENET_TDAR_TDAR_MASK;
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}
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break;
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case (uint32_t)ARM_ETH_MAC_CONTROL_RX:
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if (arg != 0U)
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{
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ENET_ActiveRead(enet->resource->base);
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}
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else
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{
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enet->resource->base->RDAR &= ~ENET_RDAR_RDAR_MASK;
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}
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break;
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case (uint32_t)ARM_ETH_MAC_SLEEP:
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ENET_EnableSleepMode(enet->resource->base, (bool)arg);
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break;
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default:
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result = ARM_DRIVER_ERROR_UNSUPPORTED;
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break;
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}
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return result;
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}
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static int32_t ENET_CommonPowerControl(ARM_POWER_STATE state, cmsis_enet_mac_driver_state_t *enet)
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{
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int32_t result = ARM_DRIVER_OK;
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ARM_ETH_MAC_CAPABILITIES capabilities;
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switch (state)
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{
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case ARM_POWER_OFF:
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if ((enet->flags & ENET_FLAG_POWER) != 0U)
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{
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(void)ENET_CommonControl(ARM_ETH_MAC_CONTROL_TX, 0, enet);
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(void)ENET_CommonControl(ARM_ETH_MAC_CONTROL_RX, 0, enet);
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ENET_Reset(enet->resource->base);
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ENET_Deinit(enet->resource->base);
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enet->flags = ENET_FLAG_INIT;
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}
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break;
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case ARM_POWER_LOW:
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result = ARM_DRIVER_ERROR_UNSUPPORTED;
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break;
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case ARM_POWER_FULL:
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{
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if (enet->flags == ENET_FLAG_UNINIT)
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{
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return ARM_DRIVER_ERROR;
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}
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if ((enet->flags & ENET_FLAG_POWER) != 0U)
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{
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/* Driver already powered */
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break;
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}
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enet_config_t config;
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uint8_t macAddr[6] = {0};
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uint32_t freq;
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/* Get default configuration. */
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ENET_GetDefaultConfig(&config);
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/* Change the MII interface mode according to the MII interface macro. */
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capabilities = ENETx_GetCapabilities();
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if (capabilities.media_interface == (uint32_t)ARM_ETH_INTERFACE_MII)
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{
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config.miiMode = kENET_MiiMode;
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}
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else if (capabilities.media_interface == (uint32_t)ARM_ETH_INTERFACE_RMII)
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{
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#if defined(RTE_ENET_RGMII) && RTE_ENET_RGMII
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#if defined(FSL_FEATURE_ENET_HAS_AVB) && FSL_FEATURE_ENET_HAS_AVB
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if (FSL_FEATURE_ENET_INSTANCE_HAS_AVBn(enet->resource->base) > 0)
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{
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config.miiMode = kENET_RgmiiMode;
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}
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else
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{
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result = ARM_DRIVER_ERROR_UNSUPPORTED;
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break;
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}
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#endif /* FSL_FEATURE_ENET_HAS_AVB */
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#else
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config.miiMode = kENET_RmiiMode;
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#endif /* RTE_ENET_RGMII */
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}
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else
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{
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/* Intentional empty */
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}
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/* Enable the tx/rx interrupt mode. */
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config.interrupt = (uint32_t)kENET_TxFrameInterrupt | (uint32_t)kENET_TxBufferInterrupt |
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(uint32_t)kENET_RxFrameInterrupt | (uint32_t)kENET_TxBufferInterrupt;
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/* Enable tx accelerate function. */
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config.txAccelerConfig = (uint8_t)kENET_TxAccelIpCheckEnabled | (uint8_t)kENET_TxAccelProtoCheckEnabled;
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/* Callback setup */
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config.callback = ENET_SetInterruptCallback;
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config.userData = (void *)enet->cb_event;
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/* Initialize Ethernet Mac. */
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freq = enet->resource->GetFreq();
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(void)ENET_Init(enet->resource->base, enet->handle, &config, enet->buffers, &macAddr[0], freq);
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enet->flags |= ENET_FLAG_POWER;
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break;
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}
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default:
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result = ARM_DRIVER_ERROR_UNSUPPORTED;
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break;
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}
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return result;
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}
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static int32_t ENET_Phy_Write(cmsis_enet_mac_resource_t *enet, uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
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{
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uint32_t counter;
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/* Clear the SMI interrupt event. */
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ENET_ClearInterruptStatus(enet->base, ENET_EIR_MII_MASK);
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/* Starts a SMI write command. */
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ENET_StartSMIWrite(enet->base, phy_addr, reg_addr, kENET_MiiWriteValidFrame, data);
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/* Wait for SMI complete. */
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for (counter = ENET_SMI_TIMEOUT_COUNT; counter > 0U; counter--)
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{
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if ((ENET_GetInterruptStatus(enet->base) & ENET_EIR_MII_MASK) != 0U)
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{
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break;
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}
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}
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/* Check for timeout. */
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if (counter == 0U)
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{
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return ARM_DRIVER_ERROR;
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}
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/* Clear MII interrupt event. */
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ENET_ClearInterruptStatus(enet->base, ENET_EIR_MII_MASK);
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return ARM_DRIVER_OK;
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}
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static int32_t ENET_Phy_Read(cmsis_enet_mac_resource_t *enet, uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
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{
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assert(data);
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uint32_t counter;
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/* Clear the MII interrupt event. */
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ENET_ClearInterruptStatus(enet->base, ENET_EIR_MII_MASK);
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/* Starts a SMI read command operation. */
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ENET_StartSMIRead(enet->base, phy_addr, reg_addr, kENET_MiiReadValidFrame);
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/* Wait for MII complete. */
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for (counter = ENET_SMI_TIMEOUT_COUNT; counter > 0U; counter--)
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{
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if ((ENET_GetInterruptStatus(enet->base) & ENET_EIR_MII_MASK) != 0U)
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{
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break;
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}
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}
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/* Check for timeout. */
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if (counter == 0U)
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{
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return ARM_DRIVER_ERROR;
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}
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/* Get data from MII register. */
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*data = (uint16_t)ENET_ReadSMIData(enet->base);
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/* Clear MII interrupt event. */
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ENET_ClearInterruptStatus(enet->base, ENET_EIR_MII_MASK);
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return ARM_DRIVER_OK;
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}
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static int32_t ENET_CommonSendFrame(cmsis_enet_mac_driver_state_t *enet,
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const uint8_t *frame,
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uint32_t len,
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uint32_t flags)
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{
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status_t status;
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/* The SDK send frame driver is send with a whole frame and
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* the timestamp will be enabled automatically when it is a PTP frame
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* by parse the frame.
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*/
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if ((flags & (ARM_ETH_MAC_TX_FRAME_FRAGMENT | ARM_ETH_MAC_TX_FRAME_TIMESTAMP)) != 0U)
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{
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return ARM_DRIVER_ERROR;
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}
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status = ENET_SendFrame(enet->resource->base, enet->handle, frame, len, 0, false, NULL);
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if (status == kStatus_ENET_TxFrameOverLen)
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{
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return ARM_DRIVER_ERROR_PARAMETER;
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}
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else if (status == kStatus_ENET_TxFrameBusy)
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{
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return ARM_DRIVER_ERROR_BUSY;
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}
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else if (status == kStatus_ENET_TxFrameFail)
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{
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return ARM_DRIVER_ERROR;
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}
|
|
else
|
|
{
|
|
return ARM_DRIVER_OK;
|
|
}
|
|
}
|
|
|
|
static uint32_t ENET_CommonGetFrameSize(cmsis_enet_mac_driver_state_t *enet)
|
|
{
|
|
status_t status;
|
|
uint32_t length = 0;
|
|
|
|
status = ENET_GetRxFrameSize(enet->handle, &length, 0);
|
|
if (status == kStatus_ENET_RxFrameError)
|
|
{
|
|
/* Should update the buffers. */
|
|
(void)ENET_ReadFrame(enet->resource->base, enet->handle, NULL, 0, 0, NULL);
|
|
}
|
|
return length;
|
|
}
|
|
|
|
static int32_t ENET_CommonReadFrame(cmsis_enet_mac_driver_state_t *enet, uint8_t *frame, uint32_t len)
|
|
{
|
|
status_t status;
|
|
|
|
status = ENET_ReadFrame(enet->resource->base, enet->handle, frame, len, 0, NULL);
|
|
if (status != kStatus_Success)
|
|
{
|
|
return ARM_DRIVER_ERROR;
|
|
}
|
|
|
|
return (int32_t)len;
|
|
}
|
|
|
|
#if RTE_ENET
|
|
|
|
/*! @brief Buffer descriptors should be in non-cacheable region and should be align to "ENET_BUFF_ALIGNMENT". */
|
|
AT_NONCACHEABLE_SECTION_ALIGN(static enet_rx_bd_struct_t g_rxBuffDescrip[ENET_RXBD_NUM], ENET_BUFF_ALIGNMENT);
|
|
AT_NONCACHEABLE_SECTION_ALIGN(static enet_tx_bd_struct_t g_txBuffDescrip[ENET_TXBD_NUM], ENET_BUFF_ALIGNMENT);
|
|
/*! @brief The data buffers can be in cacheable region or in non-cacheable region.
|
|
* If use cacheable region, the alignment size should be the maximum size of "CACHE LINE SIZE" and "ENET_BUFF_ALIGNMENT"
|
|
* If use non-cache region, the alignment size is the "ENET_BUFF_ALIGNMENT".
|
|
*/
|
|
SDK_ALIGN(static uint8_t g_rxDataBuff[ENET_RXBD_NUM][SDK_SIZEALIGN(ENET_RXBUFF_SIZE, CMSIS_ENET_BUFF_ALIGNMENT)],
|
|
CMSIS_ENET_BUFF_ALIGNMENT);
|
|
SDK_ALIGN(static uint8_t g_txDataBuff[ENET_TXBD_NUM][SDK_SIZEALIGN(ENET_TXBUFF_SIZE, CMSIS_ENET_BUFF_ALIGNMENT)],
|
|
CMSIS_ENET_BUFF_ALIGNMENT);
|
|
|
|
extern cmsis_enet_mac_resource_t ENET0_Resource;
|
|
|
|
extern void ENET0_InitPins(void);
|
|
extern void ENET0_DeinitPins(void);
|
|
|
|
static enet_handle_t ENET0_Handle;
|
|
static enet_buffer_config_t ENET0_BuffConfig = {ENET_RXBD_NUM,
|
|
ENET_TXBD_NUM,
|
|
SDK_SIZEALIGN(ENET_RXBUFF_SIZE, CMSIS_ENET_BUFF_ALIGNMENT),
|
|
SDK_SIZEALIGN(ENET_TXBUFF_SIZE, CMSIS_ENET_BUFF_ALIGNMENT),
|
|
&g_rxBuffDescrip[0],
|
|
&g_txBuffDescrip[0],
|
|
&g_rxDataBuff[0][0],
|
|
&g_txDataBuff[0][0],
|
|
(bool)true,
|
|
(bool)true,
|
|
NULL};
|
|
|
|
static cmsis_enet_mac_driver_state_t ENET0_DriverState = {&ENET0_Resource, &ENET0_Handle, &ENET0_BuffConfig};
|
|
|
|
static int32_t ENET0_Initialize(ARM_ETH_MAC_SignalEvent_t cb_event)
|
|
{
|
|
ENET0_InitPins();
|
|
return ENET_CommonInitialize(cb_event, &ENET0_DriverState);
|
|
}
|
|
|
|
static int32_t ENET0_Uninitialize(void)
|
|
{
|
|
ENET0_DeinitPins();
|
|
return ENET_CommonUninitialize(&ENET0_DriverState);
|
|
}
|
|
|
|
static int32_t ENET0_PowerControl(ARM_POWER_STATE state)
|
|
{
|
|
return ENET_CommonPowerControl(state, &ENET0_DriverState);
|
|
}
|
|
|
|
static int32_t ENET0_GetMacAddress(ARM_ETH_MAC_ADDR *ptr_addr)
|
|
{
|
|
ENET_GetMacAddr(ENET0_Resource.base, &ptr_addr->b[0]);
|
|
|
|
return ARM_DRIVER_OK;
|
|
}
|
|
|
|
static int32_t ENET0_SetMacAddress(const ARM_ETH_MAC_ADDR *ptr_addr)
|
|
{
|
|
uint8_t mac[6];
|
|
(void)memcpy((void *)&mac[0], (const void *)ptr_addr, 6);
|
|
ENET_SetMacAddr(ENET0_Resource.base, &mac[0]);
|
|
|
|
return ARM_DRIVER_OK;
|
|
}
|
|
|
|
static int32_t ENET0_TransmitFrame(const uint8_t *frame, uint32_t len, uint32_t flags)
|
|
{
|
|
return ENET_CommonSendFrame(&ENET0_DriverState, frame, len, flags);
|
|
}
|
|
|
|
static uint32_t ENET0_GetReceiveFrameSize(void)
|
|
{
|
|
return ENET_CommonGetFrameSize(&ENET0_DriverState);
|
|
}
|
|
|
|
static int32_t ENET0_ReceiveFrame(uint8_t *frame, uint32_t len)
|
|
{
|
|
return ENET_CommonReadFrame(&ENET0_DriverState, frame, len);
|
|
}
|
|
|
|
static int32_t ENET0_Control(uint32_t control, uint32_t arg)
|
|
{
|
|
return ENET_CommonControl(control, arg, &ENET0_DriverState);
|
|
}
|
|
|
|
static int32_t ENET0_PhyWrite(uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
|
|
{
|
|
return ENET_Phy_Write(&ENET0_Resource, phy_addr, reg_addr, data);
|
|
}
|
|
|
|
static int32_t ENET0_PhyRead(uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
|
|
{
|
|
return ENET_Phy_Read(&ENET0_Resource, phy_addr, reg_addr, data);
|
|
}
|
|
|
|
static int32_t ENET0_SetAddressFilter(const ARM_ETH_MAC_ADDR *ptr_addr, uint32_t num_addr)
|
|
{
|
|
return ARM_DRIVER_ERROR_UNSUPPORTED;
|
|
}
|
|
|
|
static int32_t ENET0_GetRxFrameTime(ARM_ETH_MAC_TIME *time)
|
|
{
|
|
return ARM_DRIVER_ERROR_UNSUPPORTED;
|
|
}
|
|
|
|
static int32_t ENET0_GetTxFrameTime(ARM_ETH_MAC_TIME *time)
|
|
{
|
|
return ARM_DRIVER_ERROR_UNSUPPORTED;
|
|
}
|
|
|
|
static int32_t ENET0_ControlTimer(uint32_t control, ARM_ETH_MAC_TIME *time)
|
|
{
|
|
return ARM_DRIVER_ERROR_UNSUPPORTED;
|
|
}
|
|
|
|
ARM_DRIVER_ETH_MAC Driver_ETH_MAC0 = {ENETx_GetVersion,
|
|
ENETx_GetCapabilities,
|
|
ENET0_Initialize,
|
|
ENET0_Uninitialize,
|
|
ENET0_PowerControl,
|
|
ENET0_GetMacAddress,
|
|
ENET0_SetMacAddress,
|
|
ENET0_SetAddressFilter,
|
|
ENET0_TransmitFrame,
|
|
ENET0_ReceiveFrame,
|
|
ENET0_GetReceiveFrameSize,
|
|
ENET0_GetRxFrameTime,
|
|
ENET0_GetTxFrameTime,
|
|
ENET0_ControlTimer,
|
|
ENET0_Control,
|
|
ENET0_PhyRead,
|
|
ENET0_PhyWrite};
|
|
#endif
|