3512 lines
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3512 lines
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<a href="#groups">Modules</a> |
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<a href="#nested-classes">Data Structures</a> |
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<a href="#enum-members">Enumerations</a> </div>
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<div class="headertitle">
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<div class="title">FLEXSPI: Flexible Serial Peripheral Interface Driver</div> </div>
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<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
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<p>The MCUXpresso SDK provides a peripheral driver for the Flexible Serial Peripheral Interface (FLEXSPI) module of MCUXpresso SDK/i.MX devices.</p>
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<p>FLEXSPI driver includes functional APIs and interrupt/EDMA non-blocking transactional APIs.</p>
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<p>Functional APIs are feature/property target low level APIs. Functional APIs can be used for FLEXSPI initialization/configuration/operation for optimization/customization purpose. Using the functional API requires the knowledge of the FLEXSPI peripheral and how to organize functional APIs to meet the application requirements. All functional API use the peripheral base address as the first parameter. FLEXSPI functional operation groups provide the functional API set.</p>
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<p>Transactional APIs are transaction target high level APIs. Transactional APIs can be used to enable the peripheral and in the application if the code size and performance of transactional APIs satisfy the requirements. If the code size and performance are a critical requirement, see the transactional API implementation and write a custom code. All transactional APIs use the flexspi_handle_t/flexspi_edma_handle_t as the second parameter. Initialize the handle for interrupt non-blocking transfer by calling the FLEXSPI_TransferCreateHandle API. Initialize the handle for interrupt non-blocking transfer by calling the FLEXSPI_TransferCreateHandleEDMA API.</p>
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<p>Transactional APIs support asynchronous transfer. This means that the functions <a class="el" href="a00041.html#ga9d2eccbfd3eaf1554fd287a4a808956d" title="Performs a interrupt non-blocking transfer on the FLEXSPI bus. ">FLEXSPI_TransferNonBlocking()</a> and <a class="el" href="a00042.html#ga2048a6a5bf9b8522297e3aea525bd4d4" title="Transfers FLEXSPI data using an eDMA non-blocking method. ">FLEXSPI_TransferEDMA()</a> set up data transfer. When the transfer completes, the upper layer is notified through a callback function with the kStatus_FLEXSPI_Idle status. </p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="groups"></a>
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Modules</h2></td></tr>
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<tr class="memitem:a00042"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00042.html">FLEXSPI eDMA Driver</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
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Data Structures</h2></td></tr>
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<tr class="memitem:a00417"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a00417">_flexspi_config</a></td></tr>
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<tr class="memdesc:a00417"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI configuration structure. <a href="a00041.html#a00417">More...</a><br/></td></tr>
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<tr class="separator:a00417"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00418"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a00418">_flexspi_device_config</a></td></tr>
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<tr class="memdesc:a00418"><td class="mdescLeft"> </td><td class="mdescRight">External device configuration items. <a href="a00041.html#a00418">More...</a><br/></td></tr>
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<tr class="separator:a00418"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00424"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a00424">_flexspi_transfer</a></td></tr>
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<tr class="memdesc:a00424"><td class="mdescLeft"> </td><td class="mdescRight">Transfer structure for FLEXSPI. <a href="a00041.html#a00424">More...</a><br/></td></tr>
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<tr class="separator:a00424"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00420"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a00420">_flexspi_handle</a></td></tr>
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<tr class="memdesc:a00420"><td class="mdescLeft"> </td><td class="mdescRight">Transfer handle structure for FLEXSPI. <a href="a00041.html#a00420">More...</a><br/></td></tr>
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<tr class="separator:a00420"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:ga179bcd92daf142c311948082c06c848a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga179bcd92daf142c311948082c06c848a">FLEXSPI_LUT_SEQ</a>(cmd0, pad0, op0, cmd1, pad1, op1)</td></tr>
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<tr class="memdesc:ga179bcd92daf142c311948082c06c848a"><td class="mdescLeft"> </td><td class="mdescRight">Formula to form FLEXSPI instructions in LUT table. <a href="#ga179bcd92daf142c311948082c06c848a">More...</a><br/></td></tr>
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<tr class="separator:ga179bcd92daf142c311948082c06c848a"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
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Typedefs</h2></td></tr>
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<tr class="memitem:gad17db5037cc0e96547dceb5141f9748c"><td class="memItemLeft" align="right" valign="top">typedef enum <a class="el" href="a00041.html#ga0479e0532b00f2c6eccc5a21d1b9ff15">_flexspi_pad</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gad17db5037cc0e96547dceb5141f9748c">flexspi_pad_t</a></td></tr>
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<tr class="memdesc:gad17db5037cc0e96547dceb5141f9748c"><td class="mdescLeft"> </td><td class="mdescRight">pad definition of FLEXSPI, use to form LUT instruction. <a href="#gad17db5037cc0e96547dceb5141f9748c">More...</a><br/></td></tr>
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<tr class="separator:gad17db5037cc0e96547dceb5141f9748c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9a1ca84036889749c48552282a53184c"><td class="memItemLeft" align="right" valign="top">typedef enum <a class="el" href="a00041.html#gaceee051e8ee5d664778db2882bafac7a">_flexspi_flags</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga9a1ca84036889749c48552282a53184c">flexspi_flags_t</a></td></tr>
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<tr class="memdesc:ga9a1ca84036889749c48552282a53184c"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI interrupt status flags. <a href="#ga9a1ca84036889749c48552282a53184c">More...</a><br/></td></tr>
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<tr class="separator:ga9a1ca84036889749c48552282a53184c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3925749f15492f4ee50dc375b889a398"><td class="memItemLeft" align="right" valign="top">typedef enum <br class="typebreak"/>
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<a class="el" href="a00041.html#gaa1b233948fb7d42aeb4c006cf5f35478">_flexspi_read_sample_clock</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga3925749f15492f4ee50dc375b889a398">flexspi_read_sample_clock_t</a></td></tr>
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<tr class="memdesc:ga3925749f15492f4ee50dc375b889a398"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI sample clock source selection for Flash Reading. <a href="#ga3925749f15492f4ee50dc375b889a398">More...</a><br/></td></tr>
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<tr class="separator:ga3925749f15492f4ee50dc375b889a398"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaac9a0472f45df2317e4e62acbd920da1"><td class="memItemLeft" align="right" valign="top">typedef enum <br class="typebreak"/>
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<a class="el" href="a00041.html#ga44d2809471f9ad01d3e18b5993e3fe41">_flexspi_cs_interval_cycle_unit</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gaac9a0472f45df2317e4e62acbd920da1">flexspi_cs_interval_cycle_unit_t</a></td></tr>
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<tr class="memdesc:gaac9a0472f45df2317e4e62acbd920da1"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI interval unit for flash device select. <a href="#gaac9a0472f45df2317e4e62acbd920da1">More...</a><br/></td></tr>
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<tr class="separator:gaac9a0472f45df2317e4e62acbd920da1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5dc9e254b63fae4c739b39b092e65bb9"><td class="memItemLeft" align="right" valign="top">typedef enum <br class="typebreak"/>
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<a class="el" href="a00041.html#ga12b02d7ab910585e0f489956e7919568">_flexspi_ahb_write_wait_unit</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga5dc9e254b63fae4c739b39b092e65bb9">flexspi_ahb_write_wait_unit_t</a></td></tr>
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<tr class="memdesc:ga5dc9e254b63fae4c739b39b092e65bb9"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI AHB wait interval unit for writing. <a href="#ga5dc9e254b63fae4c739b39b092e65bb9">More...</a><br/></td></tr>
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<tr class="separator:ga5dc9e254b63fae4c739b39b092e65bb9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0fac520bfee4292d93c17a3227fb38d5"><td class="memItemLeft" align="right" valign="top">typedef enum <a class="el" href="a00041.html#gaaef904b8ea28d97d26179d0d0a34fbc1">_flexspi_ip_error_code</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga0fac520bfee4292d93c17a3227fb38d5">flexspi_ip_error_code_t</a></td></tr>
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<tr class="memdesc:ga0fac520bfee4292d93c17a3227fb38d5"><td class="mdescLeft"> </td><td class="mdescRight">Error Code when IP command Error detected. <a href="#ga0fac520bfee4292d93c17a3227fb38d5">More...</a><br/></td></tr>
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<tr class="separator:ga0fac520bfee4292d93c17a3227fb38d5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga849aacfbb909a2b403d39ca1b23f7f85"><td class="memItemLeft" align="right" valign="top">typedef enum <br class="typebreak"/>
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<a class="el" href="a00041.html#gaff421223c501f1b18042d548736bd89e">_flexspi_ahb_error_code</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga849aacfbb909a2b403d39ca1b23f7f85">flexspi_ahb_error_code_t</a></td></tr>
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<tr class="memdesc:ga849aacfbb909a2b403d39ca1b23f7f85"><td class="mdescLeft"> </td><td class="mdescRight">Error Code when AHB command Error detected. <a href="#ga849aacfbb909a2b403d39ca1b23f7f85">More...</a><br/></td></tr>
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<tr class="separator:ga849aacfbb909a2b403d39ca1b23f7f85"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga848f4d71e4802faf8a5d543545ee5110"><td class="memItemLeft" align="right" valign="top">typedef enum <a class="el" href="a00041.html#gabb9bc1dd69b486ce1d71749d0546d60f">_flexspi_port</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga848f4d71e4802faf8a5d543545ee5110">flexspi_port_t</a></td></tr>
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<tr class="memdesc:ga848f4d71e4802faf8a5d543545ee5110"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI operation port select. <a href="#ga848f4d71e4802faf8a5d543545ee5110">More...</a><br/></td></tr>
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<tr class="separator:ga848f4d71e4802faf8a5d543545ee5110"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga00a721e456c8a4334ba7fee0a0c2a3b8"><td class="memItemLeft" align="right" valign="top">typedef enum <br class="typebreak"/>
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<a class="el" href="a00041.html#ga4014b5aa72e6b4b7d258f377b3793b1a">_flexspi_arb_command_source</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga00a721e456c8a4334ba7fee0a0c2a3b8">flexspi_arb_command_source_t</a></td></tr>
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<tr class="memdesc:ga00a721e456c8a4334ba7fee0a0c2a3b8"><td class="mdescLeft"> </td><td class="mdescRight">Trigger source of current command sequence granted by arbitrator. <a href="#ga00a721e456c8a4334ba7fee0a0c2a3b8">More...</a><br/></td></tr>
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<tr class="separator:ga00a721e456c8a4334ba7fee0a0c2a3b8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0cb96e814ec50238c684fdf431c3efa5"><td class="memItemLeft" align="right" valign="top">typedef enum <a class="el" href="a00041.html#ga048bc2776406a4a3d3b4213de9e759c2">_flexspi_command_type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga0cb96e814ec50238c684fdf431c3efa5">flexspi_command_type_t</a></td></tr>
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<tr class="memdesc:ga0cb96e814ec50238c684fdf431c3efa5"><td class="mdescLeft"> </td><td class="mdescRight">Command type. <a href="#ga0cb96e814ec50238c684fdf431c3efa5">More...</a><br/></td></tr>
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<tr class="separator:ga0cb96e814ec50238c684fdf431c3efa5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf39e19e99ab773e4f0cac969eecce062"><td class="memItemLeft" align="right" valign="top">typedef struct <a class="el" href="a00041.html#a00417">_flexspi_config</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gaf39e19e99ab773e4f0cac969eecce062">flexspi_config_t</a></td></tr>
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<tr class="memdesc:gaf39e19e99ab773e4f0cac969eecce062"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI configuration structure. <a href="#gaf39e19e99ab773e4f0cac969eecce062">More...</a><br/></td></tr>
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<tr class="separator:gaf39e19e99ab773e4f0cac969eecce062"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5a70bb5d4f28a1763a0224bb8298d4d7"><td class="memItemLeft" align="right" valign="top">typedef struct <br class="typebreak"/>
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<a class="el" href="a00041.html#a00418">_flexspi_device_config</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga5a70bb5d4f28a1763a0224bb8298d4d7">flexspi_device_config_t</a></td></tr>
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<tr class="memdesc:ga5a70bb5d4f28a1763a0224bb8298d4d7"><td class="mdescLeft"> </td><td class="mdescRight">External device configuration items. <a href="#ga5a70bb5d4f28a1763a0224bb8298d4d7">More...</a><br/></td></tr>
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<tr class="separator:ga5a70bb5d4f28a1763a0224bb8298d4d7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae98634a0e73294cf48b94cab5d07b196"><td class="memItemLeft" align="right" valign="top">typedef struct <a class="el" href="a00041.html#a00424">_flexspi_transfer</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gae98634a0e73294cf48b94cab5d07b196">flexspi_transfer_t</a></td></tr>
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<tr class="memdesc:gae98634a0e73294cf48b94cab5d07b196"><td class="mdescLeft"> </td><td class="mdescRight">Transfer structure for FLEXSPI. <a href="#gae98634a0e73294cf48b94cab5d07b196">More...</a><br/></td></tr>
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<tr class="separator:gae98634a0e73294cf48b94cab5d07b196"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga40558fffabe6bc75ad0d978ac56726a7"><td class="memItemLeft" align="right" valign="top">typedef void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga40558fffabe6bc75ad0d978ac56726a7">flexspi_transfer_callback_t</a> )(FLEXSPI_Type *base, <a class="el" href="a00041.html#a00420">flexspi_handle_t</a> *handle, <a class="el" href="a00272.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> status, void *userData)</td></tr>
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<tr class="memdesc:ga40558fffabe6bc75ad0d978ac56726a7"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI transfer callback function. <a href="#ga40558fffabe6bc75ad0d978ac56726a7">More...</a><br/></td></tr>
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<tr class="separator:ga40558fffabe6bc75ad0d978ac56726a7"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
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Enumerations</h2></td></tr>
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<tr class="memitem:ga1fb9092bcdeada2d206bdc74afbbe122"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br/>
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  <a class="el" href="a00041.html#gga1fb9092bcdeada2d206bdc74afbbe122a21bccbd47a8f5f8690d0825b6cb41761">kStatus_FLEXSPI_Busy</a> = MAKE_STATUS(kStatusGroup_FLEXSPI, 0),
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<br/>
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  <a class="el" href="a00041.html#gga1fb9092bcdeada2d206bdc74afbbe122af247efbe53e40fe0001914530d483bdf">kStatus_FLEXSPI_SequenceExecutionTimeout</a> = MAKE_STATUS(kStatusGroup_FLEXSPI, 1),
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<br/>
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  <a class="el" href="a00041.html#gga1fb9092bcdeada2d206bdc74afbbe122a6950d19c6f71e399821ae198f74f65e9">kStatus_FLEXSPI_IpCommandSequenceError</a> = MAKE_STATUS(kStatusGroup_FLEXSPI, 2),
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  <a class="el" href="a00041.html#gga1fb9092bcdeada2d206bdc74afbbe122aad44a571485ffa081f6a72fce35458ce">kStatus_FLEXSPI_IpCommandGrantTimeout</a> = MAKE_STATUS(kStatusGroup_FLEXSPI, 3)
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}</td></tr>
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<tr class="memdesc:ga1fb9092bcdeada2d206bdc74afbbe122"><td class="mdescLeft"> </td><td class="mdescRight">Status structure of FLEXSPI. <a href="a00041.html#ga1fb9092bcdeada2d206bdc74afbbe122">More...</a><br/></td></tr>
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<tr class="separator:ga1fb9092bcdeada2d206bdc74afbbe122"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga84627a72058502328269676b81780f89"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br/>
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89acab6a9e0362f2c1fb8984913dafeca33">kFLEXSPI_Command_STOP</a> = 0x00U,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a1c8772bef3a08e52dc80f57af34366ba">kFLEXSPI_Command_SDR</a> = 0x01U,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a29dd81e7a6f0ed9e0197e2b0d60ba7f4">kFLEXSPI_Command_RADDR_SDR</a> = 0x02U,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a1a3fa82cf8b0677dc42f839f98125fd2">kFLEXSPI_Command_CADDR_SDR</a> = 0x03U,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a1f0865c56954d718bcb029efca53d716">kFLEXSPI_Command_MODE1_SDR</a> = 0x04U,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89acaf987f395572783c1bcc49c7c733562">kFLEXSPI_Command_MODE2_SDR</a> = 0x05U,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a539d1d925c24c1d5d28db53145ac0098">kFLEXSPI_Command_MODE4_SDR</a> = 0x06U,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a75da61b0b5a52a62aec4cfd9beb74c41">kFLEXSPI_Command_MODE8_SDR</a> = 0x07U,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a9e30b0f10c66e9ae6acb06829dccb787">kFLEXSPI_Command_WRITE_SDR</a> = 0x08U,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89adf06bfb1db55de99a9c1332cb52acb0a">kFLEXSPI_Command_READ_SDR</a> = 0x09U,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a4b65366f6884c88d255a7189d771fdfc">kFLEXSPI_Command_LEARN_SDR</a> = 0x0AU,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a20d443a0566f4468d82573f26f8cd67a">kFLEXSPI_Command_DATSZ_SDR</a> = 0x0BU,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89ac9f6c32fe54dadad88b44186ef5a1799">kFLEXSPI_Command_DUMMY_SDR</a> = 0x0CU,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a0ea62a346e865a749143ebb6ea0706b5">kFLEXSPI_Command_DUMMY_RWDS_SDR</a> = 0x0DU,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a1eca9a5742e650263aaa264bdfee4a22">kFLEXSPI_Command_DDR</a> = 0x21U,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a4e44e443ba90f7183a52f8f9eabe2c31">kFLEXSPI_Command_RADDR_DDR</a> = 0x22U,
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<br/>
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89af58fe6950b4f1b472bf81ddcab42709f">kFLEXSPI_Command_CADDR_DDR</a> = 0x23U,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89afe085498075659a0c6989dbca3591c4a">kFLEXSPI_Command_MODE1_DDR</a> = 0x24U,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89aa09cd14e9354e91fefe5e1796b49ee82">kFLEXSPI_Command_MODE2_DDR</a> = 0x25U,
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<br/>
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a4734dbae99656af5500d65766743862e">kFLEXSPI_Command_MODE4_DDR</a> = 0x26U,
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<br/>
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89af5ee8359bc3d1444ca5611ea5da5de25">kFLEXSPI_Command_MODE8_DDR</a> = 0x27U,
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<br/>
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89ae5ac267451675a466b737ca4ab605929">kFLEXSPI_Command_WRITE_DDR</a> = 0x28U,
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<br/>
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a91bceb3ad87da1b6c2723ed7b07f2cf1">kFLEXSPI_Command_READ_DDR</a> = 0x29U,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a1b51830f2992cb7ae10ca35736663e4e">kFLEXSPI_Command_LEARN_DDR</a> = 0x2AU,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a22097b53c3b05c555bc76d4b659b662e">kFLEXSPI_Command_DATSZ_DDR</a> = 0x2BU,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a2ce6180762ad977e0284e139bbc91c1a">kFLEXSPI_Command_DUMMY_DDR</a> = 0x2CU,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89a0b4f03d35c08558f4094f7e1ba13a22e">kFLEXSPI_Command_DUMMY_RWDS_DDR</a> = 0x2DU,
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  <a class="el" href="a00041.html#gga84627a72058502328269676b81780f89ac3abaaee8f2a43ab63315ce05ba485b0">kFLEXSPI_Command_JUMP_ON_CS</a> = 0x1FU
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<br/>
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}</td></tr>
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<tr class="memdesc:ga84627a72058502328269676b81780f89"><td class="mdescLeft"> </td><td class="mdescRight">CMD definition of FLEXSPI, use to form LUT instruction, _flexspi_command. <a href="a00041.html#ga84627a72058502328269676b81780f89">More...</a><br/></td></tr>
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<tr class="separator:ga84627a72058502328269676b81780f89"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0479e0532b00f2c6eccc5a21d1b9ff15"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga0479e0532b00f2c6eccc5a21d1b9ff15">_flexspi_pad</a> { <br/>
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  <a class="el" href="a00041.html#gga0479e0532b00f2c6eccc5a21d1b9ff15aabb7baedf9c64ad0a382587105cbf3b4">kFLEXSPI_1PAD</a> = 0x00U,
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  <a class="el" href="a00041.html#gga0479e0532b00f2c6eccc5a21d1b9ff15a95d1a2d72fa9c8ca2a221cc3c4f431be">kFLEXSPI_2PAD</a> = 0x01U,
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  <a class="el" href="a00041.html#gga0479e0532b00f2c6eccc5a21d1b9ff15abfb84ebae8934b725e4164d1b643931c">kFLEXSPI_4PAD</a> = 0x02U,
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  <a class="el" href="a00041.html#gga0479e0532b00f2c6eccc5a21d1b9ff15ab67dd50438697de88314abe08598bfd6">kFLEXSPI_8PAD</a> = 0x03U
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<br/>
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}</td></tr>
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<tr class="memdesc:ga0479e0532b00f2c6eccc5a21d1b9ff15"><td class="mdescLeft"> </td><td class="mdescRight">pad definition of FLEXSPI, use to form LUT instruction. <a href="a00041.html#ga0479e0532b00f2c6eccc5a21d1b9ff15">More...</a><br/></td></tr>
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<tr class="separator:ga0479e0532b00f2c6eccc5a21d1b9ff15"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaceee051e8ee5d664778db2882bafac7a"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gaceee051e8ee5d664778db2882bafac7a">_flexspi_flags</a> { <br/>
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  <a class="el" href="a00041.html#ggaceee051e8ee5d664778db2882bafac7aa926d49476fe684b0c912bf39124761b6">kFLEXSPI_SequenceExecutionTimeoutFlag</a> = FLEXSPI_INTEN_SEQTIMEOUTEN_MASK,
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<br/>
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  <a class="el" href="a00041.html#ggaceee051e8ee5d664778db2882bafac7aaaff7260c000311495dbae646cf7cf977">kFLEXSPI_AhbBusTimeoutFlag</a> = FLEXSPI_INTEN_AHBBUSTIMEOUTEN_MASK,
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<br/>
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  <a class="el" href="a00041.html#ggaceee051e8ee5d664778db2882bafac7aab8e2204cbed4f7b443052aeab6c9495b">kFLEXSPI_SckStoppedBecauseTxEmptyFlag</a>,
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  <a class="el" href="a00041.html#ggaceee051e8ee5d664778db2882bafac7aa8f0e6574ce2eda2a9080b457dcc17369">kFLEXSPI_SckStoppedBecauseRxFullFlag</a>,
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<br/>
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  <a class="el" href="a00041.html#ggaceee051e8ee5d664778db2882bafac7aaf6fff015f6467f94244ccfce73ed45ea">kFLEXSPI_IpTxFifoWatermarkEmptyFlag</a> = FLEXSPI_INTEN_IPTXWEEN_MASK,
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  <a class="el" href="a00041.html#ggaceee051e8ee5d664778db2882bafac7aa467607530d9f93e3b4dd24ed30b1daf9">kFLEXSPI_IpRxFifoWatermarkAvailableFlag</a> = FLEXSPI_INTEN_IPRXWAEN_MASK,
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  <a class="el" href="a00041.html#ggaceee051e8ee5d664778db2882bafac7aaeade1012fb934333db2a0058c366f731">kFLEXSPI_AhbCommandSequenceErrorFlag</a>,
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  <a class="el" href="a00041.html#ggaceee051e8ee5d664778db2882bafac7aa37ceccdbb6bc3d936662788eb3cdba07">kFLEXSPI_IpCommandSequenceErrorFlag</a> = FLEXSPI_INTEN_IPCMDERREN_MASK,
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  <a class="el" href="a00041.html#ggaceee051e8ee5d664778db2882bafac7aade934b2883d46cae2b46f620fcd993cc">kFLEXSPI_AhbCommandGrantTimeoutFlag</a>,
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<br/>
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  <a class="el" href="a00041.html#ggaceee051e8ee5d664778db2882bafac7aaadd6f24bbc89ba4be6200111fb20982b">kFLEXSPI_IpCommandGrantTimeoutFlag</a>,
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  <a class="el" href="a00041.html#ggaceee051e8ee5d664778db2882bafac7aa25be525051c616ada040c8ed6d69ef17">kFLEXSPI_IpCommandExecutionDoneFlag</a>,
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  <a class="el" href="a00041.html#ggaceee051e8ee5d664778db2882bafac7aa0b68913b136867c72818d8f434652111">kFLEXSPI_AllInterruptFlags</a> = 0xFFFU
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<br/>
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}</td></tr>
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<tr class="memdesc:gaceee051e8ee5d664778db2882bafac7a"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI interrupt status flags. <a href="a00041.html#gaceee051e8ee5d664778db2882bafac7a">More...</a><br/></td></tr>
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<tr class="separator:gaceee051e8ee5d664778db2882bafac7a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa1b233948fb7d42aeb4c006cf5f35478"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gaa1b233948fb7d42aeb4c006cf5f35478">_flexspi_read_sample_clock</a> { <br/>
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  <a class="el" href="a00041.html#ggaa1b233948fb7d42aeb4c006cf5f35478af6182ef9c776fa291cbbd34a727d4a9d">kFLEXSPI_ReadSampleClkLoopbackInternally</a> = 0x0U,
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  <a class="el" href="a00041.html#ggaa1b233948fb7d42aeb4c006cf5f35478a86986f70a9cd9123dc708a4cd9439f14">kFLEXSPI_ReadSampleClkLoopbackFromDqsPad</a> = 0x1U,
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<br/>
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  <a class="el" href="a00041.html#ggaa1b233948fb7d42aeb4c006cf5f35478aa10f2854d50ae1cf60da887cb5ee8721">kFLEXSPI_ReadSampleClkLoopbackFromSckPad</a> = 0x2U,
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  <a class="el" href="a00041.html#ggaa1b233948fb7d42aeb4c006cf5f35478a37b19889732ad1d8d5336452577a6fe5">kFLEXSPI_ReadSampleClkExternalInputFromDqsPad</a> = 0x3U
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}</td></tr>
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<tr class="memdesc:gaa1b233948fb7d42aeb4c006cf5f35478"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI sample clock source selection for Flash Reading. <a href="a00041.html#gaa1b233948fb7d42aeb4c006cf5f35478">More...</a><br/></td></tr>
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<tr class="separator:gaa1b233948fb7d42aeb4c006cf5f35478"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga44d2809471f9ad01d3e18b5993e3fe41"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga44d2809471f9ad01d3e18b5993e3fe41">_flexspi_cs_interval_cycle_unit</a> { <br/>
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  <a class="el" href="a00041.html#gga44d2809471f9ad01d3e18b5993e3fe41a0c13470fc2dd7cdae32d89629f476bc2">kFLEXSPI_CsIntervalUnit1SckCycle</a> = 0x0U,
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  <a class="el" href="a00041.html#gga44d2809471f9ad01d3e18b5993e3fe41a39cdab3817b97ee2783ceb0a48784c44">kFLEXSPI_CsIntervalUnit256SckCycle</a> = 0x1U
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<br/>
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}</td></tr>
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<tr class="memdesc:ga44d2809471f9ad01d3e18b5993e3fe41"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI interval unit for flash device select. <a href="a00041.html#ga44d2809471f9ad01d3e18b5993e3fe41">More...</a><br/></td></tr>
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<tr class="separator:ga44d2809471f9ad01d3e18b5993e3fe41"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga12b02d7ab910585e0f489956e7919568"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga12b02d7ab910585e0f489956e7919568">_flexspi_ahb_write_wait_unit</a> { <br/>
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  <a class="el" href="a00041.html#gga12b02d7ab910585e0f489956e7919568a77bd176c235c440474130c9333acfe36">kFLEXSPI_AhbWriteWaitUnit2AhbCycle</a> = 0x0U,
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<br/>
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  <a class="el" href="a00041.html#gga12b02d7ab910585e0f489956e7919568a507634102520b1f1b227b4baaabdd562">kFLEXSPI_AhbWriteWaitUnit8AhbCycle</a> = 0x1U,
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<br/>
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  <a class="el" href="a00041.html#gga12b02d7ab910585e0f489956e7919568a4b54ae64ef18997af8bc7ed0d41c7ef5">kFLEXSPI_AhbWriteWaitUnit32AhbCycle</a> = 0x2U,
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<br/>
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  <a class="el" href="a00041.html#gga12b02d7ab910585e0f489956e7919568aec6164016a913fdb5fc174c39af1296c">kFLEXSPI_AhbWriteWaitUnit128AhbCycle</a> = 0x3U,
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<br/>
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  <a class="el" href="a00041.html#gga12b02d7ab910585e0f489956e7919568ad97d3600a3f5df7e13fe0a3343f0ddfc">kFLEXSPI_AhbWriteWaitUnit512AhbCycle</a> = 0x4U,
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<br/>
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  <a class="el" href="a00041.html#gga12b02d7ab910585e0f489956e7919568aa424000e33c88b2e93529d1503f40d86">kFLEXSPI_AhbWriteWaitUnit2048AhbCycle</a> = 0x5U,
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<br/>
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  <a class="el" href="a00041.html#gga12b02d7ab910585e0f489956e7919568ab49ac5e2a68f75adcb96d39359e21a0b">kFLEXSPI_AhbWriteWaitUnit8192AhbCycle</a> = 0x6U,
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<br/>
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  <a class="el" href="a00041.html#gga12b02d7ab910585e0f489956e7919568af64e1be9ff0301d3f418ed783c045c1e">kFLEXSPI_AhbWriteWaitUnit32768AhbCycle</a> = 0x7U
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<br/>
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}</td></tr>
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<tr class="memdesc:ga12b02d7ab910585e0f489956e7919568"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI AHB wait interval unit for writing. <a href="a00041.html#ga12b02d7ab910585e0f489956e7919568">More...</a><br/></td></tr>
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<tr class="separator:ga12b02d7ab910585e0f489956e7919568"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaef904b8ea28d97d26179d0d0a34fbc1"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gaaef904b8ea28d97d26179d0d0a34fbc1">_flexspi_ip_error_code</a> { <br/>
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  <a class="el" href="a00041.html#ggaaef904b8ea28d97d26179d0d0a34fbc1a5a9ef1b8776c5e91f94045d0c488cc92">kFLEXSPI_IpCmdErrorNoError</a> = 0x0U,
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<br/>
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  <a class="el" href="a00041.html#ggaaef904b8ea28d97d26179d0d0a34fbc1a09b36a52a3719012b6262d0df758c26c">kFLEXSPI_IpCmdErrorJumpOnCsInIpCmd</a> = 0x2U,
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<br/>
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  <a class="el" href="a00041.html#ggaaef904b8ea28d97d26179d0d0a34fbc1a2566abfe918545548cdc391ecad3562d">kFLEXSPI_IpCmdErrorUnknownOpCode</a> = 0x3U,
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<br/>
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  <a class="el" href="a00041.html#ggaaef904b8ea28d97d26179d0d0a34fbc1a3a45578abf83e3679f13f7a47692b0b2">kFLEXSPI_IpCmdErrorSdrDummyInDdrSequence</a> = 0x4U,
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<br/>
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  <a class="el" href="a00041.html#ggaaef904b8ea28d97d26179d0d0a34fbc1a2b93718689f2d9dd58d124fd25ff2f85">kFLEXSPI_IpCmdErrorDdrDummyInSdrSequence</a> = 0x5U,
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<br/>
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  <a class="el" href="a00041.html#ggaaef904b8ea28d97d26179d0d0a34fbc1a5a974de28e0771b0e93ecd12df485a62">kFLEXSPI_IpCmdErrorInvalidAddress</a> = 0x6U,
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<br/>
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  <a class="el" href="a00041.html#ggaaef904b8ea28d97d26179d0d0a34fbc1ad2b76bec366730732a07c2c7a9e5aeec">kFLEXSPI_IpCmdErrorSequenceExecutionTimeout</a> = 0xEU,
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<br/>
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  <a class="el" href="a00041.html#ggaaef904b8ea28d97d26179d0d0a34fbc1a2f318a896dfe31a4b8b507daf339c16d">kFLEXSPI_IpCmdErrorFlashBoundaryAcrosss</a> = 0xFU
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<br/>
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}</td></tr>
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<tr class="memdesc:gaaef904b8ea28d97d26179d0d0a34fbc1"><td class="mdescLeft"> </td><td class="mdescRight">Error Code when IP command Error detected. <a href="a00041.html#gaaef904b8ea28d97d26179d0d0a34fbc1">More...</a><br/></td></tr>
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<tr class="separator:gaaef904b8ea28d97d26179d0d0a34fbc1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaff421223c501f1b18042d548736bd89e"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gaff421223c501f1b18042d548736bd89e">_flexspi_ahb_error_code</a> { <br/>
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  <a class="el" href="a00041.html#ggaff421223c501f1b18042d548736bd89ea3b055af2f8c32b1c20c781f9be9406e2">kFLEXSPI_AhbCmdErrorNoError</a> = 0x0U,
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<br/>
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  <a class="el" href="a00041.html#ggaff421223c501f1b18042d548736bd89eaa1a1fb4ea86b9f3d159cf4af471fff6a">kFLEXSPI_AhbCmdErrorJumpOnCsInWriteCmd</a> = 0x2U,
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<br/>
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  <a class="el" href="a00041.html#ggaff421223c501f1b18042d548736bd89ea028741e0f08e9f253b43a5ff5db23a3f">kFLEXSPI_AhbCmdErrorUnknownOpCode</a> = 0x3U,
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<br/>
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  <a class="el" href="a00041.html#ggaff421223c501f1b18042d548736bd89ea4ae2658aaf3b9e392409233fb4e103e6">kFLEXSPI_AhbCmdErrorSdrDummyInDdrSequence</a> = 0x4U,
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<br/>
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  <a class="el" href="a00041.html#ggaff421223c501f1b18042d548736bd89ea33e985c357a9fd0161b79b04ce94deb9">kFLEXSPI_AhbCmdErrorDdrDummyInSdrSequence</a> = 0x5U,
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<br/>
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  <a class="el" href="a00041.html#ggaff421223c501f1b18042d548736bd89ea66bb317d820fe1aa2f180ab88f680d31">kFLEXSPI_AhbCmdSequenceExecutionTimeout</a> = 0x6U
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<br/>
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}</td></tr>
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<tr class="memdesc:gaff421223c501f1b18042d548736bd89e"><td class="mdescLeft"> </td><td class="mdescRight">Error Code when AHB command Error detected. <a href="a00041.html#gaff421223c501f1b18042d548736bd89e">More...</a><br/></td></tr>
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<tr class="separator:gaff421223c501f1b18042d548736bd89e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabb9bc1dd69b486ce1d71749d0546d60f"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gabb9bc1dd69b486ce1d71749d0546d60f">_flexspi_port</a> { <br/>
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  <a class="el" href="a00041.html#ggabb9bc1dd69b486ce1d71749d0546d60fa280a07425f3d2e4b876b51c6216da136">kFLEXSPI_PortA1</a> = 0x0U,
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<br/>
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  <a class="el" href="a00041.html#ggabb9bc1dd69b486ce1d71749d0546d60fa9766a70521fd112539bb3ec1b934521f">kFLEXSPI_PortA2</a>,
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<br/>
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  <a class="el" href="a00041.html#ggabb9bc1dd69b486ce1d71749d0546d60fa8150e6d14305f5cf93bdab0bc0309413">kFLEXSPI_PortB1</a>,
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<br/>
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  <a class="el" href="a00041.html#ggabb9bc1dd69b486ce1d71749d0546d60fa4112f4afdbf272c68d4adfd7a608c561">kFLEXSPI_PortB2</a>
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<br/>
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}</td></tr>
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<tr class="memdesc:gabb9bc1dd69b486ce1d71749d0546d60f"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI operation port select. <a href="a00041.html#gabb9bc1dd69b486ce1d71749d0546d60f">More...</a><br/></td></tr>
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<tr class="separator:gabb9bc1dd69b486ce1d71749d0546d60f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4014b5aa72e6b4b7d258f377b3793b1a"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga4014b5aa72e6b4b7d258f377b3793b1a">_flexspi_arb_command_source</a> </td></tr>
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<tr class="memdesc:ga4014b5aa72e6b4b7d258f377b3793b1a"><td class="mdescLeft"> </td><td class="mdescRight">Trigger source of current command sequence granted by arbitrator. <a href="a00041.html#ga4014b5aa72e6b4b7d258f377b3793b1a">More...</a><br/></td></tr>
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<tr class="separator:ga4014b5aa72e6b4b7d258f377b3793b1a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga048bc2776406a4a3d3b4213de9e759c2"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga048bc2776406a4a3d3b4213de9e759c2">_flexspi_command_type</a> { <br/>
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  <a class="el" href="a00041.html#gga048bc2776406a4a3d3b4213de9e759c2a434864ad0a1db118a09007d87d2f303d">kFLEXSPI_Command</a>,
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<br/>
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  <a class="el" href="a00041.html#gga048bc2776406a4a3d3b4213de9e759c2a30c6392c74b9546179fe975bdbe7d77e">kFLEXSPI_Config</a>
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<br/>
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}</td></tr>
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<tr class="memdesc:ga048bc2776406a4a3d3b4213de9e759c2"><td class="mdescLeft"> </td><td class="mdescRight">Command type. <a href="a00041.html#ga048bc2776406a4a3d3b4213de9e759c2">More...</a><br/></td></tr>
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<tr class="separator:ga048bc2776406a4a3d3b4213de9e759c2"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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Driver version</h2></td></tr>
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<tr class="memitem:gaccd01fe073049ed2082d17703c25ee3e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gaccd01fe073049ed2082d17703c25ee3e">FSL_FLEXSPI_DRIVER_VERSION</a>   (<a class="el" href="a00272.html#ga812138aa3315b0c6953c1a26130bcc37">MAKE_VERSION</a>(2, 6, 0))</td></tr>
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<tr class="memdesc:gaccd01fe073049ed2082d17703c25ee3e"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI driver version. <a href="#gaccd01fe073049ed2082d17703c25ee3e">More...</a><br/></td></tr>
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<tr class="separator:gaccd01fe073049ed2082d17703c25ee3e"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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Initialization and deinitialization</h2></td></tr>
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<tr class="memitem:ga91bdb9ace32497122bb682c4d6e19eeb"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga91bdb9ace32497122bb682c4d6e19eeb">FLEXSPI_GetInstance</a> (FLEXSPI_Type *base)</td></tr>
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<tr class="memdesc:ga91bdb9ace32497122bb682c4d6e19eeb"><td class="mdescLeft"> </td><td class="mdescRight">Get the instance number for FLEXSPI. <a href="#ga91bdb9ace32497122bb682c4d6e19eeb">More...</a><br/></td></tr>
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<tr class="separator:ga91bdb9ace32497122bb682c4d6e19eeb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga32000baf3445d1b43444fd0dc0dbb643"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00272.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga32000baf3445d1b43444fd0dc0dbb643">FLEXSPI_CheckAndClearError</a> (FLEXSPI_Type *base, uint32_t status)</td></tr>
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<tr class="memdesc:ga32000baf3445d1b43444fd0dc0dbb643"><td class="mdescLeft"> </td><td class="mdescRight">Check and clear IP command execution errors. <a href="#ga32000baf3445d1b43444fd0dc0dbb643">More...</a><br/></td></tr>
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<tr class="separator:ga32000baf3445d1b43444fd0dc0dbb643"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8f12065e78d8a8c6527b0a937f06316d"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga8f12065e78d8a8c6527b0a937f06316d">FLEXSPI_Init</a> (FLEXSPI_Type *base, const <a class="el" href="a00041.html#gaf39e19e99ab773e4f0cac969eecce062">flexspi_config_t</a> *config)</td></tr>
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<tr class="memdesc:ga8f12065e78d8a8c6527b0a937f06316d"><td class="mdescLeft"> </td><td class="mdescRight">Initializes the FLEXSPI module and internal state. <a href="#ga8f12065e78d8a8c6527b0a937f06316d">More...</a><br/></td></tr>
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<tr class="separator:ga8f12065e78d8a8c6527b0a937f06316d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga87d69b2d33a696ec0f1f9e9a361c0e4b"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga87d69b2d33a696ec0f1f9e9a361c0e4b">FLEXSPI_GetDefaultConfig</a> (<a class="el" href="a00041.html#gaf39e19e99ab773e4f0cac969eecce062">flexspi_config_t</a> *config)</td></tr>
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<tr class="memdesc:ga87d69b2d33a696ec0f1f9e9a361c0e4b"><td class="mdescLeft"> </td><td class="mdescRight">Gets default settings for FLEXSPI. <a href="#ga87d69b2d33a696ec0f1f9e9a361c0e4b">More...</a><br/></td></tr>
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<tr class="separator:ga87d69b2d33a696ec0f1f9e9a361c0e4b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaad2d8ae42188749382c0d1dd0f6572d0"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gaad2d8ae42188749382c0d1dd0f6572d0">FLEXSPI_Deinit</a> (FLEXSPI_Type *base)</td></tr>
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<tr class="memdesc:gaad2d8ae42188749382c0d1dd0f6572d0"><td class="mdescLeft"> </td><td class="mdescRight">Deinitializes the FLEXSPI module. <a href="#gaad2d8ae42188749382c0d1dd0f6572d0">More...</a><br/></td></tr>
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<tr class="separator:gaad2d8ae42188749382c0d1dd0f6572d0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga03e96ef7a2fbf0c6a931b4d6701bb573"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga03e96ef7a2fbf0c6a931b4d6701bb573">FLEXSPI_UpdateDllValue</a> (FLEXSPI_Type *base, <a class="el" href="a00041.html#ga5a70bb5d4f28a1763a0224bb8298d4d7">flexspi_device_config_t</a> *config, <a class="el" href="a00041.html#ga848f4d71e4802faf8a5d543545ee5110">flexspi_port_t</a> port)</td></tr>
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<tr class="memdesc:ga03e96ef7a2fbf0c6a931b4d6701bb573"><td class="mdescLeft"> </td><td class="mdescRight">Update FLEXSPI DLL value depending on currently flexspi root clock. <a href="#ga03e96ef7a2fbf0c6a931b4d6701bb573">More...</a><br/></td></tr>
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<tr class="separator:ga03e96ef7a2fbf0c6a931b4d6701bb573"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga43bbcb0a954c93243a0dc472e07db7d3"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga43bbcb0a954c93243a0dc472e07db7d3">FLEXSPI_SetFlashConfig</a> (FLEXSPI_Type *base, <a class="el" href="a00041.html#ga5a70bb5d4f28a1763a0224bb8298d4d7">flexspi_device_config_t</a> *config, <a class="el" href="a00041.html#ga848f4d71e4802faf8a5d543545ee5110">flexspi_port_t</a> port)</td></tr>
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<tr class="memdesc:ga43bbcb0a954c93243a0dc472e07db7d3"><td class="mdescLeft"> </td><td class="mdescRight">Configures the connected device parameter. <a href="#ga43bbcb0a954c93243a0dc472e07db7d3">More...</a><br/></td></tr>
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<tr class="separator:ga43bbcb0a954c93243a0dc472e07db7d3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9d6bcd77beebeff56c9e3ffda2530f36"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga9d6bcd77beebeff56c9e3ffda2530f36">FLEXSPI_SoftwareReset</a> (FLEXSPI_Type *base)</td></tr>
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<tr class="memdesc:ga9d6bcd77beebeff56c9e3ffda2530f36"><td class="mdescLeft"> </td><td class="mdescRight">Software reset for the FLEXSPI logic. <a href="#ga9d6bcd77beebeff56c9e3ffda2530f36">More...</a><br/></td></tr>
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<tr class="separator:ga9d6bcd77beebeff56c9e3ffda2530f36"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga03b576eeef78cff73cfc5aba065a99d4"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga03b576eeef78cff73cfc5aba065a99d4">FLEXSPI_Enable</a> (FLEXSPI_Type *base, bool enable)</td></tr>
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<tr class="memdesc:ga03b576eeef78cff73cfc5aba065a99d4"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables the FLEXSPI module. <a href="#ga03b576eeef78cff73cfc5aba065a99d4">More...</a><br/></td></tr>
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<tr class="separator:ga03b576eeef78cff73cfc5aba065a99d4"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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Interrupts</h2></td></tr>
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<tr class="memitem:ga2f7c7641c3531892350f8fb6bfedba67"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga2f7c7641c3531892350f8fb6bfedba67">FLEXSPI_EnableInterrupts</a> (FLEXSPI_Type *base, uint32_t mask)</td></tr>
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<tr class="memdesc:ga2f7c7641c3531892350f8fb6bfedba67"><td class="mdescLeft"> </td><td class="mdescRight">Enables the FLEXSPI interrupts. <a href="#ga2f7c7641c3531892350f8fb6bfedba67">More...</a><br/></td></tr>
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<tr class="separator:ga2f7c7641c3531892350f8fb6bfedba67"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0ed8c3ce0f2b36a1c43d9fa133630455"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga0ed8c3ce0f2b36a1c43d9fa133630455">FLEXSPI_DisableInterrupts</a> (FLEXSPI_Type *base, uint32_t mask)</td></tr>
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<tr class="memdesc:ga0ed8c3ce0f2b36a1c43d9fa133630455"><td class="mdescLeft"> </td><td class="mdescRight">Disable the FLEXSPI interrupts. <a href="#ga0ed8c3ce0f2b36a1c43d9fa133630455">More...</a><br/></td></tr>
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<tr class="separator:ga0ed8c3ce0f2b36a1c43d9fa133630455"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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DMA control</h2></td></tr>
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<tr class="memitem:gad463c753b8ebc2856957adc8ba4e2e41"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gad463c753b8ebc2856957adc8ba4e2e41">FLEXSPI_EnableTxDMA</a> (FLEXSPI_Type *base, bool enable)</td></tr>
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<tr class="memdesc:gad463c753b8ebc2856957adc8ba4e2e41"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables FLEXSPI IP Tx FIFO DMA requests. <a href="#gad463c753b8ebc2856957adc8ba4e2e41">More...</a><br/></td></tr>
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<tr class="separator:gad463c753b8ebc2856957adc8ba4e2e41"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf4f5b43a95ecb42717665b540c3b4abd"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gaf4f5b43a95ecb42717665b540c3b4abd">FLEXSPI_EnableRxDMA</a> (FLEXSPI_Type *base, bool enable)</td></tr>
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<tr class="memdesc:gaf4f5b43a95ecb42717665b540c3b4abd"><td class="mdescLeft"> </td><td class="mdescRight">Enables or disables FLEXSPI IP Rx FIFO DMA requests. <a href="#gaf4f5b43a95ecb42717665b540c3b4abd">More...</a><br/></td></tr>
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<tr class="separator:gaf4f5b43a95ecb42717665b540c3b4abd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab0476f9699fc375fee33a5afc7ec5ee8"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gab0476f9699fc375fee33a5afc7ec5ee8">FLEXSPI_GetTxFifoAddress</a> (FLEXSPI_Type *base)</td></tr>
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<tr class="memdesc:gab0476f9699fc375fee33a5afc7ec5ee8"><td class="mdescLeft"> </td><td class="mdescRight">Gets FLEXSPI IP tx fifo address for DMA transfer. <a href="#gab0476f9699fc375fee33a5afc7ec5ee8">More...</a><br/></td></tr>
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<tr class="separator:gab0476f9699fc375fee33a5afc7ec5ee8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga34c014e6d3d86f854f2ff767f0891dbe"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga34c014e6d3d86f854f2ff767f0891dbe">FLEXSPI_GetRxFifoAddress</a> (FLEXSPI_Type *base)</td></tr>
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<tr class="memdesc:ga34c014e6d3d86f854f2ff767f0891dbe"><td class="mdescLeft"> </td><td class="mdescRight">Gets FLEXSPI IP rx fifo address for DMA transfer. <a href="#ga34c014e6d3d86f854f2ff767f0891dbe">More...</a><br/></td></tr>
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<tr class="separator:ga34c014e6d3d86f854f2ff767f0891dbe"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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FIFO control</h2></td></tr>
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<tr class="memitem:gadd183feac77a644fe03802bd2989d1f7"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gadd183feac77a644fe03802bd2989d1f7">FLEXSPI_ResetFifos</a> (FLEXSPI_Type *base, bool txFifo, bool rxFifo)</td></tr>
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<tr class="memdesc:gadd183feac77a644fe03802bd2989d1f7"><td class="mdescLeft"> </td><td class="mdescRight">Clears the FLEXSPI IP FIFO logic. <a href="#gadd183feac77a644fe03802bd2989d1f7">More...</a><br/></td></tr>
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<tr class="separator:gadd183feac77a644fe03802bd2989d1f7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga10b56b803c3aeb60ff94e2385230799e"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga10b56b803c3aeb60ff94e2385230799e">FLEXSPI_GetFifoCounts</a> (FLEXSPI_Type *base, size_t *txCount, size_t *rxCount)</td></tr>
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<tr class="memdesc:ga10b56b803c3aeb60ff94e2385230799e"><td class="mdescLeft"> </td><td class="mdescRight">Gets the valid data entries in the FLEXSPI FIFOs. <a href="#ga10b56b803c3aeb60ff94e2385230799e">More...</a><br/></td></tr>
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<tr class="separator:ga10b56b803c3aeb60ff94e2385230799e"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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Status</h2></td></tr>
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<tr class="memitem:ga522bf36c8d24a9e50756fbe2c92982fc"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga522bf36c8d24a9e50756fbe2c92982fc">FLEXSPI_GetInterruptStatusFlags</a> (FLEXSPI_Type *base)</td></tr>
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<tr class="memdesc:ga522bf36c8d24a9e50756fbe2c92982fc"><td class="mdescLeft"> </td><td class="mdescRight">Get the FLEXSPI interrupt status flags. <a href="#ga522bf36c8d24a9e50756fbe2c92982fc">More...</a><br/></td></tr>
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<tr class="separator:ga522bf36c8d24a9e50756fbe2c92982fc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3a374e8190cb2a45fa1eea1ffa31b912"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga3a374e8190cb2a45fa1eea1ffa31b912">FLEXSPI_ClearInterruptStatusFlags</a> (FLEXSPI_Type *base, uint32_t mask)</td></tr>
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<tr class="memdesc:ga3a374e8190cb2a45fa1eea1ffa31b912"><td class="mdescLeft"> </td><td class="mdescRight">Get the FLEXSPI interrupt status flags. <a href="#ga3a374e8190cb2a45fa1eea1ffa31b912">More...</a><br/></td></tr>
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<tr class="separator:ga3a374e8190cb2a45fa1eea1ffa31b912"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabfa17750808e32b1bd7504abd27f0165"><td class="memItemLeft" align="right" valign="top">static <a class="el" href="a00041.html#ga00a721e456c8a4334ba7fee0a0c2a3b8">flexspi_arb_command_source_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gabfa17750808e32b1bd7504abd27f0165">FLEXSPI_GetArbitratorCommandSource</a> (FLEXSPI_Type *base)</td></tr>
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<tr class="memdesc:gabfa17750808e32b1bd7504abd27f0165"><td class="mdescLeft"> </td><td class="mdescRight">Gets the trigger source of current command sequence granted by arbitrator. <a href="#gabfa17750808e32b1bd7504abd27f0165">More...</a><br/></td></tr>
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<tr class="separator:gabfa17750808e32b1bd7504abd27f0165"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad88eb12348e8f55a70373b400d1de4fc"><td class="memItemLeft" align="right" valign="top">static <a class="el" href="a00041.html#ga0fac520bfee4292d93c17a3227fb38d5">flexspi_ip_error_code_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gad88eb12348e8f55a70373b400d1de4fc">FLEXSPI_GetIPCommandErrorCode</a> (FLEXSPI_Type *base, uint8_t *index)</td></tr>
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<tr class="memdesc:gad88eb12348e8f55a70373b400d1de4fc"><td class="mdescLeft"> </td><td class="mdescRight">Gets the error code when IP command error detected. <a href="#gad88eb12348e8f55a70373b400d1de4fc">More...</a><br/></td></tr>
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<tr class="separator:gad88eb12348e8f55a70373b400d1de4fc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga33ef8b44ab234ba4c66dda29d3dad20c"><td class="memItemLeft" align="right" valign="top">static <a class="el" href="a00041.html#ga849aacfbb909a2b403d39ca1b23f7f85">flexspi_ahb_error_code_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga33ef8b44ab234ba4c66dda29d3dad20c">FLEXSPI_GetAHBCommandErrorCode</a> (FLEXSPI_Type *base, uint8_t *index)</td></tr>
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<tr class="memdesc:ga33ef8b44ab234ba4c66dda29d3dad20c"><td class="mdescLeft"> </td><td class="mdescRight">Gets the error code when AHB command error detected. <a href="#ga33ef8b44ab234ba4c66dda29d3dad20c">More...</a><br/></td></tr>
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<tr class="separator:ga33ef8b44ab234ba4c66dda29d3dad20c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7ba5bbdc98dd7c46c46ae4f5c5cad2da"><td class="memItemLeft" align="right" valign="top">static bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga7ba5bbdc98dd7c46c46ae4f5c5cad2da">FLEXSPI_GetBusIdleStatus</a> (FLEXSPI_Type *base)</td></tr>
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<tr class="memdesc:ga7ba5bbdc98dd7c46c46ae4f5c5cad2da"><td class="mdescLeft"> </td><td class="mdescRight">Returns whether the bus is idle. <a href="#ga7ba5bbdc98dd7c46c46ae4f5c5cad2da">More...</a><br/></td></tr>
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<tr class="separator:ga7ba5bbdc98dd7c46c46ae4f5c5cad2da"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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Bus Operations</h2></td></tr>
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<tr class="memitem:ga482b015aec3e0491c9359e698ca638a1"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga482b015aec3e0491c9359e698ca638a1">FLEXSPI_UpdateRxSampleClock</a> (FLEXSPI_Type *base, <a class="el" href="a00041.html#ga3925749f15492f4ee50dc375b889a398">flexspi_read_sample_clock_t</a> clockSource)</td></tr>
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<tr class="memdesc:ga482b015aec3e0491c9359e698ca638a1"><td class="mdescLeft"> </td><td class="mdescRight">Update read sample clock source. <a href="#ga482b015aec3e0491c9359e698ca638a1">More...</a><br/></td></tr>
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<tr class="separator:ga482b015aec3e0491c9359e698ca638a1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga00e6635ac6316340e94ec67306cd7e83"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga00e6635ac6316340e94ec67306cd7e83">FLEXSPI_EnableIPParallelMode</a> (FLEXSPI_Type *base, bool enable)</td></tr>
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<tr class="memdesc:ga00e6635ac6316340e94ec67306cd7e83"><td class="mdescLeft"> </td><td class="mdescRight">Enables/disables the FLEXSPI IP command parallel mode. <a href="#ga00e6635ac6316340e94ec67306cd7e83">More...</a><br/></td></tr>
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<tr class="separator:ga00e6635ac6316340e94ec67306cd7e83"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga948ce06b1ddd4cf1816701d82816ba96"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga948ce06b1ddd4cf1816701d82816ba96">FLEXSPI_EnableAHBParallelMode</a> (FLEXSPI_Type *base, bool enable)</td></tr>
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<tr class="memdesc:ga948ce06b1ddd4cf1816701d82816ba96"><td class="mdescLeft"> </td><td class="mdescRight">Enables/disables the FLEXSPI AHB command parallel mode. <a href="#ga948ce06b1ddd4cf1816701d82816ba96">More...</a><br/></td></tr>
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<tr class="separator:ga948ce06b1ddd4cf1816701d82816ba96"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga160f066685276e79b0f79968e3087489"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga160f066685276e79b0f79968e3087489">FLEXSPI_UpdateLUT</a> (FLEXSPI_Type *base, uint32_t index, const uint32_t *cmd, uint32_t count)</td></tr>
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<tr class="memdesc:ga160f066685276e79b0f79968e3087489"><td class="mdescLeft"> </td><td class="mdescRight">Updates the LUT table. <a href="#ga160f066685276e79b0f79968e3087489">More...</a><br/></td></tr>
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<tr class="separator:ga160f066685276e79b0f79968e3087489"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga054519fc1555d02f1c3e6652631e50ae"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga054519fc1555d02f1c3e6652631e50ae">FLEXSPI_WriteData</a> (FLEXSPI_Type *base, uint32_t data, uint8_t fifoIndex)</td></tr>
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<tr class="memdesc:ga054519fc1555d02f1c3e6652631e50ae"><td class="mdescLeft"> </td><td class="mdescRight">Writes data into FIFO. <a href="#ga054519fc1555d02f1c3e6652631e50ae">More...</a><br/></td></tr>
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<tr class="separator:ga054519fc1555d02f1c3e6652631e50ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga05c507ce3babcb459cda71a4ab347eae"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga05c507ce3babcb459cda71a4ab347eae">FLEXSPI_ReadData</a> (FLEXSPI_Type *base, uint8_t fifoIndex)</td></tr>
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<tr class="memdesc:ga05c507ce3babcb459cda71a4ab347eae"><td class="mdescLeft"> </td><td class="mdescRight">Receives data from data FIFO. <a href="#ga05c507ce3babcb459cda71a4ab347eae">More...</a><br/></td></tr>
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<tr class="separator:ga05c507ce3babcb459cda71a4ab347eae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9707db6bb7aaac807060bf4036554787"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00272.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga9707db6bb7aaac807060bf4036554787">FLEXSPI_WriteBlocking</a> (FLEXSPI_Type *base, uint8_t *buffer, size_t size)</td></tr>
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<tr class="memdesc:ga9707db6bb7aaac807060bf4036554787"><td class="mdescLeft"> </td><td class="mdescRight">Sends a buffer of data bytes using blocking method. <a href="#ga9707db6bb7aaac807060bf4036554787">More...</a><br/></td></tr>
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<tr class="separator:ga9707db6bb7aaac807060bf4036554787"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga60aa4f8455c65b2c90ff4e42fc425c82"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00272.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga60aa4f8455c65b2c90ff4e42fc425c82">FLEXSPI_ReadBlocking</a> (FLEXSPI_Type *base, uint8_t *buffer, size_t size)</td></tr>
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<tr class="memdesc:ga60aa4f8455c65b2c90ff4e42fc425c82"><td class="mdescLeft"> </td><td class="mdescRight">Receives a buffer of data bytes using a blocking method. <a href="#ga60aa4f8455c65b2c90ff4e42fc425c82">More...</a><br/></td></tr>
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<tr class="separator:ga60aa4f8455c65b2c90ff4e42fc425c82"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7a3c2f27e20ac2862f61d5e393abf8d7"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00272.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga7a3c2f27e20ac2862f61d5e393abf8d7">FLEXSPI_TransferBlocking</a> (FLEXSPI_Type *base, <a class="el" href="a00041.html#gae98634a0e73294cf48b94cab5d07b196">flexspi_transfer_t</a> *xfer)</td></tr>
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<tr class="memdesc:ga7a3c2f27e20ac2862f61d5e393abf8d7"><td class="mdescLeft"> </td><td class="mdescRight">Execute command to transfer a buffer data bytes using a blocking method. <a href="#ga7a3c2f27e20ac2862f61d5e393abf8d7">More...</a><br/></td></tr>
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<tr class="separator:ga7a3c2f27e20ac2862f61d5e393abf8d7"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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Transactional</h2></td></tr>
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<tr class="memitem:ga6f3f9cb5f3499ba238a3f316949742f0"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga6f3f9cb5f3499ba238a3f316949742f0">FLEXSPI_TransferCreateHandle</a> (FLEXSPI_Type *base, <a class="el" href="a00041.html#a00420">flexspi_handle_t</a> *handle, <a class="el" href="a00041.html#ga40558fffabe6bc75ad0d978ac56726a7">flexspi_transfer_callback_t</a> callback, void *userData)</td></tr>
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<tr class="memdesc:ga6f3f9cb5f3499ba238a3f316949742f0"><td class="mdescLeft"> </td><td class="mdescRight">Initializes the FLEXSPI handle which is used in transactional functions. <a href="#ga6f3f9cb5f3499ba238a3f316949742f0">More...</a><br/></td></tr>
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<tr class="separator:ga6f3f9cb5f3499ba238a3f316949742f0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9d2eccbfd3eaf1554fd287a4a808956d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00272.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga9d2eccbfd3eaf1554fd287a4a808956d">FLEXSPI_TransferNonBlocking</a> (FLEXSPI_Type *base, <a class="el" href="a00041.html#a00420">flexspi_handle_t</a> *handle, <a class="el" href="a00041.html#gae98634a0e73294cf48b94cab5d07b196">flexspi_transfer_t</a> *xfer)</td></tr>
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<tr class="memdesc:ga9d2eccbfd3eaf1554fd287a4a808956d"><td class="mdescLeft"> </td><td class="mdescRight">Performs a interrupt non-blocking transfer on the FLEXSPI bus. <a href="#ga9d2eccbfd3eaf1554fd287a4a808956d">More...</a><br/></td></tr>
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<tr class="separator:ga9d2eccbfd3eaf1554fd287a4a808956d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0aaa78d6b73d8f45063c21378fd60eb2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00272.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga0aaa78d6b73d8f45063c21378fd60eb2">FLEXSPI_TransferGetCount</a> (FLEXSPI_Type *base, <a class="el" href="a00041.html#a00420">flexspi_handle_t</a> *handle, size_t *count)</td></tr>
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<tr class="memdesc:ga0aaa78d6b73d8f45063c21378fd60eb2"><td class="mdescLeft"> </td><td class="mdescRight">Gets the master transfer status during a interrupt non-blocking transfer. <a href="#ga0aaa78d6b73d8f45063c21378fd60eb2">More...</a><br/></td></tr>
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<tr class="separator:ga0aaa78d6b73d8f45063c21378fd60eb2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga70042fa4a608b8e1db6df774a3d0a120"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ga70042fa4a608b8e1db6df774a3d0a120">FLEXSPI_TransferAbort</a> (FLEXSPI_Type *base, <a class="el" href="a00041.html#a00420">flexspi_handle_t</a> *handle)</td></tr>
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<tr class="memdesc:ga70042fa4a608b8e1db6df774a3d0a120"><td class="mdescLeft"> </td><td class="mdescRight">Aborts an interrupt non-blocking transfer early. <a href="#ga70042fa4a608b8e1db6df774a3d0a120">More...</a><br/></td></tr>
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<tr class="separator:ga70042fa4a608b8e1db6df774a3d0a120"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa62fce61693a55bc12f31176524da48d"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#gaa62fce61693a55bc12f31176524da48d">FLEXSPI_TransferHandleIRQ</a> (FLEXSPI_Type *base, <a class="el" href="a00041.html#a00420">flexspi_handle_t</a> *handle)</td></tr>
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<tr class="memdesc:gaa62fce61693a55bc12f31176524da48d"><td class="mdescLeft"> </td><td class="mdescRight">Master interrupt handler. <a href="#gaa62fce61693a55bc12f31176524da48d">More...</a><br/></td></tr>
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</table>
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<hr/><h2 class="groupheader">Data Structure Documentation</h2>
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<a name="a00417" id="a00417"></a>
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<div class="memitem">
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<td class="memname">struct _flexspi_config</td>
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</div><div class="memdoc">
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:ab93a70b962e412c67056c594ccb253d9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00041.html#ga3925749f15492f4ee50dc375b889a398">flexspi_read_sample_clock_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ab93a70b962e412c67056c594ccb253d9">rxSampleClock</a></td></tr>
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<tr class="memdesc:ab93a70b962e412c67056c594ccb253d9"><td class="mdescLeft"> </td><td class="mdescRight">Sample Clock source selection for Flash Reading. <a href="#ab93a70b962e412c67056c594ccb253d9">More...</a><br/></td></tr>
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<tr class="separator:ab93a70b962e412c67056c594ccb253d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aac53cf0a47755797a0b181da0d03e5fa"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#aac53cf0a47755797a0b181da0d03e5fa">enableSckFreeRunning</a></td></tr>
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<tr class="memdesc:aac53cf0a47755797a0b181da0d03e5fa"><td class="mdescLeft"> </td><td class="mdescRight">Enable/disable SCK output free-running. <a href="#aac53cf0a47755797a0b181da0d03e5fa">More...</a><br/></td></tr>
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<tr class="separator:aac53cf0a47755797a0b181da0d03e5fa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad9814ec66e0f5bb472d1a90af02c260e"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ad9814ec66e0f5bb472d1a90af02c260e">enableCombination</a></td></tr>
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<tr class="memdesc:ad9814ec66e0f5bb472d1a90af02c260e"><td class="mdescLeft"> </td><td class="mdescRight"><pre class="fragment"> Enable/disable combining PORT A and B Data Pins
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</pre><p> (SIOA[3:0] and SIOB[3:0]) to support Flash Octal mode. <a href="#ad9814ec66e0f5bb472d1a90af02c260e">More...</a><br/></td></tr>
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<tr class="separator:ad9814ec66e0f5bb472d1a90af02c260e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2384344decb673f8f71ef6336fd9883e"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a2384344decb673f8f71ef6336fd9883e">enableDoze</a></td></tr>
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<tr class="memdesc:a2384344decb673f8f71ef6336fd9883e"><td class="mdescLeft"> </td><td class="mdescRight">Enable/disable doze mode support. <a href="#a2384344decb673f8f71ef6336fd9883e">More...</a><br/></td></tr>
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<tr class="memitem:a5fa118eacd8b42ec7aff675794785e89"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a5fa118eacd8b42ec7aff675794785e89">enableHalfSpeedAccess</a></td></tr>
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<tr class="memdesc:a5fa118eacd8b42ec7aff675794785e89"><td class="mdescLeft"> </td><td class="mdescRight"><pre class="fragment">Enable/disable divide by 2 of the clock for half
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</pre><p> speed commands. <a href="#a5fa118eacd8b42ec7aff675794785e89">More...</a><br/></td></tr>
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<tr class="separator:a5fa118eacd8b42ec7aff675794785e89"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3a0fb2ab371617aa9416c2598f9c65a5"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a3a0fb2ab371617aa9416c2598f9c65a5">enableSckBDiffOpt</a></td></tr>
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<tr class="memdesc:a3a0fb2ab371617aa9416c2598f9c65a5"><td class="mdescLeft"> </td><td class="mdescRight"><pre class="fragment">Enable/disable SCKB pad use as SCKA differential clock
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</pre><p> output, when enable, Port B flash access is not available. <a href="#a3a0fb2ab371617aa9416c2598f9c65a5">More...</a><br/></td></tr>
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<tr class="separator:a3a0fb2ab371617aa9416c2598f9c65a5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af4c3027e50ab69d35a015142ade5bb62"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#af4c3027e50ab69d35a015142ade5bb62">enableSameConfigForAll</a></td></tr>
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<tr class="memdesc:af4c3027e50ab69d35a015142ade5bb62"><td class="mdescLeft"> </td><td class="mdescRight"><pre class="fragment">Enable/disable same configuration for all connected devices
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</pre><p> when enabled, same configuration in FLASHA1CRx is applied to all. <a href="#af4c3027e50ab69d35a015142ade5bb62">More...</a><br/></td></tr>
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<tr class="separator:af4c3027e50ab69d35a015142ade5bb62"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a17f7b7f6a97f7d4d57ca0d77f847fa92"><td class="memItemLeft" align="right" valign="top">uint16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a17f7b7f6a97f7d4d57ca0d77f847fa92">seqTimeoutCycle</a></td></tr>
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<tr class="memdesc:a17f7b7f6a97f7d4d57ca0d77f847fa92"><td class="mdescLeft"> </td><td class="mdescRight"><pre class="fragment"> Timeout wait cycle for command sequence execution,
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</pre><p> timeout after ahbGrantTimeoutCyle*1024 serial root clock cycles. <a href="#a17f7b7f6a97f7d4d57ca0d77f847fa92">More...</a><br/></td></tr>
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<tr class="separator:a17f7b7f6a97f7d4d57ca0d77f847fa92"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7a4d7cc1fd63f9b896e62d32c3a0e95f"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a7a4d7cc1fd63f9b896e62d32c3a0e95f">ipGrantTimeoutCycle</a></td></tr>
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<tr class="memdesc:a7a4d7cc1fd63f9b896e62d32c3a0e95f"><td class="mdescLeft"> </td><td class="mdescRight"><pre class="fragment">Timeout wait cycle for IP command grant, timeout after
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</pre><p> ipGrantTimeoutCycle*1024 AHB clock cycles. <a href="#a7a4d7cc1fd63f9b896e62d32c3a0e95f">More...</a><br/></td></tr>
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<tr class="separator:a7a4d7cc1fd63f9b896e62d32c3a0e95f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a11e4f7ca7d4499444f65eac2c71ed64e"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a11e4f7ca7d4499444f65eac2c71ed64e">txWatermark</a></td></tr>
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<tr class="memdesc:a11e4f7ca7d4499444f65eac2c71ed64e"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI IP transmit watermark value. <a href="#a11e4f7ca7d4499444f65eac2c71ed64e">More...</a><br/></td></tr>
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<tr class="memitem:ae7bb87d255b05de7c01ed2e566804d1f"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ae7bb87d255b05de7c01ed2e566804d1f">rxWatermark</a></td></tr>
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<tr class="memdesc:ae7bb87d255b05de7c01ed2e566804d1f"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI receive watermark value. <a href="#ae7bb87d255b05de7c01ed2e566804d1f">More...</a><br/></td></tr>
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<tr class="separator:ae7bb87d255b05de7c01ed2e566804d1f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7ab1cdc43e0c5d16bc1f90ebf42eb561"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a7ab1cdc43e0c5d16bc1f90ebf42eb561">enableAHBWriteIpTxFifo</a></td></tr>
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<tr class="memdesc:a7ab1cdc43e0c5d16bc1f90ebf42eb561"><td class="mdescLeft"> </td><td class="mdescRight">Enable AHB bus write access to IP TX FIFO. <a href="#a7ab1cdc43e0c5d16bc1f90ebf42eb561">More...</a><br/></td></tr>
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<tr class="separator:a7ab1cdc43e0c5d16bc1f90ebf42eb561"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5193389b6976a31c46bea2b832ec39ce"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a5193389b6976a31c46bea2b832ec39ce">enableAHBWriteIpRxFifo</a></td></tr>
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<tr class="memdesc:a5193389b6976a31c46bea2b832ec39ce"><td class="mdescLeft"> </td><td class="mdescRight">Enable AHB bus write access to IP RX FIFO. <a href="#a5193389b6976a31c46bea2b832ec39ce">More...</a><br/></td></tr>
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<tr class="memitem:a2cccd728bae354ccd480ef77f4280359"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a2cccd728bae354ccd480ef77f4280359">ahbGrantTimeoutCycle</a></td></tr>
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<tr class="memdesc:a2cccd728bae354ccd480ef77f4280359"><td class="mdescLeft"> </td><td class="mdescRight"><pre class="fragment">Timeout wait cycle for AHB command grant,
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</pre><p> timeout after ahbGrantTimeoutCyle*1024 AHB clock cycles. <a href="#a2cccd728bae354ccd480ef77f4280359">More...</a><br/></td></tr>
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<tr class="memitem:a39c02110e809a7b015ced656e03c4dff"><td class="memItemLeft" align="right" valign="top">uint16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a39c02110e809a7b015ced656e03c4dff">ahbBusTimeoutCycle</a></td></tr>
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<tr class="memdesc:a39c02110e809a7b015ced656e03c4dff"><td class="mdescLeft"> </td><td class="mdescRight"><pre class="fragment"> Timeout wait cycle for AHB read/write access,
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</pre><p> timeout after ahbBusTimeoutCycle*1024 AHB clock cycles. <a href="#a39c02110e809a7b015ced656e03c4dff">More...</a><br/></td></tr>
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<tr class="memitem:a836228398df7b82861a91a260d483f0d"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a836228398df7b82861a91a260d483f0d">resumeWaitCycle</a></td></tr>
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<tr class="memdesc:a836228398df7b82861a91a260d483f0d"><td class="mdescLeft"> </td><td class="mdescRight"><pre class="fragment">Wait cycle for idle state before suspended command sequence
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</pre><p> resume, timeout after ahbBusTimeoutCycle AHB clock cycles. <a href="#a836228398df7b82861a91a260d483f0d">More...</a><br/></td></tr>
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<tr class="memitem:a8625ab1e9a4297feb560daaa3f02a32c"><td class="memItemLeft" align="right" valign="top">flexspi_ahbBuffer_config_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a8625ab1e9a4297feb560daaa3f02a32c">buffer</a> [FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNT]</td></tr>
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<tr class="memdesc:a8625ab1e9a4297feb560daaa3f02a32c"><td class="mdescLeft"> </td><td class="mdescRight">AHB buffer size. <a href="#a8625ab1e9a4297feb560daaa3f02a32c">More...</a><br/></td></tr>
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<tr class="separator:a8625ab1e9a4297feb560daaa3f02a32c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3ffaa97a04b06e8a08314f37fd417325"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a3ffaa97a04b06e8a08314f37fd417325">enableClearAHBBufferOpt</a></td></tr>
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<tr class="memdesc:a3ffaa97a04b06e8a08314f37fd417325"><td class="mdescLeft"> </td><td class="mdescRight"><pre class="fragment">Enable/disable automatically clean AHB RX Buffer and TX Buffer
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</pre><p> when FLEXSPI returns STOP mode ACK. <a href="#a3ffaa97a04b06e8a08314f37fd417325">More...</a><br/></td></tr>
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<tr class="memitem:adc36f77c336243b7f1f5108c44286e18"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#adc36f77c336243b7f1f5108c44286e18">enableReadAddressOpt</a></td></tr>
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<tr class="memdesc:adc36f77c336243b7f1f5108c44286e18"><td class="mdescLeft"> </td><td class="mdescRight">Enable/disable remove AHB read burst start address alignment limitation. <a href="#adc36f77c336243b7f1f5108c44286e18">More...</a><br/></td></tr>
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<tr class="separator:adc36f77c336243b7f1f5108c44286e18"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4a8c83704bfa2fba9fd27afae755cdc0"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a4a8c83704bfa2fba9fd27afae755cdc0">enableAHBPrefetch</a></td></tr>
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<tr class="memdesc:a4a8c83704bfa2fba9fd27afae755cdc0"><td class="mdescLeft"> </td><td class="mdescRight"><pre class="fragment">Enable/disable AHB read prefetch feature, when enabled, FLEXSPI
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</pre><p> will fetch more data than current AHB burst. <a href="#a4a8c83704bfa2fba9fd27afae755cdc0">More...</a><br/></td></tr>
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<tr class="separator:a4a8c83704bfa2fba9fd27afae755cdc0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa8e89cd73c3dc0c25818760e65f71330"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#aa8e89cd73c3dc0c25818760e65f71330">enableAHBBufferable</a></td></tr>
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<tr class="memdesc:aa8e89cd73c3dc0c25818760e65f71330"><td class="mdescLeft"> </td><td class="mdescRight"><pre class="fragment">Enable/disable AHB bufferable write access support, when enabled,
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</pre><p> FLEXSPI return before waiting for command execution finished. <a href="#aa8e89cd73c3dc0c25818760e65f71330">More...</a><br/></td></tr>
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<tr class="memitem:a3b5f6efffb62ad1a2e9f5d98dc76ba36"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a3b5f6efffb62ad1a2e9f5d98dc76ba36">enableAHBCachable</a></td></tr>
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<tr class="memdesc:a3b5f6efffb62ad1a2e9f5d98dc76ba36"><td class="mdescLeft"> </td><td class="mdescRight">Enable AHB bus cachable read access support. <a href="#a3b5f6efffb62ad1a2e9f5d98dc76ba36">More...</a><br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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<td class="memname"><a class="el" href="a00041.html#ga3925749f15492f4ee50dc375b889a398">flexspi_read_sample_clock_t</a> _flexspi_config::rxSampleClock</td>
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<td class="memname">bool _flexspi_config::enableSameConfigForAll</td>
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<td class="memname">uint16_t _flexspi_config::seqTimeoutCycle</td>
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<td class="memname">uint8_t _flexspi_config::ipGrantTimeoutCycle</td>
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<td class="memname">uint8_t _flexspi_config::ahbGrantTimeoutCycle</td>
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<td class="memname">flexspi_ahbBuffer_config_t _flexspi_config::buffer[FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNT]</td>
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<td class="memname">bool _flexspi_config::enableReadAddressOpt</td>
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<p>when enable, there is no AHB read burst start address alignment limitation. </p>
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<td class="memname">bool _flexspi_config::enableAHBCachable</td>
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<td class="memname">struct _flexspi_device_config</td>
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:ada4f7b68383877a039072875d711e173"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ada4f7b68383877a039072875d711e173">flexspiRootClk</a></td></tr>
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<tr class="memdesc:ada4f7b68383877a039072875d711e173"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI serial root clock. <a href="#ada4f7b68383877a039072875d711e173">More...</a><br/></td></tr>
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<tr class="separator:ada4f7b68383877a039072875d711e173"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab5474dc0d9a00d6b19ce9851ad416fa8"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ab5474dc0d9a00d6b19ce9851ad416fa8">isSck2Enabled</a></td></tr>
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<tr class="memdesc:ab5474dc0d9a00d6b19ce9851ad416fa8"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI use SCK2. <a href="#ab5474dc0d9a00d6b19ce9851ad416fa8">More...</a><br/></td></tr>
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<tr class="separator:ab5474dc0d9a00d6b19ce9851ad416fa8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abdcc90de5832fc28832998cfbf3b3ef2"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#abdcc90de5832fc28832998cfbf3b3ef2">flashSize</a></td></tr>
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<tr class="memdesc:abdcc90de5832fc28832998cfbf3b3ef2"><td class="mdescLeft"> </td><td class="mdescRight">Flash size in KByte. <a href="#abdcc90de5832fc28832998cfbf3b3ef2">More...</a><br/></td></tr>
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<tr class="separator:abdcc90de5832fc28832998cfbf3b3ef2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3e71bbfad34914a224031e89811bb783"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00041.html#gaac9a0472f45df2317e4e62acbd920da1">flexspi_cs_interval_cycle_unit_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a3e71bbfad34914a224031e89811bb783">CSIntervalUnit</a></td></tr>
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<tr class="memdesc:a3e71bbfad34914a224031e89811bb783"><td class="mdescLeft"> </td><td class="mdescRight">CS interval unit, 1 or 256 cycle. <a href="#a3e71bbfad34914a224031e89811bb783">More...</a><br/></td></tr>
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<tr class="separator:a3e71bbfad34914a224031e89811bb783"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7f157821ed42772a1dd6c8c9bbb925cc"><td class="memItemLeft" align="right" valign="top">uint16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a7f157821ed42772a1dd6c8c9bbb925cc">CSInterval</a></td></tr>
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<tr class="memdesc:a7f157821ed42772a1dd6c8c9bbb925cc"><td class="mdescLeft"> </td><td class="mdescRight"><pre class="fragment">CS line assert interval, multiply CS interval unit to
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</pre><p> get the CS line assert interval cycles. <a href="#a7f157821ed42772a1dd6c8c9bbb925cc">More...</a><br/></td></tr>
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<tr class="separator:a7f157821ed42772a1dd6c8c9bbb925cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1203ad535737994961586b135bdbee1a"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a1203ad535737994961586b135bdbee1a">CSHoldTime</a></td></tr>
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<tr class="memdesc:a1203ad535737994961586b135bdbee1a"><td class="mdescLeft"> </td><td class="mdescRight">CS line hold time. <a href="#a1203ad535737994961586b135bdbee1a">More...</a><br/></td></tr>
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<tr class="separator:a1203ad535737994961586b135bdbee1a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aadfd5e7c79fff9992e0dda042d36d386"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#aadfd5e7c79fff9992e0dda042d36d386">CSSetupTime</a></td></tr>
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<tr class="memdesc:aadfd5e7c79fff9992e0dda042d36d386"><td class="mdescLeft"> </td><td class="mdescRight">CS line setup time. <a href="#aadfd5e7c79fff9992e0dda042d36d386">More...</a><br/></td></tr>
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<tr class="separator:aadfd5e7c79fff9992e0dda042d36d386"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aba530a1c1c51cb20303e220134ed028e"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#aba530a1c1c51cb20303e220134ed028e">dataValidTime</a></td></tr>
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<tr class="memdesc:aba530a1c1c51cb20303e220134ed028e"><td class="mdescLeft"> </td><td class="mdescRight">Data valid time for external device. <a href="#aba530a1c1c51cb20303e220134ed028e">More...</a><br/></td></tr>
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<tr class="separator:aba530a1c1c51cb20303e220134ed028e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac703544139e34bac880be595c00fc4db"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ac703544139e34bac880be595c00fc4db">columnspace</a></td></tr>
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<tr class="memdesc:ac703544139e34bac880be595c00fc4db"><td class="mdescLeft"> </td><td class="mdescRight">Column space size. <a href="#ac703544139e34bac880be595c00fc4db">More...</a><br/></td></tr>
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<tr class="separator:ac703544139e34bac880be595c00fc4db"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a45d3f74fd6385a95e0e0c325e34e031e"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a45d3f74fd6385a95e0e0c325e34e031e">enableWordAddress</a></td></tr>
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<tr class="memdesc:a45d3f74fd6385a95e0e0c325e34e031e"><td class="mdescLeft"> </td><td class="mdescRight">If enable word address. <a href="#a45d3f74fd6385a95e0e0c325e34e031e">More...</a><br/></td></tr>
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<tr class="separator:a45d3f74fd6385a95e0e0c325e34e031e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abf2836aed1741618811d342ec4f6d99f"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#abf2836aed1741618811d342ec4f6d99f">AWRSeqIndex</a></td></tr>
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<tr class="memdesc:abf2836aed1741618811d342ec4f6d99f"><td class="mdescLeft"> </td><td class="mdescRight">Sequence ID for AHB write command. <a href="#abf2836aed1741618811d342ec4f6d99f">More...</a><br/></td></tr>
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<tr class="separator:abf2836aed1741618811d342ec4f6d99f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a10902fe0bd2317bb4b826e27fd2ccc49"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a10902fe0bd2317bb4b826e27fd2ccc49">AWRSeqNumber</a></td></tr>
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<tr class="memdesc:a10902fe0bd2317bb4b826e27fd2ccc49"><td class="mdescLeft"> </td><td class="mdescRight">Sequence number for AHB write command. <a href="#a10902fe0bd2317bb4b826e27fd2ccc49">More...</a><br/></td></tr>
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<tr class="separator:a10902fe0bd2317bb4b826e27fd2ccc49"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae503cc358a0c30a57a513c92406243c4"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ae503cc358a0c30a57a513c92406243c4">ARDSeqIndex</a></td></tr>
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<tr class="memdesc:ae503cc358a0c30a57a513c92406243c4"><td class="mdescLeft"> </td><td class="mdescRight">Sequence ID for AHB read command. <a href="#ae503cc358a0c30a57a513c92406243c4">More...</a><br/></td></tr>
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<tr class="separator:ae503cc358a0c30a57a513c92406243c4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3ac64ae8cb747c012256240aa0157831"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a3ac64ae8cb747c012256240aa0157831">ARDSeqNumber</a></td></tr>
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<tr class="memdesc:a3ac64ae8cb747c012256240aa0157831"><td class="mdescLeft"> </td><td class="mdescRight">Sequence number for AHB read command. <a href="#a3ac64ae8cb747c012256240aa0157831">More...</a><br/></td></tr>
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<tr class="separator:a3ac64ae8cb747c012256240aa0157831"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4aaa4c06e67c1a1742e8e5959568da26"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00041.html#ga5dc9e254b63fae4c739b39b092e65bb9">flexspi_ahb_write_wait_unit_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a4aaa4c06e67c1a1742e8e5959568da26">AHBWriteWaitUnit</a></td></tr>
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<tr class="memdesc:a4aaa4c06e67c1a1742e8e5959568da26"><td class="mdescLeft"> </td><td class="mdescRight">AHB write wait unit. <a href="#a4aaa4c06e67c1a1742e8e5959568da26">More...</a><br/></td></tr>
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<tr class="separator:a4aaa4c06e67c1a1742e8e5959568da26"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a20412b4047bf71cfcb4af1f8c105412c"><td class="memItemLeft" align="right" valign="top">uint16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a20412b4047bf71cfcb4af1f8c105412c">AHBWriteWaitInterval</a></td></tr>
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<tr class="memdesc:a20412b4047bf71cfcb4af1f8c105412c"><td class="mdescLeft"> </td><td class="mdescRight"><pre class="fragment">AHB write wait interval, multiply AHB write interval
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</pre><p> unit to get the AHB write wait cycles. <a href="#a20412b4047bf71cfcb4af1f8c105412c">More...</a><br/></td></tr>
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<tr class="memitem:a8befdeb701b4cc314ca2674b1ed92d4d"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a8befdeb701b4cc314ca2674b1ed92d4d">enableWriteMask</a></td></tr>
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<tr class="memdesc:a8befdeb701b4cc314ca2674b1ed92d4d"><td class="mdescLeft"> </td><td class="mdescRight"><pre class="fragment">Enable/Disable FLEXSPI drive DQS pin as write mask
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</pre><p> when writing to external device. <a href="#a8befdeb701b4cc314ca2674b1ed92d4d">More...</a><br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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<td class="memname"><a class="el" href="a00041.html#gaac9a0472f45df2317e4e62acbd920da1">flexspi_cs_interval_cycle_unit_t</a> _flexspi_device_config::CSIntervalUnit</td>
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<td class="memname"><a class="el" href="a00041.html#ga5dc9e254b63fae4c739b39b092e65bb9">flexspi_ahb_write_wait_unit_t</a> _flexspi_device_config::AHBWriteWaitUnit</td>
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<td class="memname">struct _flexspi_transfer</td>
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a20a77fdf5a7f94011ba836f4988cd97a"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a20a77fdf5a7f94011ba836f4988cd97a">deviceAddress</a></td></tr>
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<tr class="memdesc:a20a77fdf5a7f94011ba836f4988cd97a"><td class="mdescLeft"> </td><td class="mdescRight">Operation device address. <a href="#a20a77fdf5a7f94011ba836f4988cd97a">More...</a><br/></td></tr>
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<tr class="separator:a20a77fdf5a7f94011ba836f4988cd97a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a395cf7bdd479592e3f9cf0836caf2d82"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00041.html#ga848f4d71e4802faf8a5d543545ee5110">flexspi_port_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a395cf7bdd479592e3f9cf0836caf2d82">port</a></td></tr>
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<tr class="memdesc:a395cf7bdd479592e3f9cf0836caf2d82"><td class="mdescLeft"> </td><td class="mdescRight">Operation port. <a href="#a395cf7bdd479592e3f9cf0836caf2d82">More...</a><br/></td></tr>
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<tr class="separator:a395cf7bdd479592e3f9cf0836caf2d82"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a157c99b27542cb81982f1f628e693922"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00041.html#ga0cb96e814ec50238c684fdf431c3efa5">flexspi_command_type_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a157c99b27542cb81982f1f628e693922">cmdType</a></td></tr>
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<tr class="memdesc:a157c99b27542cb81982f1f628e693922"><td class="mdescLeft"> </td><td class="mdescRight">Execution command type. <a href="#a157c99b27542cb81982f1f628e693922">More...</a><br/></td></tr>
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<tr class="separator:a157c99b27542cb81982f1f628e693922"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a965d34b3b91cd7ae90759aa32d1d62e3"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a965d34b3b91cd7ae90759aa32d1d62e3">seqIndex</a></td></tr>
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<tr class="memdesc:a965d34b3b91cd7ae90759aa32d1d62e3"><td class="mdescLeft"> </td><td class="mdescRight">Sequence ID for command. <a href="#a965d34b3b91cd7ae90759aa32d1d62e3">More...</a><br/></td></tr>
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<tr class="separator:a965d34b3b91cd7ae90759aa32d1d62e3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1dc0778a2a2c42e0ae6ef613153e3d00"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a1dc0778a2a2c42e0ae6ef613153e3d00">SeqNumber</a></td></tr>
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<tr class="memdesc:a1dc0778a2a2c42e0ae6ef613153e3d00"><td class="mdescLeft"> </td><td class="mdescRight">Sequence number for command. <a href="#a1dc0778a2a2c42e0ae6ef613153e3d00">More...</a><br/></td></tr>
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<tr class="memitem:a2bebccd3d5a95128f4f845c247cd11ba"><td class="memItemLeft" align="right" valign="top">uint32_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a2bebccd3d5a95128f4f845c247cd11ba">data</a></td></tr>
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<tr class="memdesc:a2bebccd3d5a95128f4f845c247cd11ba"><td class="mdescLeft"> </td><td class="mdescRight">Data buffer. <a href="#a2bebccd3d5a95128f4f845c247cd11ba">More...</a><br/></td></tr>
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<tr class="memitem:a01c6167563be949085220af5a0c9f4f2"><td class="memItemLeft" align="right" valign="top">size_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a01c6167563be949085220af5a0c9f4f2">dataSize</a></td></tr>
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<tr class="memdesc:a01c6167563be949085220af5a0c9f4f2"><td class="mdescLeft"> </td><td class="mdescRight">Data size in bytes. <a href="#a01c6167563be949085220af5a0c9f4f2">More...</a><br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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<td class="memname"><a class="el" href="a00041.html#ga848f4d71e4802faf8a5d543545ee5110">flexspi_port_t</a> _flexspi_transfer::port</td>
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<td class="memname"><a class="el" href="a00041.html#ga0cb96e814ec50238c684fdf431c3efa5">flexspi_command_type_t</a> _flexspi_transfer::cmdType</td>
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<tr class="memitem:a6380ef8079e8f6d2948e5140c6757fe9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a6380ef8079e8f6d2948e5140c6757fe9"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a6380ef8079e8f6d2948e5140c6757fe9">state</a></td></tr>
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<tr class="memdesc:a6380ef8079e8f6d2948e5140c6757fe9"><td class="mdescLeft"> </td><td class="mdescRight">Internal state for FLEXSPI transfer. <br/></td></tr>
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<tr class="memitem:ac9c3641aac74166d2de5ce2ff57df325"><td class="memItemLeft" align="right" valign="top">uint8_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#ac9c3641aac74166d2de5ce2ff57df325">data</a></td></tr>
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<tr class="memdesc:ac9c3641aac74166d2de5ce2ff57df325"><td class="mdescLeft"> </td><td class="mdescRight">Data buffer. <a href="#ac9c3641aac74166d2de5ce2ff57df325">More...</a><br/></td></tr>
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<tr class="memitem:a2fa8ac09be115299cd7684237965415c"><td class="memItemLeft" align="right" valign="top">size_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a2fa8ac09be115299cd7684237965415c">dataSize</a></td></tr>
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<tr class="memdesc:a2fa8ac09be115299cd7684237965415c"><td class="mdescLeft"> </td><td class="mdescRight">Remaining Data size in bytes. <a href="#a2fa8ac09be115299cd7684237965415c">More...</a><br/></td></tr>
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<tr class="memitem:affcdd0d6741ed619b36d8458f69ed0c2"><td class="memItemLeft" align="right" valign="top">size_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#affcdd0d6741ed619b36d8458f69ed0c2">transferTotalSize</a></td></tr>
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<tr class="memdesc:affcdd0d6741ed619b36d8458f69ed0c2"><td class="mdescLeft"> </td><td class="mdescRight">Total Data size in bytes. <a href="#affcdd0d6741ed619b36d8458f69ed0c2">More...</a><br/></td></tr>
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<a class="el" href="a00041.html#ga40558fffabe6bc75ad0d978ac56726a7">flexspi_transfer_callback_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a09c793ac81caf04da9d0baac92db69a6">completionCallback</a></td></tr>
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<tr class="memdesc:a09c793ac81caf04da9d0baac92db69a6"><td class="mdescLeft"> </td><td class="mdescRight">Callback for users while transfer finish or error occurred. <br/></td></tr>
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<tr class="memitem:a63366ce5038e0bd081c0d4a052dfc02e"><td class="memItemLeft" align="right" valign="top">void * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00041.html#a63366ce5038e0bd081c0d4a052dfc02e">userData</a></td></tr>
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<tr class="memdesc:a63366ce5038e0bd081c0d4a052dfc02e"><td class="mdescLeft"> </td><td class="mdescRight">FLEXSPI callback function parameter. <a href="#a63366ce5038e0bd081c0d4a052dfc02e">More...</a><br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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<td class="memname">uint8_t* _flexspi_handle::data</td>
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<td class="memname">size_t _flexspi_handle::dataSize</td>
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<td class="memname">size_t _flexspi_handle::transferTotalSize</td>
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<h2 class="groupheader">Macro Definition Documentation</h2>
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<td class="memname">#define FSL_FLEXSPI_DRIVER_VERSION   (<a class="el" href="a00272.html#ga812138aa3315b0c6953c1a26130bcc37">MAKE_VERSION</a>(2, 6, 0))</td>
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<td class="memname">#define FLEXSPI_LUT_SEQ</td>
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<td>(</td>
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<td class="paramtype"> </td>
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<td class="paramname">cmd0, </td>
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<b>Value:</b><div class="fragment"><div class="line">(FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \</div>
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<div class="line"> FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))</div>
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<h2 class="groupheader">Typedef Documentation</h2>
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<td class="memname">typedef enum <a class="el" href="a00041.html#ga0479e0532b00f2c6eccc5a21d1b9ff15">_flexspi_pad</a> <a class="el" href="a00041.html#gad17db5037cc0e96547dceb5141f9748c">flexspi_pad_t</a></td>
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<td class="memname">typedef enum <a class="el" href="a00041.html#gaceee051e8ee5d664778db2882bafac7a">_flexspi_flags</a> <a class="el" href="a00041.html#ga9a1ca84036889749c48552282a53184c">flexspi_flags_t</a></td>
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<td class="memname">typedef enum <a class="el" href="a00041.html#gaa1b233948fb7d42aeb4c006cf5f35478">_flexspi_read_sample_clock</a> <a class="el" href="a00041.html#ga3925749f15492f4ee50dc375b889a398">flexspi_read_sample_clock_t</a></td>
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<td class="memname">typedef enum <a class="el" href="a00041.html#ga44d2809471f9ad01d3e18b5993e3fe41">_flexspi_cs_interval_cycle_unit</a> <a class="el" href="a00041.html#gaac9a0472f45df2317e4e62acbd920da1">flexspi_cs_interval_cycle_unit_t</a></td>
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<td class="memname">typedef enum <a class="el" href="a00041.html#ga12b02d7ab910585e0f489956e7919568">_flexspi_ahb_write_wait_unit</a> <a class="el" href="a00041.html#ga5dc9e254b63fae4c739b39b092e65bb9">flexspi_ahb_write_wait_unit_t</a></td>
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<td class="memname">typedef enum <a class="el" href="a00041.html#gaaef904b8ea28d97d26179d0d0a34fbc1">_flexspi_ip_error_code</a> <a class="el" href="a00041.html#ga0fac520bfee4292d93c17a3227fb38d5">flexspi_ip_error_code_t</a></td>
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<td class="memname">typedef enum <a class="el" href="a00041.html#gaff421223c501f1b18042d548736bd89e">_flexspi_ahb_error_code</a> <a class="el" href="a00041.html#ga849aacfbb909a2b403d39ca1b23f7f85">flexspi_ahb_error_code_t</a></td>
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<td class="memname">typedef enum <a class="el" href="a00041.html#gabb9bc1dd69b486ce1d71749d0546d60f">_flexspi_port</a> <a class="el" href="a00041.html#ga848f4d71e4802faf8a5d543545ee5110">flexspi_port_t</a></td>
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<td class="memname">typedef enum <a class="el" href="a00041.html#ga4014b5aa72e6b4b7d258f377b3793b1a">_flexspi_arb_command_source</a> <a class="el" href="a00041.html#ga00a721e456c8a4334ba7fee0a0c2a3b8">flexspi_arb_command_source_t</a></td>
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<td class="memname">typedef enum <a class="el" href="a00041.html#ga048bc2776406a4a3d3b4213de9e759c2">_flexspi_command_type</a> <a class="el" href="a00041.html#ga0cb96e814ec50238c684fdf431c3efa5">flexspi_command_type_t</a></td>
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<td class="memname">typedef struct <a class="el" href="a00041.html#a00417">_flexspi_config</a> <a class="el" href="a00041.html#gaf39e19e99ab773e4f0cac969eecce062">flexspi_config_t</a></td>
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<td class="memname">typedef struct <a class="el" href="a00041.html#a00418">_flexspi_device_config</a> <a class="el" href="a00041.html#ga5a70bb5d4f28a1763a0224bb8298d4d7">flexspi_device_config_t</a></td>
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<td class="memname">typedef struct <a class="el" href="a00041.html#a00424">_flexspi_transfer</a> <a class="el" href="a00041.html#gae98634a0e73294cf48b94cab5d07b196">flexspi_transfer_t</a></td>
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<td class="memname">typedef void(* flexspi_transfer_callback_t)(FLEXSPI_Type *base, <a class="el" href="a00041.html#a00420">flexspi_handle_t</a> *handle, <a class="el" href="a00272.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> status, void *userData)</td>
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<h2 class="groupheader">Enumeration Type Documentation</h2>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga1fb9092bcdeada2d206bdc74afbbe122a21bccbd47a8f5f8690d0825b6cb41761"></a>kStatus_FLEXSPI_Busy</em> </td><td class="fielddoc">
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<p>FLEXSPI is busy. </p>
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<tr><td class="fieldname"><em><a class="anchor" id="gga1fb9092bcdeada2d206bdc74afbbe122af247efbe53e40fe0001914530d483bdf"></a>kStatus_FLEXSPI_SequenceExecutionTimeout</em> </td><td class="fielddoc">
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<p>Sequence execution timeout error occurred during FLEXSPI transfer. </p>
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<tr><td class="fieldname"><em><a class="anchor" id="gga1fb9092bcdeada2d206bdc74afbbe122a6950d19c6f71e399821ae198f74f65e9"></a>kStatus_FLEXSPI_IpCommandSequenceError</em> </td><td class="fielddoc">
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<p>IP command Sequence execution timeout error occurred during FLEXSPI transfer. </p>
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<p>IP command grant timeout error occurred during FLEXSPI transfer. </p>
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<p>Stop execution, deassert CS. </p>
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<p>Transmit Command code to Flash, using SDR mode. </p>
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<p>Transmit Row Address to Flash, using SDR mode. </p>
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<p>Transmit Column Address to Flash, using SDR mode. </p>
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<p>Transmit 1-bit Mode bits to Flash, using SDR mode. </p>
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<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89acaf987f395572783c1bcc49c7c733562"></a>kFLEXSPI_Command_MODE2_SDR</em> </td><td class="fielddoc">
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<p>Transmit 2-bit Mode bits to Flash, using SDR mode. </p>
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<p>Transmit 4-bit Mode bits to Flash, using SDR mode. </p>
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<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89a75da61b0b5a52a62aec4cfd9beb74c41"></a>kFLEXSPI_Command_MODE8_SDR</em> </td><td class="fielddoc">
|
|
<p>Transmit 8-bit Mode bits to Flash, using SDR mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89a9e30b0f10c66e9ae6acb06829dccb787"></a>kFLEXSPI_Command_WRITE_SDR</em> </td><td class="fielddoc">
|
|
<p>Transmit Programming Data to Flash, using SDR mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89adf06bfb1db55de99a9c1332cb52acb0a"></a>kFLEXSPI_Command_READ_SDR</em> </td><td class="fielddoc">
|
|
<p>Receive Read Data from Flash, using SDR mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89a4b65366f6884c88d255a7189d771fdfc"></a>kFLEXSPI_Command_LEARN_SDR</em> </td><td class="fielddoc">
|
|
<p>Receive Read Data or Preamble bit from Flash, SDR mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89a20d443a0566f4468d82573f26f8cd67a"></a>kFLEXSPI_Command_DATSZ_SDR</em> </td><td class="fielddoc">
|
|
<p>Transmit Read/Program Data size (byte) to Flash, SDR mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89ac9f6c32fe54dadad88b44186ef5a1799"></a>kFLEXSPI_Command_DUMMY_SDR</em> </td><td class="fielddoc">
|
|
<p>Leave data lines undriven by FlexSPI controller. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89a0ea62a346e865a749143ebb6ea0706b5"></a>kFLEXSPI_Command_DUMMY_RWDS_SDR</em> </td><td class="fielddoc">
|
|
<p>Leave data lines undriven by FlexSPI controller, dummy cycles decided by RWDS. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89a1eca9a5742e650263aaa264bdfee4a22"></a>kFLEXSPI_Command_DDR</em> </td><td class="fielddoc">
|
|
<p>Transmit Command code to Flash, using DDR mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89a4e44e443ba90f7183a52f8f9eabe2c31"></a>kFLEXSPI_Command_RADDR_DDR</em> </td><td class="fielddoc">
|
|
<p>Transmit Row Address to Flash, using DDR mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89af58fe6950b4f1b472bf81ddcab42709f"></a>kFLEXSPI_Command_CADDR_DDR</em> </td><td class="fielddoc">
|
|
<p>Transmit Column Address to Flash, using DDR mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89afe085498075659a0c6989dbca3591c4a"></a>kFLEXSPI_Command_MODE1_DDR</em> </td><td class="fielddoc">
|
|
<p>Transmit 1-bit Mode bits to Flash, using DDR mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89aa09cd14e9354e91fefe5e1796b49ee82"></a>kFLEXSPI_Command_MODE2_DDR</em> </td><td class="fielddoc">
|
|
<p>Transmit 2-bit Mode bits to Flash, using DDR mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89a4734dbae99656af5500d65766743862e"></a>kFLEXSPI_Command_MODE4_DDR</em> </td><td class="fielddoc">
|
|
<p>Transmit 4-bit Mode bits to Flash, using DDR mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89af5ee8359bc3d1444ca5611ea5da5de25"></a>kFLEXSPI_Command_MODE8_DDR</em> </td><td class="fielddoc">
|
|
<p>Transmit 8-bit Mode bits to Flash, using DDR mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89ae5ac267451675a466b737ca4ab605929"></a>kFLEXSPI_Command_WRITE_DDR</em> </td><td class="fielddoc">
|
|
<p>Transmit Programming Data to Flash, using DDR mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89a91bceb3ad87da1b6c2723ed7b07f2cf1"></a>kFLEXSPI_Command_READ_DDR</em> </td><td class="fielddoc">
|
|
<p>Receive Read Data from Flash, using DDR mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89a1b51830f2992cb7ae10ca35736663e4e"></a>kFLEXSPI_Command_LEARN_DDR</em> </td><td class="fielddoc">
|
|
<p>Receive Read Data or Preamble bit from Flash, DDR mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89a22097b53c3b05c555bc76d4b659b662e"></a>kFLEXSPI_Command_DATSZ_DDR</em> </td><td class="fielddoc">
|
|
<p>Transmit Read/Program Data size (byte) to Flash, DDR mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89a2ce6180762ad977e0284e139bbc91c1a"></a>kFLEXSPI_Command_DUMMY_DDR</em> </td><td class="fielddoc">
|
|
<p>Leave data lines undriven by FlexSPI controller. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89a0b4f03d35c08558f4094f7e1ba13a22e"></a>kFLEXSPI_Command_DUMMY_RWDS_DDR</em> </td><td class="fielddoc">
|
|
<p>Leave data lines undriven by FlexSPI controller, dummy cycles decided by RWDS. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga84627a72058502328269676b81780f89ac3abaaee8f2a43ab63315ce05ba485b0"></a>kFLEXSPI_Command_JUMP_ON_CS</em> </td><td class="fielddoc">
|
|
<p>Stop execution, deassert CS and save operand[7:0] as the instruction start pointer for next sequence. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga0479e0532b00f2c6eccc5a21d1b9ff15"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">enum <a class="el" href="a00041.html#ga0479e0532b00f2c6eccc5a21d1b9ff15">_flexspi_pad</a></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga0479e0532b00f2c6eccc5a21d1b9ff15aabb7baedf9c64ad0a382587105cbf3b4"></a>kFLEXSPI_1PAD</em> </td><td class="fielddoc">
|
|
<p>Transmit command/address and transmit/receive data only through DATA0/DATA1. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0479e0532b00f2c6eccc5a21d1b9ff15a95d1a2d72fa9c8ca2a221cc3c4f431be"></a>kFLEXSPI_2PAD</em> </td><td class="fielddoc">
|
|
<p>Transmit command/address and transmit/receive data only through DATA[1:0]. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0479e0532b00f2c6eccc5a21d1b9ff15abfb84ebae8934b725e4164d1b643931c"></a>kFLEXSPI_4PAD</em> </td><td class="fielddoc">
|
|
<p>Transmit command/address and transmit/receive data only through DATA[3:0]. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0479e0532b00f2c6eccc5a21d1b9ff15ab67dd50438697de88314abe08598bfd6"></a>kFLEXSPI_8PAD</em> </td><td class="fielddoc">
|
|
<p>Transmit command/address and transmit/receive data only through DATA[7:0]. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gaceee051e8ee5d664778db2882bafac7a"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">enum <a class="el" href="a00041.html#gaceee051e8ee5d664778db2882bafac7a">_flexspi_flags</a></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaceee051e8ee5d664778db2882bafac7aa926d49476fe684b0c912bf39124761b6"></a>kFLEXSPI_SequenceExecutionTimeoutFlag</em> </td><td class="fielddoc">
|
|
<p>Sequence execution timeout. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaceee051e8ee5d664778db2882bafac7aaaff7260c000311495dbae646cf7cf977"></a>kFLEXSPI_AhbBusTimeoutFlag</em> </td><td class="fielddoc">
|
|
<p>AHB Bus timeout. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaceee051e8ee5d664778db2882bafac7aab8e2204cbed4f7b443052aeab6c9495b"></a>kFLEXSPI_SckStoppedBecauseTxEmptyFlag</em> </td><td class="fielddoc">
|
|
<p>SCK is stopped during command sequence because Async TX FIFO empty. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaceee051e8ee5d664778db2882bafac7aa8f0e6574ce2eda2a9080b457dcc17369"></a>kFLEXSPI_SckStoppedBecauseRxFullFlag</em> </td><td class="fielddoc">
|
|
<p>SCK is stopped during command sequence because Async RX FIFO full. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaceee051e8ee5d664778db2882bafac7aaf6fff015f6467f94244ccfce73ed45ea"></a>kFLEXSPI_IpTxFifoWatermarkEmptyFlag</em> </td><td class="fielddoc">
|
|
<p>IP TX FIFO WaterMark empty. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaceee051e8ee5d664778db2882bafac7aa467607530d9f93e3b4dd24ed30b1daf9"></a>kFLEXSPI_IpRxFifoWatermarkAvailableFlag</em> </td><td class="fielddoc">
|
|
<p>IP RX FIFO WaterMark available. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaceee051e8ee5d664778db2882bafac7aaeade1012fb934333db2a0058c366f731"></a>kFLEXSPI_AhbCommandSequenceErrorFlag</em> </td><td class="fielddoc">
|
|
<p>AHB triggered Command Sequences Error. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaceee051e8ee5d664778db2882bafac7aa37ceccdbb6bc3d936662788eb3cdba07"></a>kFLEXSPI_IpCommandSequenceErrorFlag</em> </td><td class="fielddoc">
|
|
<p>IP triggered Command Sequences Error. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaceee051e8ee5d664778db2882bafac7aade934b2883d46cae2b46f620fcd993cc"></a>kFLEXSPI_AhbCommandGrantTimeoutFlag</em> </td><td class="fielddoc">
|
|
<p>AHB triggered Command Sequences Grant Timeout. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaceee051e8ee5d664778db2882bafac7aaadd6f24bbc89ba4be6200111fb20982b"></a>kFLEXSPI_IpCommandGrantTimeoutFlag</em> </td><td class="fielddoc">
|
|
<p>IP triggered Command Sequences Grant Timeout. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaceee051e8ee5d664778db2882bafac7aa25be525051c616ada040c8ed6d69ef17"></a>kFLEXSPI_IpCommandExecutionDoneFlag</em> </td><td class="fielddoc">
|
|
<p>IP triggered Command Sequences Execution finished. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaceee051e8ee5d664778db2882bafac7aa0b68913b136867c72818d8f434652111"></a>kFLEXSPI_AllInterruptFlags</em> </td><td class="fielddoc">
|
|
<p>All flags. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gaa1b233948fb7d42aeb4c006cf5f35478"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">enum <a class="el" href="a00041.html#gaa1b233948fb7d42aeb4c006cf5f35478">_flexspi_read_sample_clock</a></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaa1b233948fb7d42aeb4c006cf5f35478af6182ef9c776fa291cbbd34a727d4a9d"></a>kFLEXSPI_ReadSampleClkLoopbackInternally</em> </td><td class="fielddoc">
|
|
<p>Dummy Read strobe generated by FlexSPI Controller and loopback internally. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaa1b233948fb7d42aeb4c006cf5f35478a86986f70a9cd9123dc708a4cd9439f14"></a>kFLEXSPI_ReadSampleClkLoopbackFromDqsPad</em> </td><td class="fielddoc">
|
|
<p>Dummy Read strobe generated by FlexSPI Controller and loopback from DQS pad. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaa1b233948fb7d42aeb4c006cf5f35478aa10f2854d50ae1cf60da887cb5ee8721"></a>kFLEXSPI_ReadSampleClkLoopbackFromSckPad</em> </td><td class="fielddoc">
|
|
<p>SCK output clock and loopback from SCK pad. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaa1b233948fb7d42aeb4c006cf5f35478a37b19889732ad1d8d5336452577a6fe5"></a>kFLEXSPI_ReadSampleClkExternalInputFromDqsPad</em> </td><td class="fielddoc">
|
|
<p>Flash provided Read strobe and input from DQS pad. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga44d2809471f9ad01d3e18b5993e3fe41"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">enum <a class="el" href="a00041.html#ga44d2809471f9ad01d3e18b5993e3fe41">_flexspi_cs_interval_cycle_unit</a></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga44d2809471f9ad01d3e18b5993e3fe41a0c13470fc2dd7cdae32d89629f476bc2"></a>kFLEXSPI_CsIntervalUnit1SckCycle</em> </td><td class="fielddoc">
|
|
<p>Chip selection interval: CSINTERVAL * 1 serial clock cycle. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga44d2809471f9ad01d3e18b5993e3fe41a39cdab3817b97ee2783ceb0a48784c44"></a>kFLEXSPI_CsIntervalUnit256SckCycle</em> </td><td class="fielddoc">
|
|
<p>Chip selection interval: CSINTERVAL * 256 serial clock cycle. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga12b02d7ab910585e0f489956e7919568"></a>
|
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<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">enum <a class="el" href="a00041.html#ga12b02d7ab910585e0f489956e7919568">_flexspi_ahb_write_wait_unit</a></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga12b02d7ab910585e0f489956e7919568a77bd176c235c440474130c9333acfe36"></a>kFLEXSPI_AhbWriteWaitUnit2AhbCycle</em> </td><td class="fielddoc">
|
|
<p>AWRWAIT unit is 2 ahb clock cycle. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga12b02d7ab910585e0f489956e7919568a507634102520b1f1b227b4baaabdd562"></a>kFLEXSPI_AhbWriteWaitUnit8AhbCycle</em> </td><td class="fielddoc">
|
|
<p>AWRWAIT unit is 8 ahb clock cycle. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga12b02d7ab910585e0f489956e7919568a4b54ae64ef18997af8bc7ed0d41c7ef5"></a>kFLEXSPI_AhbWriteWaitUnit32AhbCycle</em> </td><td class="fielddoc">
|
|
<p>AWRWAIT unit is 32 ahb clock cycle. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga12b02d7ab910585e0f489956e7919568aec6164016a913fdb5fc174c39af1296c"></a>kFLEXSPI_AhbWriteWaitUnit128AhbCycle</em> </td><td class="fielddoc">
|
|
<p>AWRWAIT unit is 128 ahb clock cycle. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga12b02d7ab910585e0f489956e7919568ad97d3600a3f5df7e13fe0a3343f0ddfc"></a>kFLEXSPI_AhbWriteWaitUnit512AhbCycle</em> </td><td class="fielddoc">
|
|
<p>AWRWAIT unit is 512 ahb clock cycle. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga12b02d7ab910585e0f489956e7919568aa424000e33c88b2e93529d1503f40d86"></a>kFLEXSPI_AhbWriteWaitUnit2048AhbCycle</em> </td><td class="fielddoc">
|
|
<p>AWRWAIT unit is 2048 ahb clock cycle. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga12b02d7ab910585e0f489956e7919568ab49ac5e2a68f75adcb96d39359e21a0b"></a>kFLEXSPI_AhbWriteWaitUnit8192AhbCycle</em> </td><td class="fielddoc">
|
|
<p>AWRWAIT unit is 8192 ahb clock cycle. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga12b02d7ab910585e0f489956e7919568af64e1be9ff0301d3f418ed783c045c1e"></a>kFLEXSPI_AhbWriteWaitUnit32768AhbCycle</em> </td><td class="fielddoc">
|
|
<p>AWRWAIT unit is 32768 ahb clock cycle. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gaaef904b8ea28d97d26179d0d0a34fbc1"></a>
|
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
|
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<td class="memname">enum <a class="el" href="a00041.html#gaaef904b8ea28d97d26179d0d0a34fbc1">_flexspi_ip_error_code</a></td>
|
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</tr>
|
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</table>
|
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</div><div class="memdoc">
|
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<table class="fieldtable">
|
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaaef904b8ea28d97d26179d0d0a34fbc1a5a9ef1b8776c5e91f94045d0c488cc92"></a>kFLEXSPI_IpCmdErrorNoError</em> </td><td class="fielddoc">
|
|
<p>No error. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaaef904b8ea28d97d26179d0d0a34fbc1a09b36a52a3719012b6262d0df758c26c"></a>kFLEXSPI_IpCmdErrorJumpOnCsInIpCmd</em> </td><td class="fielddoc">
|
|
<p>IP command with JMP_ON_CS instruction used. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaaef904b8ea28d97d26179d0d0a34fbc1a2566abfe918545548cdc391ecad3562d"></a>kFLEXSPI_IpCmdErrorUnknownOpCode</em> </td><td class="fielddoc">
|
|
<p>Unknown instruction opcode in the sequence. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaaef904b8ea28d97d26179d0d0a34fbc1a3a45578abf83e3679f13f7a47692b0b2"></a>kFLEXSPI_IpCmdErrorSdrDummyInDdrSequence</em> </td><td class="fielddoc">
|
|
<p>Instruction DUMMY_SDR/DUMMY_RWDS_SDR used in DDR sequence. </p>
|
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</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaaef904b8ea28d97d26179d0d0a34fbc1a2b93718689f2d9dd58d124fd25ff2f85"></a>kFLEXSPI_IpCmdErrorDdrDummyInSdrSequence</em> </td><td class="fielddoc">
|
|
<p>Instruction DUMMY_DDR/DUMMY_RWDS_DDR used in SDR sequence. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaaef904b8ea28d97d26179d0d0a34fbc1a5a974de28e0771b0e93ecd12df485a62"></a>kFLEXSPI_IpCmdErrorInvalidAddress</em> </td><td class="fielddoc">
|
|
<p>Flash access start address exceed the whole flash address range (A1/A2/B1/B2). </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaaef904b8ea28d97d26179d0d0a34fbc1ad2b76bec366730732a07c2c7a9e5aeec"></a>kFLEXSPI_IpCmdErrorSequenceExecutionTimeout</em> </td><td class="fielddoc">
|
|
<p>Sequence execution timeout. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaaef904b8ea28d97d26179d0d0a34fbc1a2f318a896dfe31a4b8b507daf339c16d"></a>kFLEXSPI_IpCmdErrorFlashBoundaryAcrosss</em> </td><td class="fielddoc">
|
|
<p>Flash boundary crossed. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
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<a class="anchor" id="gaff421223c501f1b18042d548736bd89e"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">enum <a class="el" href="a00041.html#gaff421223c501f1b18042d548736bd89e">_flexspi_ahb_error_code</a></td>
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</tr>
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</table>
|
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</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaff421223c501f1b18042d548736bd89ea3b055af2f8c32b1c20c781f9be9406e2"></a>kFLEXSPI_AhbCmdErrorNoError</em> </td><td class="fielddoc">
|
|
<p>No error. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaff421223c501f1b18042d548736bd89eaa1a1fb4ea86b9f3d159cf4af471fff6a"></a>kFLEXSPI_AhbCmdErrorJumpOnCsInWriteCmd</em> </td><td class="fielddoc">
|
|
<p>AHB Write command with JMP_ON_CS instruction used in the sequence. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaff421223c501f1b18042d548736bd89ea028741e0f08e9f253b43a5ff5db23a3f"></a>kFLEXSPI_AhbCmdErrorUnknownOpCode</em> </td><td class="fielddoc">
|
|
<p>Unknown instruction opcode in the sequence. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaff421223c501f1b18042d548736bd89ea4ae2658aaf3b9e392409233fb4e103e6"></a>kFLEXSPI_AhbCmdErrorSdrDummyInDdrSequence</em> </td><td class="fielddoc">
|
|
<p>Instruction DUMMY_SDR/DUMMY_RWDS_SDR used in DDR sequence. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaff421223c501f1b18042d548736bd89ea33e985c357a9fd0161b79b04ce94deb9"></a>kFLEXSPI_AhbCmdErrorDdrDummyInSdrSequence</em> </td><td class="fielddoc">
|
|
<p>Instruction DUMMY_DDR/DUMMY_RWDS_DDR used in SDR sequence. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaff421223c501f1b18042d548736bd89ea66bb317d820fe1aa2f180ab88f680d31"></a>kFLEXSPI_AhbCmdSequenceExecutionTimeout</em> </td><td class="fielddoc">
|
|
<p>Sequence execution timeout. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gabb9bc1dd69b486ce1d71749d0546d60f"></a>
|
|
<div class="memitem">
|
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<div class="memproto">
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<table class="memname">
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<tr>
|
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<td class="memname">enum <a class="el" href="a00041.html#gabb9bc1dd69b486ce1d71749d0546d60f">_flexspi_port</a></td>
|
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</tr>
|
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</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggabb9bc1dd69b486ce1d71749d0546d60fa280a07425f3d2e4b876b51c6216da136"></a>kFLEXSPI_PortA1</em> </td><td class="fielddoc">
|
|
<p>Access flash on A1 port. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggabb9bc1dd69b486ce1d71749d0546d60fa9766a70521fd112539bb3ec1b934521f"></a>kFLEXSPI_PortA2</em> </td><td class="fielddoc">
|
|
<p>Access flash on A2 port. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggabb9bc1dd69b486ce1d71749d0546d60fa8150e6d14305f5cf93bdab0bc0309413"></a>kFLEXSPI_PortB1</em> </td><td class="fielddoc">
|
|
<p>Access flash on B1 port. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggabb9bc1dd69b486ce1d71749d0546d60fa4112f4afdbf272c68d4adfd7a608c561"></a>kFLEXSPI_PortB2</em> </td><td class="fielddoc">
|
|
<p>Access flash on B2 port. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga4014b5aa72e6b4b7d258f377b3793b1a"></a>
|
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<div class="memitem">
|
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<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">enum <a class="el" href="a00041.html#ga4014b5aa72e6b4b7d258f377b3793b1a">_flexspi_arb_command_source</a></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
|
|
</div>
|
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</div>
|
|
<a class="anchor" id="ga048bc2776406a4a3d3b4213de9e759c2"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
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<table class="memname">
|
|
<tr>
|
|
<td class="memname">enum <a class="el" href="a00041.html#ga048bc2776406a4a3d3b4213de9e759c2">_flexspi_command_type</a></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga048bc2776406a4a3d3b4213de9e759c2a434864ad0a1db118a09007d87d2f303d"></a>kFLEXSPI_Command</em> </td><td class="fielddoc">
|
|
<p>FlexSPI operation: Only command, both TX and Rx buffer are ignored. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga048bc2776406a4a3d3b4213de9e759c2a30c6392c74b9546179fe975bdbe7d77e"></a>kFLEXSPI_Config</em> </td><td class="fielddoc">
|
|
<p>FlexSPI operation: Configure device mode, the TX fifo size is fixed in LUT. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<h2 class="groupheader">Function Documentation</h2>
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<a class="anchor" id="ga91bdb9ace32497122bb682c4d6e19eeb"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">uint32_t FLEXSPI_GetInstance </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
|
|
<td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI base pointer. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
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<a class="anchor" id="ga32000baf3445d1b43444fd0dc0dbb643"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
|
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<td class="memname"><a class="el" href="a00272.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> FLEXSPI_CheckAndClearError </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>status</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI base pointer. </td></tr>
|
|
<tr><td class="paramname">status</td><td>interrupt status. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
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<a class="anchor" id="ga8f12065e78d8a8c6527b0a937f06316d"></a>
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<div class="memitem">
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<table class="memname">
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<tr>
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<td class="memname">void FLEXSPI_Init </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">const <a class="el" href="a00041.html#gaf39e19e99ab773e4f0cac969eecce062">flexspi_config_t</a> * </td>
|
|
<td class="paramname"><em>config</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
|
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</tr>
|
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</table>
|
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</div><div class="memdoc">
|
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<p>This function enables the clock for FLEXSPI and also configures the FLEXSPI with the input configure parameters. Users should call this function before any FLEXSPI operations.</p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
<tr><td class="paramname">config</td><td>FLEXSPI configure structure. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
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<a class="anchor" id="ga87d69b2d33a696ec0f1f9e9a361c0e4b"></a>
|
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">void FLEXSPI_GetDefaultConfig </td>
|
|
<td>(</td>
|
|
<td class="paramtype"><a class="el" href="a00041.html#gaf39e19e99ab773e4f0cac969eecce062">flexspi_config_t</a> * </td>
|
|
<td class="paramname"><em>config</em></td><td>)</td>
|
|
<td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">config</td><td>FLEXSPI configuration structure. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
|
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<a class="anchor" id="gaad2d8ae42188749382c0d1dd0f6572d0"></a>
|
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">void FLEXSPI_Deinit </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
|
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<td></td>
|
|
</tr>
|
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</table>
|
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</div><div class="memdoc">
|
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<p>Clears the FLEXSPI state and FLEXSPI module registers. </p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
|
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<a class="anchor" id="ga03e96ef7a2fbf0c6a931b4d6701bb573"></a>
|
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<div class="memitem">
|
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<div class="memproto">
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<table class="memname">
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<tr>
|
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<td class="memname">void FLEXSPI_UpdateDllValue </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00041.html#ga5a70bb5d4f28a1763a0224bb8298d4d7">flexspi_device_config_t</a> * </td>
|
|
<td class="paramname"><em>config</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00041.html#ga848f4d71e4802faf8a5d543545ee5110">flexspi_port_t</a> </td>
|
|
<td class="paramname"><em>port</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
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<td></td><td></td>
|
|
</tr>
|
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</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
<tr><td class="paramname">config</td><td>Flash configuration parameters. </td></tr>
|
|
<tr><td class="paramname">port</td><td>FLEXSPI Operation port. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
|
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<a class="anchor" id="ga43bbcb0a954c93243a0dc472e07db7d3"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">void FLEXSPI_SetFlashConfig </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00041.html#ga5a70bb5d4f28a1763a0224bb8298d4d7">flexspi_device_config_t</a> * </td>
|
|
<td class="paramname"><em>config</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00041.html#ga848f4d71e4802faf8a5d543545ee5110">flexspi_port_t</a> </td>
|
|
<td class="paramname"><em>port</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
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<td></td><td></td>
|
|
</tr>
|
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</table>
|
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</div><div class="memdoc">
|
|
<p>This function configures the connected device relevant parameters, such as the size, command, and so on. The flash configuration value cannot have a default value. The user needs to configure it according to the connected device.</p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
<tr><td class="paramname">config</td><td>Flash configuration parameters. </td></tr>
|
|
<tr><td class="paramname">port</td><td>FLEXSPI Operation port. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
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<a class="anchor" id="ga9d6bcd77beebeff56c9e3ffda2530f36"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="mlabels">
|
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<tr>
|
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<td class="mlabels-left">
|
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<table class="memname">
|
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<tr>
|
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<td class="memname">static void FLEXSPI_SoftwareReset </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
|
|
<td></td>
|
|
</tr>
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</div><div class="memdoc">
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<p>This function sets the software reset flags for both AHB and buffer domain and resets both AHB buffer and also IP FIFOs.</p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
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</table>
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</dd>
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</dl>
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<td class="memname">static void FLEXSPI_Enable </td>
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<td>(</td>
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<td class="paramtype">FLEXSPI_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">bool </td>
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<td class="paramname"><em>enable</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
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<tr><td class="paramname">enable</td><td>True means enable FLEXSPI, false means disable. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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<a class="anchor" id="ga2f7c7641c3531892350f8fb6bfedba67"></a>
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<td class="mlabels-left">
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<td class="memname">static void FLEXSPI_EnableInterrupts </td>
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<td>(</td>
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<td class="paramtype">FLEXSPI_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
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<td class="paramname"><em>mask</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
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<tr><td class="paramname">mask</td><td>FLEXSPI interrupt source. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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<a class="anchor" id="ga0ed8c3ce0f2b36a1c43d9fa133630455"></a>
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<td class="memname">static void FLEXSPI_DisableInterrupts </td>
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<td>(</td>
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<td class="paramtype">FLEXSPI_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
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<td class="paramname"><em>mask</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
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<tr><td class="paramname">mask</td><td>FLEXSPI interrupt source. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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<a class="anchor" id="gad463c753b8ebc2856957adc8ba4e2e41"></a>
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<td class="memname">static void FLEXSPI_EnableTxDMA </td>
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<td>(</td>
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<td class="paramtype">FLEXSPI_Type * </td>
|
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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|
<td class="paramtype">bool </td>
|
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<td class="paramname"><em>enable</em> </td>
|
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
<tr><td class="paramname">enable</td><td>Enable flag for transmit DMA request. Pass true for enable, false for disable. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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</div>
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<a class="anchor" id="gaf4f5b43a95ecb42717665b540c3b4abd"></a>
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<div class="memitem">
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<td class="memname">static void FLEXSPI_EnableRxDMA </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
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</tr>
|
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<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">bool </td>
|
|
<td class="paramname"><em>enable</em> </td>
|
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</tr>
|
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
|
|
<td class="mlabels-right">
|
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
<tr><td class="paramname">enable</td><td>Enable flag for receive DMA request. Pass true for enable, false for disable. </td></tr>
|
|
</table>
|
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</dd>
|
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</dl>
|
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</div>
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</div>
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<a class="anchor" id="gab0476f9699fc375fee33a5afc7ec5ee8"></a>
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<div class="memitem">
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<tr>
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<td class="mlabels-left">
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<td class="memname">static uint32_t FLEXSPI_GetTxFifoAddress </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
|
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<td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
|
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<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="retval"><dt>Return values</dt><dd>
|
|
<table class="retval">
|
|
<tr><td class="paramname">The</td><td>tx fifo address. </td></tr>
|
|
</table>
|
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</dd>
|
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</dl>
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|
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</div>
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</div>
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<a class="anchor" id="ga34c014e6d3d86f854f2ff767f0891dbe"></a>
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<div class="memitem">
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<td class="memname">static uint32_t FLEXSPI_GetRxFifoAddress </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
|
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<td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="retval"><dt>Return values</dt><dd>
|
|
<table class="retval">
|
|
<tr><td class="paramname">The</td><td>rx fifo address. </td></tr>
|
|
</table>
|
|
</dd>
|
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</dl>
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</div>
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</div>
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<a class="anchor" id="gadd183feac77a644fe03802bd2989d1f7"></a>
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<td class="memname">static void FLEXSPI_ResetFifos </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">bool </td>
|
|
<td class="paramname"><em>txFifo</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">bool </td>
|
|
<td class="paramname"><em>rxFifo</em> </td>
|
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</tr>
|
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<tr>
|
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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|
<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
<tr><td class="paramname">txFifo</td><td>Pass true to reset TX FIFO. </td></tr>
|
|
<tr><td class="paramname">rxFifo</td><td>Pass true to reset RX FIFO. </td></tr>
|
|
</table>
|
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</dd>
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</dl>
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|
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</div>
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</div>
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<a class="anchor" id="ga10b56b803c3aeb60ff94e2385230799e"></a>
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<tr>
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<td class="mlabels-left">
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<td class="memname">static void FLEXSPI_GetFifoCounts </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">size_t * </td>
|
|
<td class="paramname"><em>txCount</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">size_t * </td>
|
|
<td class="paramname"><em>rxCount</em> </td>
|
|
</tr>
|
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<tr>
|
|
<td></td>
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<td>)</td>
|
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<td></td><td></td>
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</tr>
|
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</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramdir"></td><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
<tr><td class="paramdir">[out]</td><td class="paramname">txCount</td><td>Pointer through which the current number of bytes in the transmit FIFO is returned. Pass NULL if this value is not required. </td></tr>
|
|
<tr><td class="paramdir">[out]</td><td class="paramname">rxCount</td><td>Pointer through which the current number of bytes in the receive FIFO is returned. Pass NULL if this value is not required. </td></tr>
|
|
</table>
|
|
</dd>
|
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</dl>
|
|
|
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</div>
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</div>
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<a class="anchor" id="ga522bf36c8d24a9e50756fbe2c92982fc"></a>
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<div class="memitem">
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<td class="memname">static uint32_t FLEXSPI_GetInterruptStatusFlags </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
|
|
<td></td>
|
|
</tr>
|
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</table>
|
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</td>
|
|
<td class="mlabels-right">
|
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
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</tr>
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</table>
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="retval"><dt>Return values</dt><dd>
|
|
<table class="retval">
|
|
<tr><td class="paramname">interrupt</td><td>status flag, use status flag to AND <a class="el" href="a00041.html#ga9a1ca84036889749c48552282a53184c" title="FLEXSPI interrupt status flags. ">flexspi_flags_t</a> could get the related status. </td></tr>
|
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</table>
|
|
</dd>
|
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</dl>
|
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|
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</div>
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</div>
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<a class="anchor" id="ga3a374e8190cb2a45fa1eea1ffa31b912"></a>
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<div class="memitem">
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<td class="mlabels-left">
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|
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<td class="memname">static void FLEXSPI_ClearInterruptStatusFlags </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>mask</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
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</tr>
|
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</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
<tr><td class="paramname">mask</td><td>FLEXSPI interrupt source. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
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<a class="anchor" id="gabfa17750808e32b1bd7504abd27f0165"></a>
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<div class="memitem">
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<td class="memname">static <a class="el" href="a00041.html#ga00a721e456c8a4334ba7fee0a0c2a3b8">flexspi_arb_command_source_t</a> FLEXSPI_GetArbitratorCommandSource </td>
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<td>(</td>
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<td class="paramtype">FLEXSPI_Type * </td>
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<td class="paramname"><em>base</em></td><td>)</td>
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<td></td>
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
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</table>
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</dd>
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</dl>
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<dl class="retval"><dt>Return values</dt><dd>
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<table class="retval">
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<tr><td class="paramname">trigger</td><td>source of current command sequence. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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<a class="anchor" id="gad88eb12348e8f55a70373b400d1de4fc"></a>
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<td class="memname">static <a class="el" href="a00041.html#ga0fac520bfee4292d93c17a3227fb38d5">flexspi_ip_error_code_t</a> FLEXSPI_GetIPCommandErrorCode </td>
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<td>(</td>
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<td class="paramtype">FLEXSPI_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint8_t * </td>
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<td class="paramname"><em>index</em> </td>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</td>
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
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<tr><td class="paramname">index</td><td>Pointer to a uint8_t type variable to receive the sequence index when error detected. </td></tr>
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</table>
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</dd>
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</dl>
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<dl class="retval"><dt>Return values</dt><dd>
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<table class="retval">
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<tr><td class="paramname">error</td><td>code when IP command error detected. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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<a class="anchor" id="ga33ef8b44ab234ba4c66dda29d3dad20c"></a>
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<td class="memname">static <a class="el" href="a00041.html#ga849aacfbb909a2b403d39ca1b23f7f85">flexspi_ahb_error_code_t</a> FLEXSPI_GetAHBCommandErrorCode </td>
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<td>(</td>
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<td class="paramtype">FLEXSPI_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint8_t * </td>
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<td class="paramname"><em>index</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
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<tr><td class="paramname">index</td><td>Pointer to a uint8_t type variable to receive the sequence index when error detected. </td></tr>
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</table>
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</dd>
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</dl>
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<dl class="retval"><dt>Return values</dt><dd>
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<table class="retval">
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<tr><td class="paramname">error</td><td>code when AHB command error detected. </td></tr>
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</table>
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</dd>
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</dl>
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<a class="anchor" id="ga7ba5bbdc98dd7c46c46ae4f5c5cad2da"></a>
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<td class="mlabels-left">
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<td class="memname">static bool FLEXSPI_GetBusIdleStatus </td>
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<td>(</td>
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<td class="paramtype">FLEXSPI_Type * </td>
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<td class="paramname"><em>base</em></td><td>)</td>
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<td></td>
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</table>
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
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</table>
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</dd>
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</dl>
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<dl class="retval"><dt>Return values</dt><dd>
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<table class="retval">
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<tr><td class="paramname">true</td><td>Bus is idle. </td></tr>
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<tr><td class="paramname">false</td><td>Bus is busy. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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<a class="anchor" id="ga482b015aec3e0491c9359e698ca638a1"></a>
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<td class="memname">void FLEXSPI_UpdateRxSampleClock </td>
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<td>(</td>
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<td class="paramtype">FLEXSPI_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="a00041.html#ga3925749f15492f4ee50dc375b889a398">flexspi_read_sample_clock_t</a> </td>
|
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<td class="paramname"><em>clockSource</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
|
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<table class="params">
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<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
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<tr><td class="paramname">clockSource</td><td>clockSource of type <a class="el" href="a00041.html#ga3925749f15492f4ee50dc375b889a398" title="FLEXSPI sample clock source selection for Flash Reading. ">flexspi_read_sample_clock_t</a> </td></tr>
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</table>
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</dd>
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</dl>
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<td class="memname">static void FLEXSPI_EnableIPParallelMode </td>
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<td>(</td>
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<td class="paramtype">FLEXSPI_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">bool </td>
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<td class="paramname"><em>enable</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
|
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<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
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<tr><td class="paramname">enable</td><td>True means enable parallel mode, false means disable parallel mode. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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<td class="memname">static void FLEXSPI_EnableAHBParallelMode </td>
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<td>(</td>
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<td class="paramtype">FLEXSPI_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">bool </td>
|
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<td class="paramname"><em>enable</em> </td>
|
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
|
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<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
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<tr><td class="paramname">enable</td><td>True means enable parallel mode, false means disable parallel mode. </td></tr>
|
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</table>
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</dd>
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</dl>
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<a class="anchor" id="ga160f066685276e79b0f79968e3087489"></a>
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<td class="memname">void FLEXSPI_UpdateLUT </td>
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<td>(</td>
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<td class="paramtype">FLEXSPI_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
|
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<td class="paramkey"></td>
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<td></td>
|
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<td class="paramtype">uint32_t </td>
|
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<td class="paramname"><em>index</em>, </td>
|
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">const uint32_t * </td>
|
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<td class="paramname"><em>cmd</em>, </td>
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</tr>
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<tr>
|
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<td class="paramkey"></td>
|
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<td></td>
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<td class="paramtype">uint32_t </td>
|
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<td class="paramname"><em>count</em> </td>
|
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</table>
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</div><div class="memdoc">
|
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<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
<tr><td class="paramname">index</td><td>From which index start to update. It could be any index of the LUT table, which also allows user to update command content inside a command. Each command consists of up to 8 instructions and occupy 4*32-bit memory. </td></tr>
|
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<tr><td class="paramname">cmd</td><td>Command sequence array. </td></tr>
|
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<tr><td class="paramname">count</td><td>Number of sequences. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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<a class="anchor" id="ga054519fc1555d02f1c3e6652631e50ae"></a>
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<td class="memname">static void FLEXSPI_WriteData </td>
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<td>(</td>
|
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<td class="paramtype">FLEXSPI_Type * </td>
|
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
|
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<td class="paramkey"></td>
|
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<td></td>
|
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<td class="paramtype">uint32_t </td>
|
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<td class="paramname"><em>data</em>, </td>
|
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</tr>
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<tr>
|
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<td class="paramkey"></td>
|
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<td></td>
|
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<td class="paramtype">uint8_t </td>
|
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<td class="paramname"><em>fifoIndex</em> </td>
|
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</tr>
|
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<tr>
|
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
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<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address </td></tr>
|
|
<tr><td class="paramname">data</td><td>The data bytes to send </td></tr>
|
|
<tr><td class="paramname">fifoIndex</td><td>Destination fifo index. </td></tr>
|
|
</table>
|
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</dd>
|
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</dl>
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<a class="anchor" id="ga05c507ce3babcb459cda71a4ab347eae"></a>
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<td class="memname">static uint32_t FLEXSPI_ReadData </td>
|
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<td>(</td>
|
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<td class="paramtype">FLEXSPI_Type * </td>
|
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<td class="paramname"><em>base</em>, </td>
|
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</tr>
|
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<tr>
|
|
<td class="paramkey"></td>
|
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<td></td>
|
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<td class="paramtype">uint8_t </td>
|
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<td class="paramname"><em>fifoIndex</em> </td>
|
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</tr>
|
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<tr>
|
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<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
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</tr>
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</table>
|
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</td>
|
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<td class="mlabels-right">
|
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</table>
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</div><div class="memdoc">
|
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<dl class="params"><dt>Parameters</dt><dd>
|
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<table class="params">
|
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<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address </td></tr>
|
|
<tr><td class="paramname">fifoIndex</td><td>Source fifo index. </td></tr>
|
|
</table>
|
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</dd>
|
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</dl>
|
|
<dl class="section return"><dt>Returns</dt><dd>The data in the FIFO. </dd></dl>
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<a class="anchor" id="ga9707db6bb7aaac807060bf4036554787"></a>
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<td class="memname"><a class="el" href="a00272.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> FLEXSPI_WriteBlocking </td>
|
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<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
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<td></td>
|
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<td class="paramtype">uint8_t * </td>
|
|
<td class="paramname"><em>buffer</em>, </td>
|
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</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">size_t </td>
|
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<td class="paramname"><em>size</em> </td>
|
|
</tr>
|
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<tr>
|
|
<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
|
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</tr>
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</table>
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</div><div class="memdoc">
|
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<dl class="section note"><dt>Note</dt><dd>This function blocks via polling until all bytes have been sent. </dd></dl>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address </td></tr>
|
|
<tr><td class="paramname">buffer</td><td>The data bytes to send </td></tr>
|
|
<tr><td class="paramname">size</td><td>The number of data bytes to send </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
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<dl class="retval"><dt>Return values</dt><dd>
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<table class="retval">
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<tr><td class="paramname">kStatus_Success</td><td>write success without error </td></tr>
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<tr><td class="paramname">kStatus_FLEXSPI_SequenceExecutionTimeout</td><td>sequence execution timeout </td></tr>
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<tr><td class="paramname">kStatus_FLEXSPI_IpCommandSequenceError</td><td>IP command sequence error detected </td></tr>
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<tr><td class="paramname">kStatus_FLEXSPI_IpCommandGrantTimeout</td><td>IP command grant timeout detected </td></tr>
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</table>
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</dd>
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</dl>
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<td class="memname"><a class="el" href="a00272.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> FLEXSPI_ReadBlocking </td>
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<td>(</td>
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<td class="paramtype">FLEXSPI_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint8_t * </td>
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<td class="paramname"><em>buffer</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">size_t </td>
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<td class="paramname"><em>size</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</table>
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</div><div class="memdoc">
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<dl class="section note"><dt>Note</dt><dd>This function blocks via polling until all bytes have been sent. </dd></dl>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address </td></tr>
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<tr><td class="paramname">buffer</td><td>The data bytes to send </td></tr>
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<tr><td class="paramname">size</td><td>The number of data bytes to receive </td></tr>
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</table>
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</dd>
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</dl>
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<dl class="retval"><dt>Return values</dt><dd>
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<table class="retval">
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<tr><td class="paramname">kStatus_Success</td><td>read success without error </td></tr>
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<tr><td class="paramname">kStatus_FLEXSPI_SequenceExecutionTimeout</td><td>sequence execution timeout </td></tr>
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<tr><td class="paramname">kStatus_FLEXSPI_IpCommandSequenceError</td><td>IP command sequencen error detected </td></tr>
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<tr><td class="paramname">kStatus_FLEXSPI_IpCommandGrantTimeout</td><td>IP command grant timeout detected </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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<td class="memname"><a class="el" href="a00272.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> FLEXSPI_TransferBlocking </td>
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<td>(</td>
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<td class="paramtype">FLEXSPI_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="a00041.html#gae98634a0e73294cf48b94cab5d07b196">flexspi_transfer_t</a> * </td>
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<td class="paramname"><em>xfer</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
|
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<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address </td></tr>
|
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<tr><td class="paramname">xfer</td><td>pointer to the transfer structure. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="retval"><dt>Return values</dt><dd>
|
|
<table class="retval">
|
|
<tr><td class="paramname">kStatus_Success</td><td>command transfer success without error </td></tr>
|
|
<tr><td class="paramname">kStatus_FLEXSPI_SequenceExecutionTimeout</td><td>sequence execution timeout </td></tr>
|
|
<tr><td class="paramname">kStatus_FLEXSPI_IpCommandSequenceError</td><td>IP command sequence error detected </td></tr>
|
|
<tr><td class="paramname">kStatus_FLEXSPI_IpCommandGrantTimeout</td><td>IP command grant timeout detected </td></tr>
|
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</table>
|
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</dd>
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</dl>
|
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</div>
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</div>
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<a class="anchor" id="ga6f3f9cb5f3499ba238a3f316949742f0"></a>
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<td class="memname">void FLEXSPI_TransferCreateHandle </td>
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<td>(</td>
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<td class="paramtype">FLEXSPI_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="a00041.html#a00420">flexspi_handle_t</a> * </td>
|
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<td class="paramname"><em>handle</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="a00041.html#ga40558fffabe6bc75ad0d978ac56726a7">flexspi_transfer_callback_t</a> </td>
|
|
<td class="paramname"><em>callback</em>, </td>
|
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</tr>
|
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<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">void * </td>
|
|
<td class="paramname"><em>userData</em> </td>
|
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</tr>
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<tr>
|
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
|
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
<tr><td class="paramname">handle</td><td>pointer to flexspi_handle_t structure to store the transfer state. </td></tr>
|
|
<tr><td class="paramname">callback</td><td>pointer to user callback function. </td></tr>
|
|
<tr><td class="paramname">userData</td><td>user parameter passed to the callback function. </td></tr>
|
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</table>
|
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</dd>
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</dl>
|
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</div>
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</div>
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<a class="anchor" id="ga9d2eccbfd3eaf1554fd287a4a808956d"></a>
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<td class="memname"><a class="el" href="a00272.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> FLEXSPI_TransferNonBlocking </td>
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|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00041.html#a00420">flexspi_handle_t</a> * </td>
|
|
<td class="paramname"><em>handle</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00041.html#gae98634a0e73294cf48b94cab5d07b196">flexspi_transfer_t</a> * </td>
|
|
<td class="paramname"><em>xfer</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
|
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</div><div class="memdoc">
|
|
<dl class="section note"><dt>Note</dt><dd>Calling the API returns immediately after transfer initiates. The user needs to call FLEXSPI_GetTransferCount to poll the transfer status to check whether the transfer is finished. If the return status is not kStatus_FLEXSPI_Busy, the transfer is finished. For FLEXSPI_Read, the dataSize should be multiple of rx watermark level, or FLEXSPI could not read data properly.</dd></dl>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
<tr><td class="paramname">handle</td><td>pointer to flexspi_handle_t structure which stores the transfer state. </td></tr>
|
|
<tr><td class="paramname">xfer</td><td>pointer to flexspi_transfer_t structure. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="retval"><dt>Return values</dt><dd>
|
|
<table class="retval">
|
|
<tr><td class="paramname">kStatus_Success</td><td>Successfully start the data transmission. </td></tr>
|
|
<tr><td class="paramname">kStatus_FLEXSPI_Busy</td><td>Previous transmission still not finished. </td></tr>
|
|
</table>
|
|
</dd>
|
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</dl>
|
|
|
|
</div>
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</div>
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<a class="anchor" id="ga0aaa78d6b73d8f45063c21378fd60eb2"></a>
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<td class="memname"><a class="el" href="a00272.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> FLEXSPI_TransferGetCount </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00041.html#a00420">flexspi_handle_t</a> * </td>
|
|
<td class="paramname"><em>handle</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">size_t * </td>
|
|
<td class="paramname"><em>count</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
<tr><td class="paramname">handle</td><td>pointer to flexspi_handle_t structure which stores the transfer state. </td></tr>
|
|
<tr><td class="paramname">count</td><td>Number of bytes transferred so far by the non-blocking transaction. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="retval"><dt>Return values</dt><dd>
|
|
<table class="retval">
|
|
<tr><td class="paramname">kStatus_InvalidArgument</td><td>count is Invalid. </td></tr>
|
|
<tr><td class="paramname">kStatus_Success</td><td>Successfully return the count. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
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<a class="anchor" id="ga70042fa4a608b8e1db6df774a3d0a120"></a>
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<td class="memname">void FLEXSPI_TransferAbort </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00041.html#a00420">flexspi_handle_t</a> * </td>
|
|
<td class="paramname"><em>handle</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="section note"><dt>Note</dt><dd>This API can be called at any time when an interrupt non-blocking transfer initiates to abort the transfer early.</dd></dl>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
<tr><td class="paramname">handle</td><td>pointer to flexspi_handle_t structure which stores the transfer state </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
|
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<a class="anchor" id="gaa62fce61693a55bc12f31176524da48d"></a>
|
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<tr>
|
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<td class="memname">void FLEXSPI_TransferHandleIRQ </td>
|
|
<td>(</td>
|
|
<td class="paramtype">FLEXSPI_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00041.html#a00420">flexspi_handle_t</a> * </td>
|
|
<td class="paramname"><em>handle</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>FLEXSPI peripheral base address. </td></tr>
|
|
<tr><td class="paramname">handle</td><td>pointer to flexspi_handle_t structure. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
|
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