105 lines
3.4 KiB
C
105 lines
3.4 KiB
C
/*******************************************************************************
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*
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* E M B E D D E D W I Z A R D P R O J E C T
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*
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* Copyright (c) TARA Systems GmbH
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* written by Paul Banach and Manfred Schweyer
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*
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********************************************************************************
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*
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* This software is delivered "as is" and shows the usage of other software
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* components. It is provided as an example software which is intended to be
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* modified and extended according to particular requirements.
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*
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* TARA Systems hereby disclaims all warranties and conditions with regard to the
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* software, including all implied warranties and conditions of merchantability
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* and non-infringement of any third party IPR or other rights which may result
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* from the use or the inability to use the software.
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*
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********************************************************************************
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*
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* DESCRIPTION:
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* This file is part of the interface (glue layer) between an Embedded Wizard
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* generated UI application and the board support package (BSP) of a dedicated
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* target.
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* This template is responsible to configurate the entire system (CPU clock,
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* memory, qspi, etc).
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*
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*******************************************************************************/
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#include "board.h"
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#include "pin_mux.h"
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#include "ewconfig.h"
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#include "ew_bsp_system.h"
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#include "ew_bsp_clock.h"
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#include "fsl_debug_console.h"
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/*******************************************************************************
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* FUNCTION:
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* EwBspSystemInit
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*
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* DESCRIPTION:
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* The function EwBspSystemInit initializes the system components.
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* (CPU clock, memory, qspi, ...)
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*
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* ARGUMENTS:
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* None
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*
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* RETURN VALUE:
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* None
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*
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*******************************************************************************/
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void EwBspSystemInit( void )
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{
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BOARD_ConfigMPU();
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BOARD_InitPins();
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BOARD_InitI2C1Pins();
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BOARD_InitSemcPins();
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BOARD_BootClockRUN();
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BOARD_InitDebugConsole();
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/* Workaround for SEMC queue:
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The SEMC queue allows for reordering of SDRAM operations. In some conditions,
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the reodering can cause problems that appear as reading incorrect/stale data
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from the SDRAM. Changing the BMCRn values to increase the WAGE weighting
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prevents the reordering of operations and avoids the issue. */
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{
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uint32_t* SEMC_BMCR0 = (uint32_t*)0x402F0008;
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*SEMC_BMCR0 = 0x80;
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uint32_t* SEMC_BMCR1 = (uint32_t*)0x402F000C;
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*SEMC_BMCR1 = 0x80;
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}
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/* Workaround to support direct access of PXP to flash memory - splitting the
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FlexSPI AHB buffer into two parts to share between core and PXP */
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// FLEXSPI->AHBCR = 0x0; /* Temporarily disable prefetching while changing the buffer settings */
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// FLEXSPI->AHBRXBUFCR0[0] = 0x80000040; /* Allocate half of the prefetch buffer to the core */
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// FLEXSPI->AHBRXBUFCR0[3] = 0x80030040; /* Other half of the buffer for other masters incl. PXP */
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// FLEXSPI->AHBCR = 0x78; /* Set AHBCR back to the original value */
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}
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/*******************************************************************************
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* FUNCTION:
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* EwBspSystemDone
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*
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* DESCRIPTION:
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* The function EwBspSystemDone terminates the system components.
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*
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* ARGUMENTS:
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* None
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*
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* RETURN VALUE:
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* None
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*
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*******************************************************************************/
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void EwBspSystemDone( void )
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{
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}
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/* msy, mli */
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