332 lines
9.6 KiB
C
332 lines
9.6 KiB
C
/*
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* Copyright 2018-2022 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "board.h"
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#include "streamer_pcm_app.h"
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#include "fsl_codec_common.h"
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#include "fsl_wm8960.h"
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#include "app_definitions.h"
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#include "fsl_cache.h"
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AT_NONCACHEABLE_SECTION_INIT(static pcm_rtos_t pcmHandle) = {0};
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extern codec_handle_t codecHandle;
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/*! @brief SAI Transmit IRQ handler.
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*
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* This function is used to handle or clear error state.
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*/
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static void SAI_UserTxIRQHandler(void)
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{
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/* Clear the FEF (Tx FIFO underrun) flag. */
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SAI_TxClearStatusFlags(DEMO_SAI, kSAI_FIFOErrorFlag);
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SAI_TxSoftwareReset(DEMO_SAI, kSAI_ResetTypeFIFO);
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SDK_ISR_EXIT_BARRIER;
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}
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/*! @brief SAI IRQ handler.
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*
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* This function checks FIFO overrun/underrun errors and clears error state.
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*/
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void SAI1_IRQHandler(void)
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{
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if (DEMO_SAI->TCSR & kSAI_FIFOErrorFlag)
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SAI_UserTxIRQHandler();
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}
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/*! @brief SAI EDMA transmit callback
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*
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* This function is called by the EDMA interface after a block of data has been
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* successfully written to the SAI.
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*/
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static void saiTxCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData)
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{
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pcm_rtos_t *pcm = (pcm_rtos_t *)userData;
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BaseType_t reschedule = -1;
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xSemaphoreGiveFromISR(pcm->semaphoreTX, &reschedule);
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portYIELD_FROM_ISR(reschedule);
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}
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void streamer_pcm_init(void)
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{
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edma_config_t dmaConfig;
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NVIC_SetPriority(LPI2C1_IRQn, 5);
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NVIC_SetPriority(DEMO_SAI_TX_IRQ, 5U);
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NVIC_SetPriority(DMA1_DMA17_IRQn, 4U);
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NVIC_SetPriority(DMA0_DMA16_IRQn, 4U);
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EDMA_GetDefaultConfig(&dmaConfig);
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EDMA_Init(DEMO_DMA, &dmaConfig);
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/* Create DMA handle. */
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EDMA_CreateHandle(&pcmHandle.dmaTxHandle, DEMO_DMA, DEMO_TX_CHANNEL);
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/* SAI init */
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SAI_Init(DEMO_SAI);
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EnableIRQ(DEMO_SAI_TX_IRQ);
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}
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pcm_rtos_t *streamer_pcm_open(uint32_t num_buffers)
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{
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pcmHandle.semaphoreTX = xSemaphoreCreateBinary();
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SAI_TransferTxCreateHandleEDMA(DEMO_SAI, &pcmHandle.saiTxHandle, saiTxCallback, (void *)&pcmHandle,
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&pcmHandle.dmaTxHandle);
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return &pcmHandle;
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}
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pcm_rtos_t *streamer_pcm_rx_open(uint32_t num_buffers)
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{
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return 0;
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}
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void streamer_pcm_start(pcm_rtos_t *pcm)
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{
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/* Interrupts already enabled - nothing to do.
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* App/streamer can begin writing data to SAI. */
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}
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void streamer_pcm_close(pcm_rtos_t *pcm)
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{
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/* Stop playback. This will flush the SAI transmit buffers. */
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SAI_TransferTerminateSendEDMA(DEMO_SAI, &pcm->saiTxHandle);
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vSemaphoreDelete(pcmHandle.semaphoreTX);
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}
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void streamer_pcm_rx_close(pcm_rtos_t *pcm)
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{
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}
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int streamer_pcm_write(pcm_rtos_t *pcm, uint8_t *data, uint32_t size)
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{
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/* Ensure write size is a multiple of 32, otherwise EDMA will assert
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* failure. Round down for the last chunk of a file/stream. */
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pcm->saiTx.dataSize = size - (size % 32);
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pcm->saiTx.data = data;
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DCACHE_CleanByRange((uint32_t)pcm->saiTx.data, pcm->saiTx.dataSize);
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/* Start the consecutive transfer */
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while (SAI_TransferSendEDMA(DEMO_SAI, &pcm->saiTxHandle, &pcm->saiTx) == kStatus_SAI_QueueFull)
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{
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/* Wait for transfer to finish */
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if (xSemaphoreTake(pcm->semaphoreTX, portMAX_DELAY) != pdTRUE)
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{
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return -1;
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}
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}
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return 0;
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}
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int streamer_pcm_read(pcm_rtos_t *pcm, uint8_t *data, uint32_t size)
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{
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return 0;
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}
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/*! @brief Map an integer sample rate (Hz) to internal SAI enum */
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static sai_sample_rate_t _pcm_map_sample_rate(uint32_t sample_rate)
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{
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switch (sample_rate)
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{
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case 8000:
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return kSAI_SampleRate8KHz;
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case 11025:
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return kSAI_SampleRate11025Hz;
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case 12000:
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return kSAI_SampleRate12KHz;
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case 16000:
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return kSAI_SampleRate16KHz;
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case 24000:
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return kSAI_SampleRate24KHz;
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case 22050:
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return kSAI_SampleRate22050Hz;
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case 32000:
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return kSAI_SampleRate32KHz;
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case 44100:
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return kSAI_SampleRate44100Hz;
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case 48000:
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default:
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return kSAI_SampleRate48KHz;
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}
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}
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/*! @brief Map an integer bit width (bits) to internal SAI enum */
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static sai_word_width_t _pcm_map_word_width(uint32_t bit_width)
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{
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switch (bit_width)
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{
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case 8:
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return kSAI_WordWidth8bits;
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case 16:
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return kSAI_WordWidth16bits;
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case 24:
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return kSAI_WordWidth24bits;
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case 32:
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return kSAI_WordWidth32bits;
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default:
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return kSAI_WordWidth16bits;
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}
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}
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/*! @brief Map an integer number of channels to internal SAI enum */
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static sai_mono_stereo_t _pcm_map_channels(uint8_t num_channels)
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{
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if (num_channels >= 2)
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return kSAI_Stereo;
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else
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return kSAI_MonoRight;
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}
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int streamer_pcm_setparams(pcm_rtos_t *pcm,
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uint32_t sample_rate,
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uint32_t bit_width,
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uint8_t num_channels,
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bool transfer,
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bool dummy_tx,
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int volume)
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{
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sai_transfer_format_t format = {0};
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sai_transceiver_t saiConfig;
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uint32_t masterClockHz = 0U;
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pcm->sample_rate = sample_rate;
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pcm->bit_width = bit_width;
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pcm->num_channels = num_channels;
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pcm->dummy_tx_enable = dummy_tx;
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masterClockHz = streamer_set_master_clock(sample_rate);
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format.channel = 0U;
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format.bitWidth = _pcm_map_word_width(bit_width);
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format.sampleRate_Hz = _pcm_map_sample_rate(sample_rate);
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format.stereo = _pcm_map_channels(num_channels);
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#if (defined FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER && FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER)
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format.masterClockHz = masterClockHz;
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#endif
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SAI_TransferTerminateSendEDMA(DEMO_SAI, &pcm->saiTxHandle);
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SAI_GetClassicI2SConfig(&saiConfig, _pcm_map_word_width(bit_width), format.stereo, 1U << DEMO_SAI_CHANNEL);
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saiConfig.syncMode = kSAI_ModeAsync;
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saiConfig.masterSlave = kSAI_Master;
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SAI_TransferTxSetConfigEDMA(DEMO_SAI, &pcmHandle.saiTxHandle, &saiConfig);
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/* set bit clock divider */
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SAI_TxSetBitClockRate(DEMO_SAI, masterClockHz, _pcm_map_sample_rate(sample_rate), _pcm_map_word_width(bit_width),
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DEMO_CHANNEL_NUM);
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/* Enable SAI transmit and FIFO error interrupts. */
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SAI_TxEnableInterrupts(DEMO_SAI, kSAI_FIFOErrorInterruptEnable);
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streamer_pcm_set_volume(pcm, 0);
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CODEC_SetFormat(&codecHandle, masterClockHz, format.sampleRate_Hz, format.bitWidth);
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streamer_pcm_set_volume(pcm, volume);
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return 0;
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}
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void streamer_pcm_getparams(pcm_rtos_t *pcm, uint32_t *sample_rate, uint32_t *bit_width, uint8_t *num_channels)
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{
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*sample_rate = pcm->sample_rate;
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*bit_width = pcm->bit_width;
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*num_channels = pcm->num_channels;
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}
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int streamer_pcm_mute(pcm_rtos_t *pcm, bool mute)
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{
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CODEC_SetMute(&codecHandle, kCODEC_PlayChannelHeadphoneRight | kCODEC_PlayChannelHeadphoneLeft, mute);
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return 0;
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}
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int streamer_pcm_set_volume(pcm_rtos_t *pcm, int volume)
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{
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int channel;
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channel = (pcm->num_channels == 1) ? kCODEC_PlayChannelHeadphoneLeft :
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kCODEC_PlayChannelHeadphoneLeft | kCODEC_PlayChannelHeadphoneRight;
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if (volume <= 0)
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CODEC_SetMute(&codecHandle, channel, true);
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else
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CODEC_SetVolume(&codecHandle, channel, volume > CODEC_VOLUME_MAX_VALUE ? CODEC_VOLUME_MAX_VALUE : volume);
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return 0;
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}
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int streamer_set_master_clock(int sample_rate)
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{
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int master_clock;
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#if DEMO_CODEC_CS42448
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int divider = DEMO_SAI1_CLOCK_SOURCE_DIVIDER;
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int predivider = DEMO_SAI1_CLOCK_SOURCE_PRE_DIVIDER;
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#endif
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if (sample_rate % 8000 == 0 || sample_rate % 6000 == 0)
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{
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/* Configure Audio PLL clock to 786.432 MHz to to be divisible by 48000 Hz */
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const clock_audio_pll_config_t audioPllConfig48 = {
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.loopDivider = 32, /* PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */
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.postDivider = 1, /* Divider after the PLL, should only be 1, 2, 4, 8, 16. */
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.numerator = 96, /* 30 bit numerator of fractional loop divider. */
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.denominator = 125, /* 30 bit denominator of fractional loop divider */
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};
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CLOCK_InitAudioPll(&audioPllConfig48);
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}
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else
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{
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/* Configure Audio PLL clock to 722.5344 MHz to be divisible by 44100 Hz */
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const clock_audio_pll_config_t audioPllConfig = {
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.loopDivider = 30, /* PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */
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.postDivider = 1, /* Divider after the PLL, should only be 1, 2, 4, 8, 16. */
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.numerator = 66, /* 30 bit numerator of fractional loop divider. */
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.denominator = 625, /* 30 bit denominator of fractional loop divider */
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};
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CLOCK_InitAudioPll(&audioPllConfig);
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}
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#if DEMO_CODEC_CS42448
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switch (sample_rate)
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{
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case 11025:
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case 12000:
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case 24000:
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{
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divider = 63;
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break;
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}
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case 8000:
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{
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predivider = 1;
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}
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case 16000:
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{
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divider = 47;
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break;
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}
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case 32000:
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{
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divider = 23;
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break;
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}
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case 22050:
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case 44100:
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case 48000:
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default:
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divider = 31;
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break;
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}
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CLOCK_SetDiv(kCLOCK_Sai1PreDiv, predivider);
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CLOCK_SetDiv(kCLOCK_Sai1Div, divider);
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master_clock = CLOCK_GetFreq(kCLOCK_AudioPllClk) / (divider + 1U) / (predivider + 1U);
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#else
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master_clock = DEMO_SAI_CLK_FREQ;
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#endif
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return master_clock;
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}
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