66 lines
2.1 KiB
C
66 lines
2.1 KiB
C
/*
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* Copyright 2021 NXP
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* All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _APP_DEFINITIONS_H_
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#define _APP_DEFINITIONS_H_
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/*${header:start}*/
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#include "fsl_wm8960.h"
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/*${header:end}*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*${macro:start}*/
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/* SAI instance and clock */
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#define DEMO_CODEC_WM8960
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#define DEMO_SAI SAI1
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#define DEMO_SAI_CHANNEL (0)
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#define DEMO_SAI_BITWIDTH (kSAI_WordWidth16bits)
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#define DEMO_SAI_IRQ SAI1_IRQn
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#define SAI_UserIRQHandler SAI1_IRQHandler
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#define DEMO_CHANNEL_NUM 2
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#define DEMO_CODEC_CHANNEL kCODEC_PlayChannelHeadphoneLeft | kCODEC_PlayChannelHeadphoneRight
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/* IRQ */
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#define DEMO_SAI_TX_IRQ SAI1_IRQn
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#define DEMO_SAI_RX_IRQ SAI1_IRQn
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/* DMA */
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#define DEMO_DMA DMA0
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#define DEMO_DMAMUX DMAMUX
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#define DEMO_TX_CHANNEL (0U)
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#define DEMO_RX_CHANNEL (1U)
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#define DEMO_SAI_TX_SOURCE kDmaRequestMuxSai1Tx
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#define DEMO_SAI_RX_SOURCE kDmaRequestMuxSai1Rx
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/* Select Audio/Video PLL (786.48 MHz) as sai1 clock source */
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#define DEMO_SAI1_CLOCK_SOURCE_SELECT (2U)
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/* Clock pre divider for sai1 clock source */
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#define DEMO_SAI1_CLOCK_SOURCE_PRE_DIVIDER (0U)
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/* Clock divider for sai1 clock source */
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#define DEMO_SAI1_CLOCK_SOURCE_DIVIDER (63U)
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/* Get frequency of sai1 clock */
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#define DEMO_SAI_CLK_FREQ \
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(CLOCK_GetFreq(kCLOCK_AudioPllClk) / (DEMO_SAI1_CLOCK_SOURCE_DIVIDER + 1U) / \
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(DEMO_SAI1_CLOCK_SOURCE_PRE_DIVIDER + 1U))
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/* I2C instance and clock */
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#define DEMO_I2C LPI2C1
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/* Select USB1 PLL (480 MHz) as master lpi2c clock source */
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#define DEMO_LPI2C_CLOCK_SOURCE_SELECT (0U)
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/* Clock divider for master lpi2c clock source */
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#define DEMO_LPI2C_CLOCK_SOURCE_DIVIDER (5U)
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/* Get frequency of lpi2c clock */
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#define DEMO_I2C_CLK_FREQ ((CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8) / (DEMO_LPI2C_CLOCK_SOURCE_DIVIDER + 1U))
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#define DEMO_VOLUME (75)
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/*${macro:end}*/
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#endif /* _APP_DEFINITIONS_H_ */
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