217 lines
9.1 KiB
C
217 lines
9.1 KiB
C
/*
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* Copyright 2021-2022 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* Supported Wi-Fi boards (modules):
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* WIFI_88W8801_BOARD_AW_NM191_USD
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* WIFI_IW416_BOARD_AW_AM457_USD
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* WIFI_IW416_BOARD_AW_AM510_USD
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* WIFI_88W8987_BOARD_AW_CM358_USD
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* WIFI_88W8801_BOARD_MURATA_2DS_USD
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* WIFI_IW416_BOARD_MURATA_1XK_USD
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* WIFI_88W8987_BOARD_MURATA_1ZM_USD
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*/
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/* @TEST_ANCHOR */
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#define WIFI_IW416_BOARD_AW_AM510_USD
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/* @END_TEST_ANCHOR */
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/* Wi-Fi boards configuration list */
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/* AzureWave AW-NM191-uSD */
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#if defined(WIFI_88W8801_BOARD_AW_NM191_USD)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8801
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x1B \
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}
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/* AzureWave AW-NM191MA */
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#elif defined(WIFI_88W8801_BOARD_AW_NM191MA)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8801
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define WIFI_BT_USE_M2_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x1B \
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}
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/* AzureWave AW-AM457-uSD */
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#elif defined(WIFI_IW416_BOARD_AW_AM457_USD)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8978
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define WIFI_BT_USE_USD_INTERFACE
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#define OVERRIDE_CALIBRATION_DATA "WIFI_IW416_BOARD_AW_AM457_CAL_DATA_EXT.h"
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
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}
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/* AzureWave AW-AM457MA */
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#elif defined(WIFI_IW416_BOARD_AW_AM457MA)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8978
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define WIFI_BT_USE_M2_INTERFACE
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#define OVERRIDE_CALIBRATION_DATA "WIFI_IW416_BOARD_AW_AM457_CAL_DATA_EXT.h"
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
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}
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/* AzureWave AW-AM510-uSD */
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#elif defined(WIFI_IW416_BOARD_AW_AM510_USD)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8978
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
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}
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/* AzureWave AW-AM510MA */
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#elif defined(WIFI_IW416_BOARD_AW_AM510MA)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8978
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define WIFI_BT_USE_M2_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
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}
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/* AzureWave AW-CM358-uSD */
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#elif defined(WIFI_88W8987_BOARD_AW_CM358_USD)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8987
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
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}
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/* AzureWave AW-CM358MA */
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#elif defined(WIFI_88W8987_BOARD_AW_CM358MA)
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
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#define SD8987
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_M2_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
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}
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/* Murata 2DS + Murata uSD-M.2 adapter */
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#elif defined(WIFI_88W8801_BOARD_MURATA_2DS_USD)
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_CA.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_EU.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_JP.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_US.h"
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_WW.h"
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#define SD8801
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingSDR25HighSpeedMode
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x1E \
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}
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/* Murata 2DS */
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#elif defined(WIFI_88W8801_BOARD_MURATA_2DS_M2)
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_CA.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_EU.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_JP.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_US.h"
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_WW.h"
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#define SD8801
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingSDR25HighSpeedMode
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#define WIFI_BT_USE_M2_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x1E \
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}
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/* Murata 1XK + Murata uSD-M.2 adapter */
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#elif defined(WIFI_IW416_BOARD_MURATA_1XK_USD)
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_CA.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_EU.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_JP.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_US.h"
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_WW.h"
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#define SD8978
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x0, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0x6 \
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}
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/* Murata 1XK */
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#elif defined(WIFI_IW416_BOARD_MURATA_1XK_M2)
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_CA.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_EU.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_JP.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_US.h"
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_WW.h"
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#define SD8978
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_M2_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x0, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0x6 \
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}
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/* Murata 1ZM + Murata uSD-M.2 adapter */
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#elif defined(WIFI_88W8987_BOARD_MURATA_1ZM_USD)
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_CA.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_EU.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_JP.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_US.h"
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_WW.h"
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#define SD8987
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_USD_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x6, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0x6 \
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}
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/* Murata 1ZM */
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#elif defined(WIFI_88W8987_BOARD_MURATA_1ZM_M2)
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_CA.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_EU.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_JP.h"
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// #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_US.h"
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#define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_WW.h"
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#define SD8987
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#define SDMMCHOST_OPERATION_VOLTAGE_1V8
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#define SD_TIMING_MAX kSD_TimingDDR50Mode
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#define WIFI_BT_USE_M2_INTERFACE
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#define WLAN_ED_MAC_CTRL \
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{ \
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.ed_ctrl_2g = 0x1, .ed_offset_2g = 0x6, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0x6 \
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}
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#else
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#error "Please define macro related to wifi board"
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#endif
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#include "wifi_config.h"
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