198 lines
7.0 KiB
C
198 lines
7.0 KiB
C
/*
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* The Clear BSD License
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* Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted (subject to the limitations in the disclaimer below) provided
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* that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _FSL_CRC_H_
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#define _FSL_CRC_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup crc
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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/*! @brief CRC driver version. Version 2.0.1.
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*
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* Current version: 2.0.1
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*
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* Change log:
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* - Version 2.0.1
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* - move DATA and DATALL macro definition from header file to source file
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*/
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#define FSL_CRC_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
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/*@}*/
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#ifndef CRC_DRIVER_CUSTOM_DEFAULTS
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/*! @brief Default configuration structure filled by CRC_GetDefaultConfig(). Use CRC16-CCIT-FALSE as defeault. */
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#define CRC_DRIVER_USE_CRC16_CCIT_FALSE_AS_DEFAULT 1
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#endif
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/*! @brief CRC bit width */
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typedef enum _crc_bits
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{
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kCrcBits16 = 0U, /*!< Generate 16-bit CRC code */
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kCrcBits32 = 1U /*!< Generate 32-bit CRC code */
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} crc_bits_t;
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/*! @brief CRC result type */
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typedef enum _crc_result
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{
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kCrcFinalChecksum = 0U, /*!< CRC data register read value is the final checksum.
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Reflect out and final xor protocol features are applied. */
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kCrcIntermediateChecksum = 1U /*!< CRC data register read value is intermediate checksum (raw value).
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Reflect out and final xor protocol feature are not applied.
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Intermediate checksum can be used as a seed for CRC_Init()
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to continue adding data to this checksum. */
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} crc_result_t;
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/*!
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* @brief CRC protocol configuration.
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*
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* This structure holds the configuration for the CRC protocol.
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*
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*/
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typedef struct _crc_config
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{
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uint32_t polynomial; /*!< CRC Polynomial, MSBit first.
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Example polynomial: 0x1021 = 1_0000_0010_0001 = x^12+x^5+1 */
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uint32_t seed; /*!< Starting checksum value */
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bool reflectIn; /*!< Reflect bits on input. */
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bool reflectOut; /*!< Reflect bits on output. */
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bool complementChecksum; /*!< True if the result shall be complement of the actual checksum. */
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crc_bits_t crcBits; /*!< Selects 16- or 32- bit CRC protocol. */
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crc_result_t crcResult; /*!< Selects final or intermediate checksum return from CRC_Get16bitResult() or
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CRC_Get32bitResult() */
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} crc_config_t;
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @brief Enables and configures the CRC peripheral module.
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*
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* This function enables the clock gate in the SIM module for the CRC peripheral.
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* It also configures the CRC module and starts a checksum computation by writing the seed.
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*
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* @param base CRC peripheral address.
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* @param config CRC module configuration structure.
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*/
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void CRC_Init(CRC_Type *base, const crc_config_t *config);
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/*!
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* @brief Disables the CRC peripheral module.
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*
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* This function disables the clock gate in the SIM module for the CRC peripheral.
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*
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* @param base CRC peripheral address.
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*/
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static inline void CRC_Deinit(CRC_Type *base)
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{
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* gate clock */
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CLOCK_DisableClock(kCLOCK_Crc0);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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}
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/*!
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* @brief Loads default values to the CRC protocol configuration structure.
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*
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* Loads default values to the CRC protocol configuration structure. The default values are as follows.
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* @code
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* config->polynomial = 0x1021;
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* config->seed = 0xFFFF;
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* config->reflectIn = false;
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* config->reflectOut = false;
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* config->complementChecksum = false;
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* config->crcBits = kCrcBits16;
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* config->crcResult = kCrcFinalChecksum;
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* @endcode
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*
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* @param config CRC protocol configuration structure.
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*/
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void CRC_GetDefaultConfig(crc_config_t *config);
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/*!
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* @brief Writes data to the CRC module.
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*
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* Writes input data buffer bytes to the CRC data register.
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* The configured type of transpose is applied.
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*
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* @param base CRC peripheral address.
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* @param data Input data stream, MSByte in data[0].
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* @param dataSize Size in bytes of the input data buffer.
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*/
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void CRC_WriteData(CRC_Type *base, const uint8_t *data, size_t dataSize);
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/*!
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* @brief Reads the 32-bit checksum from the CRC module.
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*
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* Reads the CRC data register (either an intermediate or the final checksum).
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* The configured type of transpose and complement is applied.
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*
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* @param base CRC peripheral address.
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* @return An intermediate or the final 32-bit checksum, after configured transpose and complement operations.
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*/
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uint32_t CRC_Get32bitResult(CRC_Type *base);
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/*!
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* @brief Reads a 16-bit checksum from the CRC module.
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*
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* Reads the CRC data register (either an intermediate or the final checksum).
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* The configured type of transpose and complement is applied.
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*
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* @param base CRC peripheral address.
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* @return An intermediate or the final 16-bit checksum, after configured transpose and complement operations.
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*/
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uint16_t CRC_Get16bitResult(CRC_Type *base);
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#if defined(__cplusplus)
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}
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#endif
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/*!
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*@}
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*/
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#endif /* _FSL_CRC_H_ */
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