487 lines
18 KiB
C
487 lines
18 KiB
C
/*
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* The Clear BSD License
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted (subject to the limitations in the disclaimer below) provided
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* that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "fsl_lpi2c_edma.h"
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#include <stdlib.h>
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#include <string.h>
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.lpi2c_edma"
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#endif
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/* @brief Mask to align an address to 32 bytes. */
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#define ALIGN_32_MASK (0x1fU)
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/*! @brief Common sets of flags used by the driver. */
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enum _lpi2c_flag_constants
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{
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/*! All flags which are cleared by the driver upon starting a transfer. */
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kMasterClearFlags = kLPI2C_MasterEndOfPacketFlag | kLPI2C_MasterStopDetectFlag | kLPI2C_MasterNackDetectFlag |
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kLPI2C_MasterArbitrationLostFlag | kLPI2C_MasterFifoErrFlag | kLPI2C_MasterPinLowTimeoutFlag |
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kLPI2C_MasterDataMatchFlag,
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/*! IRQ sources enabled by the non-blocking transactional API. */
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kMasterIrqFlags = kLPI2C_MasterArbitrationLostFlag | kLPI2C_MasterTxReadyFlag | kLPI2C_MasterRxReadyFlag |
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kLPI2C_MasterStopDetectFlag | kLPI2C_MasterNackDetectFlag | kLPI2C_MasterPinLowTimeoutFlag |
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kLPI2C_MasterFifoErrFlag,
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/*! Errors to check for. */
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kMasterErrorFlags = kLPI2C_MasterNackDetectFlag | kLPI2C_MasterArbitrationLostFlag | kLPI2C_MasterFifoErrFlag |
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kLPI2C_MasterPinLowTimeoutFlag,
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/*! All flags which are cleared by the driver upon starting a transfer. */
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kSlaveClearFlags = kLPI2C_SlaveRepeatedStartDetectFlag | kLPI2C_SlaveStopDetectFlag | kLPI2C_SlaveBitErrFlag |
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kLPI2C_SlaveFifoErrFlag,
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/*! IRQ sources enabled by the non-blocking transactional API. */
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kSlaveIrqFlags = kLPI2C_SlaveTxReadyFlag | kLPI2C_SlaveRxReadyFlag | kLPI2C_SlaveStopDetectFlag |
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kLPI2C_SlaveRepeatedStartDetectFlag | kLPI2C_SlaveFifoErrFlag | kLPI2C_SlaveBitErrFlag |
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kLPI2C_SlaveTransmitAckFlag | kLPI2C_SlaveAddressValidFlag,
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/*! Errors to check for. */
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kSlaveErrorFlags = kLPI2C_SlaveFifoErrFlag | kLPI2C_SlaveBitErrFlag,
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};
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/* ! @brief LPI2C master fifo commands. */
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enum _lpi2c_master_fifo_cmd
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{
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kTxDataCmd = LPI2C_MTDR_CMD(0x0U), /*!< Transmit DATA[7:0] */
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kRxDataCmd = LPI2C_MTDR_CMD(0X1U), /*!< Receive (DATA[7:0] + 1) bytes */
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kStopCmd = LPI2C_MTDR_CMD(0x2U), /*!< Generate STOP condition */
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kStartCmd = LPI2C_MTDR_CMD(0x4U), /*!< Generate(repeated) START and transmit address in DATA[[7:0] */
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};
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/*! @brief States for the state machine used by transactional APIs. */
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enum _lpi2c_transfer_states
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{
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kIdleState = 0,
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kSendCommandState,
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kIssueReadCommandState,
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kTransferDataState,
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kStopState,
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kWaitForCompletionState,
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};
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/*! @brief Typedef for interrupt handler. */
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typedef void (*lpi2c_isr_t)(LPI2C_Type *base, void *handle);
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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static uint32_t LPI2C_GenerateCommands(lpi2c_master_edma_handle_t *handle);
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static void LPI2C_MasterEDMACallback(edma_handle_t *dmaHandle, void *userData, bool isTransferDone, uint32_t tcds);
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/*******************************************************************************
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* Code
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******************************************************************************/
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void LPI2C_MasterCreateEDMAHandle(LPI2C_Type *base,
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lpi2c_master_edma_handle_t *handle,
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edma_handle_t *rxDmaHandle,
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edma_handle_t *txDmaHandle,
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lpi2c_master_edma_transfer_callback_t callback,
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void *userData)
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{
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assert(handle);
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assert(rxDmaHandle);
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assert(txDmaHandle);
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/* Clear out the handle. */
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memset(handle, 0, sizeof(*handle));
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/* Set up the handle. For combined rx/tx DMA requests, the tx channel handle is set to the rx handle */
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/* in order to make the transfer API code simpler. */
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handle->base = base;
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handle->completionCallback = callback;
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handle->userData = userData;
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handle->rx = rxDmaHandle;
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handle->tx = FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base) ? txDmaHandle : rxDmaHandle;
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/* Set DMA channel completion callbacks. */
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EDMA_SetCallback(handle->rx, LPI2C_MasterEDMACallback, handle);
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if (FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base))
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{
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EDMA_SetCallback(handle->tx, LPI2C_MasterEDMACallback, handle);
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}
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}
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/*!
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* @brief Prepares the command buffer with the sequence of commands needed to send the requested transaction.
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* @param handle Master DMA driver handle.
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* @return Number of command words.
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*/
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static uint32_t LPI2C_GenerateCommands(lpi2c_master_edma_handle_t *handle)
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{
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lpi2c_master_transfer_t *xfer = &handle->transfer;
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uint16_t *cmd = (uint16_t *)&handle->commandBuffer;
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uint32_t cmdCount = 0;
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/* Handle no start option. */
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if (xfer->flags & kLPI2C_TransferNoStartFlag)
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{
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if (xfer->direction == kLPI2C_Read)
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{
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/* Need to issue read command first. */
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cmd[cmdCount++] = kRxDataCmd | LPI2C_MTDR_DATA(xfer->dataSize - 1);
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}
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}
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else
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{
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/*
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* Initial direction depends on whether a subaddress was provided, and of course the actual
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* data transfer direction.
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*/
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lpi2c_direction_t direction = xfer->subaddressSize ? kLPI2C_Write : xfer->direction;
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/* Start command. */
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cmd[cmdCount++] =
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(uint16_t)kStartCmd | (uint16_t)((uint16_t)((uint16_t)xfer->slaveAddress << 1U) | (uint16_t)direction);
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/* Subaddress, MSB first. */
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if (xfer->subaddressSize)
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{
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uint32_t subaddressRemaining = xfer->subaddressSize;
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while (subaddressRemaining--)
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{
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uint8_t subaddressByte = (xfer->subaddress >> (8 * subaddressRemaining)) & 0xff;
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cmd[cmdCount++] = subaddressByte;
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}
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}
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/* Reads need special handling because we have to issue a read command and maybe a repeated start. */
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if ((xfer->dataSize) && (xfer->direction == kLPI2C_Read))
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{
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/* Need to send repeated start if switching directions to read. */
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if (direction == kLPI2C_Write)
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{
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cmd[cmdCount++] = (uint16_t)kStartCmd |
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(uint16_t)((uint16_t)((uint16_t)xfer->slaveAddress << 1U) | (uint16_t)kLPI2C_Read);
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}
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/* Read command. */
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cmd[cmdCount++] = kRxDataCmd | LPI2C_MTDR_DATA(xfer->dataSize - 1);
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}
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}
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return cmdCount;
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}
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status_t LPI2C_MasterTransferEDMA(LPI2C_Type *base,
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lpi2c_master_edma_handle_t *handle,
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lpi2c_master_transfer_t *transfer)
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{
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status_t result;
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assert(handle);
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assert(transfer);
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assert(transfer->subaddressSize <= sizeof(transfer->subaddress));
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/* Return busy if another transaction is in progress. */
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if (handle->isBusy)
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{
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return kStatus_LPI2C_Busy;
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}
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/* Return an error if the bus is already in use not by us. */
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result = LPI2C_CheckForBusyBus(base);
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if (result)
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{
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return result;
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}
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/* We're now busy. */
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handle->isBusy = true;
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/* Disable LPI2C IRQ and DMA sources while we configure stuff. */
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LPI2C_MasterDisableInterrupts(base, kMasterIrqFlags);
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LPI2C_MasterEnableDMA(base, false, false);
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/* Clear all flags. */
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LPI2C_MasterClearStatusFlags(base, kMasterClearFlags);
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/* Save transfer into handle. */
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handle->transfer = *transfer;
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/* Generate commands to send. */
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uint32_t commandCount = LPI2C_GenerateCommands(handle);
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/* If the user is transmitting no data with no start or stop, then just go ahead and invoke the callback. */
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if ((!commandCount) && (transfer->dataSize == 0))
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{
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if (handle->completionCallback)
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{
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handle->completionCallback(base, handle, kStatus_Success, handle->userData);
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}
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return kStatus_Success;
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}
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/* Reset DMA channels. */
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EDMA_ResetChannel(handle->rx->base, handle->rx->channel);
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if (FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base))
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{
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EDMA_ResetChannel(handle->tx->base, handle->tx->channel);
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}
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/* Get a 32-byte aligned TCD pointer. */
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edma_tcd_t *tcd = (edma_tcd_t *)((uint32_t)(&handle->tcds[1]) & (~ALIGN_32_MASK));
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bool hasSendData = (transfer->direction == kLPI2C_Write) && (transfer->dataSize);
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bool hasReceiveData = (transfer->direction == kLPI2C_Read) && (transfer->dataSize);
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edma_transfer_config_t transferConfig;
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edma_tcd_t *linkTcd = NULL;
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/* Set up data transmit. */
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if (hasSendData)
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{
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transferConfig.srcAddr = (uint32_t)transfer->data;
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transferConfig.destAddr = (uint32_t)LPI2C_MasterGetTxFifoAddress(base);
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transferConfig.srcTransferSize = kEDMA_TransferSize1Bytes;
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transferConfig.destTransferSize = kEDMA_TransferSize1Bytes;
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transferConfig.srcOffset = sizeof(uint8_t);
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transferConfig.destOffset = 0;
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transferConfig.minorLoopBytes = sizeof(uint8_t); /* TODO optimize to fill fifo */
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transferConfig.majorLoopCounts = transfer->dataSize;
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/* Store the initially configured eDMA minor byte transfer count into the LPI2C handle */
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handle->nbytes = transferConfig.minorLoopBytes;
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if (commandCount)
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{
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/* Create a software TCD, which will be chained after the commands. */
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EDMA_TcdReset(tcd);
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EDMA_TcdSetTransferConfig(tcd, &transferConfig, NULL);
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EDMA_TcdEnableInterrupts(tcd, kEDMA_MajorInterruptEnable);
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linkTcd = tcd;
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}
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else
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{
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/* User is only transmitting data with no required commands, so this transfer can stand alone. */
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EDMA_SetTransferConfig(handle->tx->base, handle->tx->channel, &transferConfig, NULL);
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EDMA_EnableChannelInterrupts(handle->tx->base, handle->tx->channel, kEDMA_MajorInterruptEnable);
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}
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}
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else if (hasReceiveData)
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{
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/* Set up data receive. */
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transferConfig.srcAddr = (uint32_t)LPI2C_MasterGetRxFifoAddress(base);
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transferConfig.destAddr = (uint32_t)transfer->data;
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transferConfig.srcTransferSize = kEDMA_TransferSize1Bytes;
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transferConfig.destTransferSize = kEDMA_TransferSize1Bytes;
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transferConfig.srcOffset = 0;
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transferConfig.destOffset = sizeof(uint8_t);
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transferConfig.minorLoopBytes = sizeof(uint8_t); /* TODO optimize to empty fifo */
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transferConfig.majorLoopCounts = transfer->dataSize;
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/* Store the initially configured eDMA minor byte transfer count into the LPI2C handle */
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handle->nbytes = transferConfig.minorLoopBytes;
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if (FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base) || (!commandCount))
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{
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/* We can put this receive transfer on its own DMA channel. */
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EDMA_SetTransferConfig(handle->rx->base, handle->rx->channel, &transferConfig, NULL);
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EDMA_EnableChannelInterrupts(handle->rx->base, handle->rx->channel, kEDMA_MajorInterruptEnable);
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}
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else
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{
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/* For shared rx/tx DMA requests when there are commands, create a software TCD which will be */
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/* chained onto the commands transfer, notice that in this situation assume tx/rx uses same channel */
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EDMA_TcdReset(tcd);
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EDMA_TcdSetTransferConfig(tcd, &transferConfig, NULL);
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EDMA_TcdEnableInterrupts(tcd, kEDMA_MajorInterruptEnable);
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linkTcd = tcd;
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}
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}
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else
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{
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/* No data to send */
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}
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/* Set up commands transfer. */
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if (commandCount)
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{
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transferConfig.srcAddr = (uint32_t)handle->commandBuffer;
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transferConfig.destAddr = (uint32_t)LPI2C_MasterGetTxFifoAddress(base);
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transferConfig.srcTransferSize = kEDMA_TransferSize2Bytes;
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transferConfig.destTransferSize = kEDMA_TransferSize2Bytes;
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transferConfig.srcOffset = sizeof(uint16_t);
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transferConfig.destOffset = 0;
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transferConfig.minorLoopBytes = sizeof(uint16_t); /* TODO optimize to fill fifo */
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transferConfig.majorLoopCounts = commandCount;
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EDMA_SetTransferConfig(handle->tx->base, handle->tx->channel, &transferConfig, linkTcd);
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}
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/* Start DMA transfer. */
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if (hasReceiveData || !FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base))
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{
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EDMA_StartTransfer(handle->rx);
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}
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if (hasReceiveData && !FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base))
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{
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EDMA_EnableChannelInterrupts(handle->tx->base, handle->tx->channel, kEDMA_MajorInterruptEnable);
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}
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if ((hasSendData || commandCount) && FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base))
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{
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EDMA_StartTransfer(handle->tx);
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}
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/* Enable DMA in both directions. This actually kicks of the transfer. */
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LPI2C_MasterEnableDMA(base, true, true);
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return result;
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}
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status_t LPI2C_MasterTransferGetCountEDMA(LPI2C_Type *base, lpi2c_master_edma_handle_t *handle, size_t *count)
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{
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assert(handle);
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if (!count)
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{
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return kStatus_InvalidArgument;
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}
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/* Catch when there is not an active transfer. */
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if (!handle->isBusy)
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{
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*count = 0;
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return kStatus_NoTransferInProgress;
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}
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uint32_t remaining = handle->transfer.dataSize;
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/* If the DMA is still on a commands transfer that chains to the actual data transfer, */
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/* we do nothing and return the number of transferred bytes as zero. */
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if (EDMA_GetNextTCDAddress(handle->tx) == 0)
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{
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if (handle->transfer.direction == kLPI2C_Write)
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{
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remaining =
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(uint32_t)handle->nbytes * EDMA_GetRemainingMajorLoopCount(handle->tx->base, handle->tx->channel);
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}
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else
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{
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remaining =
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(uint32_t)handle->nbytes * EDMA_GetRemainingMajorLoopCount(handle->rx->base, handle->rx->channel);
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}
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}
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*count = handle->transfer.dataSize - remaining;
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return kStatus_Success;
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}
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status_t LPI2C_MasterTransferAbortEDMA(LPI2C_Type *base, lpi2c_master_edma_handle_t *handle)
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{
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/* Catch when there is not an active transfer. */
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if (!handle->isBusy)
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{
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return kStatus_LPI2C_Idle;
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}
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/* Terminate DMA transfers. */
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EDMA_AbortTransfer(handle->rx);
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if (FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base))
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{
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EDMA_AbortTransfer(handle->tx);
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}
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/* Reset fifos. */
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base->MCR |= LPI2C_MCR_RRF_MASK | LPI2C_MCR_RTF_MASK;
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/* Send a stop command to finalize the transfer. */
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base->MTDR = kStopCmd;
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/* Reset handle. */
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handle->isBusy = false;
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return kStatus_Success;
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}
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/*!
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* @brief DMA completion callback.
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* @param dmaHandle DMA channel handle for the channel that completed.
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* @param userData User data associated with the channel handle. For this callback, the user data is the
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* LPI2C DMA driver handle.
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* @param isTransferDone Whether the DMA transfer has completed.
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* @param tcds Number of TCDs that completed.
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*/
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static void LPI2C_MasterEDMACallback(edma_handle_t *dmaHandle, void *userData, bool isTransferDone, uint32_t tcds)
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{
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lpi2c_master_edma_handle_t *handle = (lpi2c_master_edma_handle_t *)userData;
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bool hasReceiveData;
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if (!handle)
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{
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return;
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}
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hasReceiveData = (handle->transfer.direction == kLPI2C_Read) && (handle->transfer.dataSize);
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if (hasReceiveData && !FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base))
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|
{
|
|
if (EDMA_GetNextTCDAddress(handle->tx) != 0)
|
|
{
|
|
LPI2C_MasterEnableDMA(handle->base, false, true);
|
|
}
|
|
}
|
|
|
|
/* Check for errors. */
|
|
status_t result = LPI2C_MasterCheckAndClearError(handle->base, LPI2C_MasterGetStatusFlags(handle->base));
|
|
|
|
/* Done with this transaction. */
|
|
handle->isBusy = false;
|
|
|
|
if (!(handle->transfer.flags & kLPI2C_TransferNoStopFlag))
|
|
{
|
|
/* Send a stop command to finalize the transfer. */
|
|
handle->base->MTDR = kStopCmd;
|
|
}
|
|
|
|
/* Invoke callback. */
|
|
if (handle->completionCallback)
|
|
{
|
|
handle->completionCallback(handle->base, handle, result, handle->userData);
|
|
}
|
|
}
|