169 lines
8.3 KiB
C
169 lines
8.3 KiB
C
/*
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* The Clear BSD License
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted (subject to the limitations in the disclaimer below) provided
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* that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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#include "clock_config.h"
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#include "fsl_gpio.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/* The board name */
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#define BOARD_NAME "MAPS-KS22"
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/* The UART to use for debug messages. */
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#define BOARD_DEBUG_UART_TYPE DEBUG_CONSOLE_DEVICE_TYPE_UART
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#define BOARD_DEBUG_UART_BASEADDR (uint32_t) UART1
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#define BOARD_DEBUG_UART_INSTANCE 1U
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#define BOARD_DEBUG_UART_CLKSRC kCLOCK_PllFllSelClk
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#define BOARD_DEBUG_UART_CLK_FREQ CLOCK_GetPllFllSelClkFreq()
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#define BOARD_UART_IRQ UART1_RX_TX_IRQn
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#define BOARD_UART_IRQ_HANDLER UART1_RX_TX_IRQHandler
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#ifndef BOARD_DEBUG_UART_BAUDRATE
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#define BOARD_DEBUG_UART_BAUDRATE 115200
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#endif /* BOARD_DEBUG_UART_BAUDRATE */
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/* Board led color mapping */
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#define LOGIC_LED_ON 0U
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#define LOGIC_LED_OFF 1U
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#define BOARD_LED_RED1_GPIO GPIOB
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#define BOARD_LED_RED1_GPIO_PORT PORTB
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#define BOARD_LED_RED1_GPIO_PIN 3U
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#define BOARD_LED_RED2_GPIO GPIOB
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#define BOARD_LED_RED2_GPIO_PORT PORTB
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#define BOARD_LED_RED2_GPIO_PIN 9U
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#define BOARD_LED_RED3_GPIO GPIOB
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#define BOARD_LED_RED3_GPIO_PORT PORTB
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#define BOARD_LED_RED3_GPIO_PIN 10U
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#ifndef BOARD_LED_GREEN_GPIO
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#define BOARD_LED_GREEN_GPIO GPIOB
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#endif
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#define BOARD_LED_GREEN_GPIO_PORT PORTB
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#ifndef BOARD_LED_GREEN_GPIO_PIN
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#define BOARD_LED_GREEN_GPIO_PIN 11U
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#endif
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#define LED_RED1_INIT(output) \
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GPIO_PinWrite(BOARD_LED_RED1_GPIO, BOARD_LED_RED1_GPIO_PIN, output); \
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BOARD_LED_RED1_GPIO->PDDR |= (1U << BOARD_LED_RED1_GPIO_PIN) /*!< Enable target LED_RED1 */
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#define LED_RED1_ON() \
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GPIO_PortClear(BOARD_LED_RED1_GPIO, 1U << BOARD_LED_RED1_GPIO_PIN) /*!< Turn on target LED_RED1 */
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#define LED_RED1_OFF() \
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GPIO_PortSet(BOARD_LED_RED1_GPIO, 1U << BOARD_LED_RED1_GPIO_PIN) /*!< Turn off target LED_RED1 */
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#define LED_RED1_TOGGLE() \
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GPIO_PortToggle(BOARD_LED_RED1_GPIO, 1U << BOARD_LED_RED1_GPIO_PIN) /*!< Toggle on target LED_RED1 */
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#define LED_RED2_INIT(output) \
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GPIO_PinWrite(BOARD_LED_RED2_GPIO, BOARD_LED_RED2_GPIO_PIN, output); \
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BOARD_LED_RED2_GPIO->PDDR |= (1U << BOARD_LED_RED2_GPIO_PIN) /*!< Enable target LED_RED2 */
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#define LED_RED2_ON() \
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GPIO_PortClear(BOARD_LED_RED2_GPIO, 1U << BOARD_LED_RED2_GPIO_PIN) /*!< Turn on target LED_RED2 */
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#define LED_RED2_OFF() \
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GPIO_PortSet(BOARD_LED_RED2_GPIO, 1U << BOARD_LED_RED2_GPIO_PIN) /*!< Turn off target LED_RED2 */
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#define LED_RED2_TOGGLE() \
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GPIO_PortToggle(BOARD_LED_RED2_GPIO, 1U << BOARD_LED_RED2_GPIO_PIN) /*!< Toggle on target LED_RED2 */
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#define LED_RED3_INIT(output) \
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GPIO_PinWrite(BOARD_LED_RED3_GPIO, BOARD_LED_RED3_GPIO_PIN, output); \
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BOARD_LED_RED3_GPIO->PDDR |= (1U << BOARD_LED_RED3_GPIO_PIN) /*!< Enable target LED_RED3 */
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#define LED_RED3_ON() \
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GPIO_PortClear(BOARD_LED_RED3_GPIO, 1U << BOARD_LED_RED3_GPIO_PIN) /*!< Turn on target LED_RED3 */
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#define LED_RED3_OFF() \
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GPIO_PortSet(BOARD_LED_RED3_GPIO, 1U << BOARD_LED_RED3_GPIO_PIN) /*!< Turn off target LED_RED3 */
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#define LED_RED3_TOGGLE() \
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GPIO_PortToggle(BOARD_LED_RED3_GPIO, 1U << BOARD_LED_RED3_GPIO_PIN) /*!< Toggle on target LED_RED3 */
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#define LED_GREEN_INIT(output) \
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GPIO_PinWrite(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PIN, output); \
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BOARD_LED_GREEN_GPIO->PDDR |= (1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Enable target LED_GREEN */
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#define LED_GREEN_ON() \
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GPIO_PortClear(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED_GREEN */
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#define LED_GREEN_OFF() \
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GPIO_PortSet(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED_GREEN */
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#define LED_GREEN_TOGGLE() \
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GPIO_PortToggle(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED_GREEN */
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/* @brief The SMARTCARD PHY configuration. */
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#define BOARD_SMARTCARD_MODULE (UART0) /*!< SMARTCARD communicational module instance */
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#define BOARD_SMARTCARD_MODULE_IRQ (UART0_RX_TX_IRQn) /*!< SMARTCARD communicational module IRQ handler */
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#define BOARD_SMARTCARD_MODULE_ERRIRQ (UART0_ERR_IRQn) /*!< SMARTCARD communicational module IRQ error handler */
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#define BOARD_SMARTCARD_CLOCK_MODULE (1u) /*!< SMARTCARD clock generation module instance (TPM1) */
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#define BOARD_SMARTCARD_CLOCK_MODULE_CHANNEL (1u) /*!< SMARTCARD clock generation module channel */
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#define BOARD_SMARTCARD_CLOCK_MODULE_SOURCE_CLK \
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(kCLOCK_PllFllSelClk) /*!< SMARTCARD clock module peripheral source clock */
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#define BOARD_SMARTCARD_CLOCK_MODULE_CLK_FREQ CLOCK_GetFreq(kCLOCK_PllFllSelClk)
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#define BOARD_SMARTCARD_CLOCK_VALUE \
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(4000000u) /*!< SMARTCARD clock frequency (4Mhz clock because of HSRUN freq is 72MHz ) */
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#define BOARD_SMARTCARD_CONTROL_PORT (2u) /*!< SMARTCARD control pin port instance number (PORTC) */
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#define BOARD_SMARTCARD_CONTROL_PIN (11u) /*!< SMARTCARD control pin number */
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#ifndef BOARD_SMARTCARD_RST_PORT
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#define BOARD_SMARTCARD_RST_PORT (2u) /*!< SMARTCARD reset pin port instance number (PORTC) */
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#endif
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#ifndef BOARD_SMARTCARD_RST_PIN
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#define BOARD_SMARTCARD_RST_PIN (10u) /*!< SMARTCARD reset pin number */
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#endif
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#define BOARD_SMARTCARD_TS_TIMER_ID \
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(0) /*!< SMARTCARD initial char detection timer instance number (PIT0 timer channel 0) */
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#define BOARD_SMARTCARD_TS_TIMER_IRQ (PIT0_IRQn) /*!< SMARTCARD initial char detection timer interrupt handler */
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#define BOARD_SMARTCARD_DATA_PORT (0u) /*!< SMARTCARD data pin port instance number (PORTA) */
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#define BOARD_SMARTCARD_DATA_PIN (2u) /*!< SMARTCARD data pin number */
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#define BOARD_SMARTCARD_DATA_PIN_MUX (2u) /*!< SMARTCARD data pin mux selection to operate UART0_TX (ATL2) */
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/* @brief The SDSPI disk PHY configuration. */
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#define BOARD_SDSPI_SPI_BASE (SPI0_BASE) /*!< SPI base address for SDSPI */
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#define BOARD_SDSPI_SPI_PCS_NUMBER (1U) /*!< SPI instance for SDSPI */
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#define BOARD_SDSPI_CD_GPIO_BASE (GPIOC) /*!< Port related to card detect pin for SDSPI */
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#ifndef BOARD_SDSPI_CD_PIN
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#define BOARD_SDSPI_CD_PIN (0U) /*!< Card detect pin for SDSPI */
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#endif
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#define BOARD_SDSPI_CD_LOGIC_RISING /*!< Logic of card detect pin for SDSPI */
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#if defined(__cplusplus)
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extern "C" {
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#endif /* __cplusplus */
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/*******************************************************************************
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* API
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******************************************************************************/
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void BOARD_InitDebugConsole(void);
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#if defined(__cplusplus)
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}
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#endif /* __cplusplus */
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#endif /* _BOARD_H_ */
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