/*
 * Copyright 2021 MindMotion Microelectronics Co., Ltd.
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#ifndef __BOARD_INIT_H__
#define __BOARD_INIT_H__

#include <stdio.h>

#include "hal_common.h"
#include "hal_gpio.h"
#include "hal_uart.h"
#include "hal_rcc.h"
#include "clock_init.h"
#include "pin_init.h"
#include "hal_dac.h"
#include "hal_syscfg.h"
#include "hal_exti.h"
#include "hal_mds_remap.h"
#include "hal_mds.h"

/* MDS */
#define BOARD_MDS_PORT MDS

/* the target and source from hal_mds_remap.h. */
/* connection target. */
#define TRIGGER_OUT MDS_TRIGGER_OUT_DAC2_EXT_TRIGGER     
#define TRIGGER_CLU_IN MDS_TRIGGER_IN_CLU0     /* select clu0 as the clu in. */
/* connection source. */
#define TRIGGER_IN_0 MDS_TRIGGER_IN_EXTI0   
#define TRIGGER_IN_1 MDS_TRIGGER_IN_EXTI15   
#define TRIGGER_IN_2 MDS_TRIGGER_IN_LOGIC_0   
#define TRIGGER_IN_3 MDS_TRIGGER_IN_LOGIC_0 	

/* the CLU 4 input invert, true means the source is taken invert as the input to the CLU, flase means not. */
#define CLU_IN_INVERT_MASK 0x00 /* no invert.*/
#define CLU_IN_TRIGGER_EDGE_MASK 0x101 /* the clu input choose the falling edge trigger. */

/* DEBUG UART. */
#define BOARD_DEBUG_UART_PORT        UART1
#define BOARD_DEBUG_UART_BAUDRATE    9600u
#define BOARD_DEBUG_UART_FREQ        CLOCK_APB2_FREQ

/* DAC .*/
#define BOARD_DAC_PORT               DAC
#define BOARD_DAC_CHANNEL            DAC_CHN_2

/*SYSCFG*/
#define BOARD_SYSCFG_EXTIPORT         SYSCFG_EXTIPort_GPIOB
#define BOARD_SYSCFG_EXTILINE0        SYSCFG_EXTILine_0
#define BOARD_SYSCFG_EXTILINE1        SYSCFG_EXTILine_15
/*EXTI*/
#define BOARD_EXTI_PORT               EXTI
#define BOARD_EXTI_LINE0              EXTI_LINE_0
#define BOARD_EXTI_LINE1              EXTI_LINE_15

void BOARD_Init(void);
void BOARD_WaitTrigger(void);
#endif /* __BOARD_INIT_H__ */

