426 lines
13 KiB
C
426 lines
13 KiB
C
/*
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* Copyright 2021 MindMotion Microelectronics Co., Ltd.
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "hal_i2c.h"
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/* Configure I2C speed to ordinary speed. */
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static bool I2C_CalcBandrate(I2C_Type * I2Cx, uint32_t clk, uint32_t bandrate)
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{
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/*
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* SCLH = (xSHR + 12) * I2C_CLK + tSYNC1;
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* SCLL = (xSLR + 1) * I2C_CLK + tSYNC2;
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* tSYNC1 & tSYNC2 equal 0 ~ 1 clk.
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*/
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if ( (clk / 24u) < bandrate ) /* the system clock cannot meet the baud rate requirement. */
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{
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return false;
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}
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else
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{
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uint32_t tmp = clk / bandrate;
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I2Cx->SSHR = tmp / 2u - 12u; /* Configure high level count in normal speed. */
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I2Cx->SSLR = tmp / 2u - 1u; /* Configure low level count in normal speed. */
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I2Cx->FSHR = tmp / 2u - 14u; /* Configure high level count in fast speed. */
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I2Cx->FSLR = tmp / 2u - 3u; /* Configure low level count in fast speed. */
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return true;
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}
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}
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/* Initialize I2C master mode, Initialization failure return false, Initialization success return true. */
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bool I2C_InitMaster(I2C_Type * I2Cx, I2C_Master_Init_Type * init)
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{
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I2Cx->ENR &= ~I2C_ENR_ENABLE_MASK; /* Disable I2C. */
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if ( !I2C_CalcBandrate(I2Cx, init->ClockFreqHz, init->BaudRate) ) /* The system clock cannot meet the baud rate requirement. */
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{
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return false;
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}
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I2Cx->CR = I2C_CR_SPEED(1u);
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/* Setup I2C. */
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I2Cx->CR &= ~I2C_CR_MASTER10_MASK; /* Address format. */
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I2Cx->CR |= I2C_CR_RESTART_MASK /* Generate restart signal. */
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| I2C_CR_DISSLAVE_MASK /* Disable slave module. */
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| I2C_CR_REPEN_MASK /* Enable sending restart condition. */
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| I2C_CR_EMPINT_MASK /* Control tx_empty interrupt generation. */
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| I2C_CR_MASTER_MASK; /* Enable master module. */
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I2Cx->IMR = 0u; /* Close all interrupts. */
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I2Cx->RXTLR = 0u; /* Configure the sending receive value. */
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I2Cx->TXTLR = 0u; /* Configure the sending threshold value. */
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return true; /* Initialize I2C succeeded, return true. */
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}
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/* Initialize I2C slave mode. */
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void I2C_InitSlave(I2C_Type * I2Cx, I2C_Slave_Init_Type * init)
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{
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I2Cx->ENR &= ~I2C_ENR_ENABLE_MASK; /* Disable I2C. */
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I2Cx->CR &= ~(I2C_CR_DISSLAVE_MASK | I2C_CR_MASTER_MASK | I2C_CR_SLAVE10_MASK);
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I2Cx->SAR = I2C_SAR_ADDR((uint8_t)init->SlaveAddr);
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I2Cx->CR |= I2C_CR_REPEN_MASK;
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I2Cx->IMR = 0u;
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}
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/* Enable I2C. */
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void I2C_Enable(I2C_Type * I2Cx, bool enable)
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{
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if (enable)
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{
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I2Cx->ENR |= I2C_ENR_ENABLE_MASK;
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}
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else
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{
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I2Cx->ENR &= ~I2C_ENR_ENABLE_MASK;
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}
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}
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/* Configuration the target device address. */
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void I2C_SetTargetAddr(I2C_Type * I2Cx, uint8_t addr)
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{
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I2Cx->TAR = I2C_TAR_ADDR(addr);
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}
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/* Get I2C target device address. */
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uint16_t I2C_GetTargetAddr(I2C_Type * I2Cx)
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{
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return (I2Cx->TAR & I2C_TAR_ADDR_MASK);
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}
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/* Put data to target device. */
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void I2C_PutData(I2C_Type * I2Cx, uint8_t val)
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{
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I2Cx->DR = I2C_DR_DAT(val);
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}
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/* Control read-write bit to prepare to read data. */
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void I2C_PrepareToGetData(I2C_Type * I2Cx)
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{
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I2Cx->DR = I2C_DR_CMD_MASK;
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}
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/* Get the data received by target device. */
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uint8_t I2C_GetData(I2C_Type * I2Cx)
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{
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return ( (uint8_t)I2Cx->DR );
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}
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/* Get the current status flags of the I2C module. */
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uint32_t I2C_GetStatus(I2C_Type * I2Cx)
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{
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return I2Cx->SR;
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}
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/* Prepare for the stop, when transfer finish. */
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void I2C_Stop(I2C_Type * I2Cx)
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{
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I2Cx->ENR |= I2C_ENR_ABORT_MASK; /* Prepare for the stop. */
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I2Cx->TXABRT; /* Read register to release tx fifo. */
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}
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/* Enable I2C interrupt. */
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void I2C_EnableInterrupts(I2C_Type * I2Cx, uint32_t interrupts, bool enable)
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{
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if (enable)
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{
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I2Cx->IMR |= interrupts;
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}
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else
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{
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I2Cx->IMR &= ~interrupts;
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}
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}
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/* Get the current enabled interrupts the I2C module. */
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uint32_t I2C_GetEnabledInterrupts(I2C_Type * I2Cx)
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{
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return I2Cx->IMR;
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}
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/* Get the I2C interrupt status flags of the I2C module. */
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uint32_t I2C_GetInterruptStatus(I2C_Type * I2Cx)
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{
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return (I2Cx->RAWISR & I2Cx->IMR); /* To ensure that the acquired interrupt is an enabled interrupt. */
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}
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/* Clear I2C interrupt status. */
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void I2C_ClearInterruptStatus(I2C_Type * I2Cx, uint32_t interrupts)
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{
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if ( (I2C_INT_RX_UNDER & interrupts) != 0u ) /* Clear receive buffer under status. */
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{
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I2Cx->RXUNDER;
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}
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if ( (I2C_INT_TX_ABORT & interrupts) != 0u ) /* Clear I2C transmit abort status. */
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{
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I2Cx->TXABRT;
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}
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if ( (I2C_INT_ACTIVE & interrupts) != 0u ) /* Clear I2C interface activation status. */
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{
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I2Cx->ACTIV;
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}
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if ( (I2C_INT_STOP & interrupts) != 0u ) /* Clear I2C stop condition detection status. */
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{
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I2Cx->STOP;
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}
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if ( (I2C_INT_START & interrupts) != 0u ) /* Clear I2C start condition detection status. */
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{
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I2Cx->START;
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}
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if ( (I2C_INT_READREQ & interrupts) != 0u)
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{
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I2Cx->RDREQ;
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}
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if ( (I2C_INT_RX_DONE & interrupts) != 0u)
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{
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I2Cx->RXDONE;
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}
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}
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/* Performs polling tx. */
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bool I2C_MasterWriteBlocking(I2C_Type * I2Cx, I2C_MasterXfer_Type * xfer)
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{
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/* Put register address. */
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I2C_PutData(I2Cx, xfer->TxBuf[0u]);
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uint32_t waittime1 = xfer->WaitTimes;
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/* Wait to tx fifo empty. */
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while ( (0u == (I2C_GetStatus(I2Cx) & I2C_STATUS_TX_EMPTY) ) && (0u != waittime1) )
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{
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waittime1--;
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}
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if (0u == waittime1) /* I2C write register address timeout. */
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{
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return false;
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}
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uint32_t waittime2 = xfer->WaitTimes;
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/* Write data to target device. */
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for (uint32_t i = 1u; i < xfer->TxLen; i++)
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{
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I2C_PutData(I2Cx, xfer->TxBuf[i]);
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while ( ( 0u == (I2C_GetStatus(I2Cx) & I2C_STATUS_TX_EMPTY) ) && (0u != waittime2) ) /* Wait to tx fifo empty. */
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{
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waittime2--;
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}
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if (0u == waittime2) /* I2C write timeout. */
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{
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return false;
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}
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}
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I2C_Stop(I2Cx); /* Prepare to stop send data. */
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uint32_t waittime3 = xfer->WaitTimes;
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/* Wait to I2C not active, which means stop is taking effect. */
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while ( (I2C_GetStatus(I2Cx) & I2C_STATUS_ACTIVE) && (0u != waittime3) )
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{
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waittime3--;
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}
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if (0u == waittime3) /* The wait operation is timeout. */
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{
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return false;
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}
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/* Clear fifo and flags. */
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I2Cx->ICR;
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I2Cx->TXABRT;
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return true;
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}
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/* Performs polling rx. */
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bool I2C_MasterReadBlocking(I2C_Type * I2Cx, I2C_MasterXfer_Type * xfer)
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{
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I2C_PutData(I2Cx, xfer->TxBuf[0u]); /* Put device register address. */
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uint32_t waittime1 = xfer->WaitTimes;
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while ( ( 0u == (I2C_GetStatus(I2Cx) & I2C_STATUS_TX_EMPTY) ) && (0u != waittime1) ) /* Wait to tx fifo empty. */
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{
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waittime1--;
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}
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if (0u == waittime1)
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{
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return false;
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}
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/* read data from target device. */
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for (uint32_t i = 0u; i < xfer->RxLen; i++)
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{
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I2C_PrepareToGetData(I2Cx); /* Swich read-write bit, prepare to get data. */
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while ( 0u == (I2C_GetStatus(I2Cx) & I2C_STATUS_RX_NOTEMPTY) ) /* Wait to rx fifo not empty. */
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{
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if ( 0u == (I2C_GetStatus(I2Cx) & I2C_STATUS_ACTIVE) ) /* Receive is active. */
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{
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return false;
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}
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}
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xfer->RxBuf[i] = I2C_GetData(I2Cx);
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}
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I2C_Stop(I2Cx); /* Prepare to stop I2C. */
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uint32_t waittime2 = xfer->WaitTimes;
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while ( (I2C_GetStatus(I2Cx) & I2C_STATUS_ACTIVE) && (0u != waittime2) ) /* Wait I2C not active, which means stop being effective. */
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{
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waittime2--;
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}
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if (0u == waittime2)
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{
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return false;
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}
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/* Clear fifo and flags. */
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I2Cx->ICR;
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I2Cx->TXABRT;
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return true;
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}
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/* I2C master interrupt transfer of the I2C module. */
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void I2C_MasterXfer(I2C_Type * I2Cx, I2C_MasterXfer_Type * xfer)
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{
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I2C_PutData(I2Cx, (uint8_t)xfer->TxBuf[0u]); /* Put target register address. */
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I2C_EnableInterrupts(I2Cx, I2C_INT_TX_EMPTY | I2C_INT_TX_ABORT | I2C_INT_STOP, true); /* Enable tx required interrupt. */
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xfer->TxIdx = 1u; /* One data has been sent. */
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xfer->RxIdx = 0u;
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xfer->TxLen--;
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}
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/* I2C master handler. */
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void I2C_MasterXferHandler(I2C_Type * I2Cx, I2C_MasterXfer_Type * xfer, uint32_t interrupts)
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{
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if ( 0u != (interrupts & I2C_INT_TX_ABORT) ) /* Early termination of program. */
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{
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I2C_EnableInterrupts(I2Cx, I2C_INT_TX_EMPTY | I2C_INT_TX_ABORT | I2C_INT_STOP, false); /* Clear the interrupt used for tx. */
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if (NULL != xfer->AbortCallback)
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{
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xfer->AbortCallback(xfer); /* Use abort call back. */
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}
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}
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else if ( 0u != (interrupts & I2C_INT_TX_EMPTY) ) /* Tx fifo is empty, can send data. */
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{
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if (I2C_Direction_Rx == xfer->Direction) /* The current operation is receive, the register address has been sent. */
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{
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I2C_EnableInterrupts(I2Cx, I2C_INT_TX_EMPTY | I2C_INT_TX_ABORT, false); /* Clear tx interrupt. */
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I2C_EnableInterrupts(I2Cx, I2C_INT_RX_NOTEMPTY, true); /* Enable receive required interrupt. */
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if (0u != xfer->RxLen) /* The data to be received is not 0. */
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{
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I2C_PrepareToGetData(I2Cx); /* Prepare to get data. */
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xfer->RxLen--;
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}
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else
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{
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I2C_Stop(I2Cx); /* No more transmition, prepare to stop. */
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}
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}
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else
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{
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if (0u == xfer->TxLen) /* Tx finish. */
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{
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I2C_EnableInterrupts(I2Cx, I2C_INT_TX_EMPTY | I2C_INT_TX_ABORT, false); /* Clear Tx interrupt. */
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I2C_Stop(I2Cx); /* Prepare to stop. */
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}
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else
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{
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xfer->TxLen--;
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I2C_PutData(I2Cx, xfer->TxBuf[xfer->TxIdx++]); /* Tx is not over, continue to put data. */
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}
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}
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}
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else if ( 0u != (interrupts & I2C_INT_RX_NOTEMPTY) ) /* Receive interrupt. */
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{
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if (0u == xfer->RxLen) /* Receive finish. */
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{
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xfer->RxBuf[xfer->RxIdx++] = I2C_GetData(I2Cx); /* Get last data from I2C bus. */
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I2C_EnableInterrupts(I2Cx, I2C_INT_RX_NOTEMPTY, false); /* Clear receive interrupt. */
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I2C_Stop(I2Cx); /* Prepare to stop. */
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}
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else
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{
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xfer->RxLen--; /* Current count length count -1. */
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xfer->RxBuf[xfer->RxIdx++] = I2C_GetData(I2Cx); /* Receive is not over, continue to get data. */
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I2C_PrepareToGetData(I2Cx); /* Prepare to get data. */
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}
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}
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else if ( 0u != (interrupts & I2C_INT_STOP) ) /* Xfer stop. */
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{
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I2C_EnableInterrupts(I2Cx, I2C_INT_STOP, false); /* Clear stop interrupt. */
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if ( (0u != xfer->TxLen) || (0u != xfer->RxLen) ) /* The transmission was not completed but terminated. */
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{
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if (NULL != xfer->AbortCallback)
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{
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xfer->AbortCallback(xfer); /* Early termination of program, abort callback. */
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I2Cx->ICR;
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I2Cx->TXABRT; /* Clear FIFO. */
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}
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}
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else
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{
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if (NULL != xfer->DoneCallback)
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{
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xfer->DoneCallback(xfer); /* Transmission finish and stop, xfer done callback. */
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I2Cx->ICR;
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I2Cx->TXABRT; /* Clear FIFO. */
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}
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}
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}
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}
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/* I2C slave module put data. */
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void I2C_SlaveWriteData(I2C_Type * I2Cx, I2C_SlaveXfer_Type * xfer)
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{
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if ( 0u != (I2Cx->RAWISR & I2C_INT_READREQ) )
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{
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I2C_ClearInterruptStatus(I2Cx, I2C_INT_TX_ABORT | I2C_INT_READREQ);
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I2C_PutData(I2Cx, xfer->XferBuf[xfer->TxIdx++]);
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}
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if (xfer->TxIdx == xfer->BufLen)
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{
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xfer->TxIdx = 0u;
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}
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}
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/* I2C slave module get data. */
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void I2C_SlaveReadData(I2C_Type * I2Cx, I2C_SlaveXfer_Type * xfer)
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{
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if ( 0u != (I2C_GetStatus(I2Cx) & I2C_STATUS_RX_NOTEMPTY) )
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{
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xfer->XferBuf[xfer->RxIdx++] = I2C_GetData(I2Cx);
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}
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if (xfer->RxIdx == xfer->BufLen)
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{
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xfer->RxIdx = 0u;
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}
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}
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/* I2C slave handler. */
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void I2C_SlaveXferHandler(I2C_Type * I2Cx, I2C_SlaveXfer_Type * xfer, uint32_t interrupts)
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{
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if ( 0u != (interrupts & I2C_INT_RX_NOTEMPTY) )
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{
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xfer->XferBuf[xfer->RxIdx++] = I2C_GetData(I2Cx);
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}
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if ( 0u != (interrupts & I2C_INT_READREQ) )
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{
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I2C_ClearInterruptStatus(I2Cx, I2C_INT_TX_ABORT | I2C_INT_READREQ);
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I2C_PutData(I2Cx, xfer->XferBuf[xfer->TxIdx++]);
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}
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if (xfer->TxIdx == xfer->BufLen)
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{
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xfer->TxIdx = 0u;
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}
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if (xfer->RxIdx == xfer->BufLen)
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{
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xfer->RxIdx = 0u;
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}
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}
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/* EOF. */
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