My modifications to make life easier.
This commit is contained in:
parent
319223f8c4
commit
ffc162ba74
GPG Key ID:
885EC2B5A8A6F8A7
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@ -88,7 +88,7 @@ void USART_Printf_Init(uint32_t baudrate)
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GPIO_InitTypeDef GPIO_InitStructure;
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USART_InitTypeDef USART_InitStructure;
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#if(DEBUG == DEBUG_UART1)
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#if(DEBUG_UART == DEBUG_UART1)
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
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@ -96,7 +96,7 @@ void USART_Printf_Init(uint32_t baudrate)
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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#elif(DEBUG == DEBUG_UART2)
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#elif(DEBUG_UART == DEBUG_UART2)
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
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@ -105,7 +105,7 @@ void USART_Printf_Init(uint32_t baudrate)
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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#elif(DEBUG == DEBUG_UART3)
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#elif(DEBUG_UART == DEBUG_UART3)
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
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@ -123,15 +123,15 @@ void USART_Printf_Init(uint32_t baudrate)
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USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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USART_InitStructure.USART_Mode = USART_Mode_Tx;
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#if(DEBUG == DEBUG_UART1)
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#if(DEBUG_UART == DEBUG_UART1)
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USART_Init(USART1, &USART_InitStructure);
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USART_Cmd(USART1, ENABLE);
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#elif(DEBUG == DEBUG_UART2)
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#elif(DEBUG_UART == DEBUG_UART2)
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USART_Init(USART2, &USART_InitStructure);
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USART_Cmd(USART2, ENABLE);
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#elif(DEBUG == DEBUG_UART3)
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#elif(DEBUG_UART == DEBUG_UART3)
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USART_Init(USART3, &USART_InitStructure);
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USART_Cmd(USART3, ENABLE);
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@ -154,15 +154,15 @@ __attribute__((used)) int _write(int fd, char *buf, int size)
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for(i = 0; i < size; i++)
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{
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#if(DEBUG == DEBUG_UART1)
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while(USART_GetFlagStatus(USART1, USART_FLAG_TC) == RESET);
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USART_SendData(USART1, *buf++);
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#elif(DEBUG == DEBUG_UART2)
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while(USART_GetFlagStatus(USART2, USART_FLAG_TC) == RESET);
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USART_SendData(USART2, *buf++);
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#elif(DEBUG == DEBUG_UART3)
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while(USART_GetFlagStatus(USART3, USART_FLAG_TC) == RESET);
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USART_SendData(USART3, *buf++);
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#if(DEBUG_UART == DEBUG_UART1)
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while(USART_GetFlagStatus(USART1, USART_FLAG_TXE) == RESET);
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USART_SendData(USART1, buf[i]);
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#elif(DEBUG_UART == DEBUG_UART2)
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while(USART_GetFlagStatus(USART2, USART_FLAG_TXE) == RESET);
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USART_SendData(USART2, buf[i]);
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#elif(DEBUG_UART == DEBUG_UART3)
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while(USART_GetFlagStatus(USART3, USART_FLAG_TXE) == RESET);
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USART_SendData(USART3, buf[i]);
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#endif
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}
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@ -11,7 +11,7 @@
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#ifndef __DEBUG_H
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#define __DEBUG_H
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#include "stdio.h"
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#include <stdio.h>
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#include "ch32v30x.h"
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/* UART Printf Definition */
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@ -19,8 +19,8 @@
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#define DEBUG_UART2 2
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#define DEBUG_UART3 3
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/* DEBUG UATR Definition */
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#define DEBUG DEBUG_UART1
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/* DEBUG UART Definition */
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#define DEBUG_UART DEBUG_UART1
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//#define DEBUG DEBUG_UART2
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//#define DEBUG DEBUG_UART3
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178
Ld/Link.ld
178
Ld/Link.ld
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@ -1 +1,177 @@
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ENTRY( _start )
__stack_size = 2048;
PROVIDE( _stack_size = __stack_size );
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 288K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
}
SECTIONS
{
.init :
{
_sinit = .;
. = ALIGN(4);
KEEP(*(SORT_NONE(.init)))
. = ALIGN(4);
_einit = .;
} >FLASH AT>FLASH
.vector :
{
*(.vector);
. = ALIGN(64);
} >FLASH AT>FLASH
.text :
{
. = ALIGN(4);
*(.text)
*(.text.*)
*(.rodata)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
*(.gnu.linkonce.t.*)
. = ALIGN(4);
} >FLASH AT>FLASH
.fini :
{
KEEP(*(SORT_NONE(.fini)))
. = ALIGN(4);
} >FLASH AT>FLASH
PROVIDE( _etext = . );
PROVIDE( _eitcm = . );
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH AT>FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH AT>FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH AT>FLASH
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*crtbegin?.o(.ctors))
/* We don't want to include the .ctor section from
the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >FLASH AT>FLASH
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*crtbegin?.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >FLASH AT>FLASH
.dalign :
{
. = ALIGN(4);
PROVIDE(_data_vma = .);
} >RAM AT>FLASH
.dlalign :
{
. = ALIGN(4);
PROVIDE(_data_lma = .);
} >FLASH AT>FLASH
.data :
{
*(.gnu.linkonce.r.*)
*(.data .data.*)
*(.gnu.linkonce.d.*)
. = ALIGN(8);
PROVIDE( __global_pointer$ = . + 0x800 );
*(.sdata .sdata.*)
*(.sdata2.*)
*(.gnu.linkonce.s.*)
. = ALIGN(8);
*(.srodata.cst16)
*(.srodata.cst8)
*(.srodata.cst4)
*(.srodata.cst2)
*(.srodata .srodata.*)
. = ALIGN(4);
PROVIDE( _edata = .);
} >RAM AT>FLASH
.bss :
{
. = ALIGN(4);
PROVIDE( _sbss = .);
*(.sbss*)
*(.gnu.linkonce.sb.*)
*(.bss*)
*(.gnu.linkonce.b.*)
*(COMMON*)
. = ALIGN(4);
PROVIDE( _ebss = .);
} >RAM AT>FLASH
PROVIDE( _end = _ebss);
PROVIDE( end = . );
.stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
{
PROVIDE( _heap_end = . );
. = ALIGN(4);
PROVIDE(_susrstack = . );
. = . + __stack_size;
PROVIDE( _eusrstack = .);
} >RAM
}
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ENTRY( _start )
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/* Configure heap and stack space reserved for application.
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* Too low may cause standard library failed,
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* too high may cause SRAM overflow.
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* Collision may occur with heap when stack gets too deep.
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*/
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__stack_size = 2048;
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__heap_size = 2048;
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 288K
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
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}
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SECTIONS
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{
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.init :
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{
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_sinit = .;
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. = ALIGN(4);
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KEEP(*(SORT_NONE(.init)))
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. = ALIGN(4);
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_einit = .;
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} >FLASH
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.vector :
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{
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*(.vector);
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. = ALIGN(64);
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} >FLASH
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.text :
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{
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. = ALIGN(4);
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*(.text)
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*(.text.*)
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*(.rodata)
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*(.rodata*)
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*(.glue_7)
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*(.glue_7t)
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*(.gnu.linkonce.t.*)
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. = ALIGN(4);
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} >FLASH
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.fini :
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{
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KEEP(*(SORT_NONE(.fini)))
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. = ALIGN(4);
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} >FLASH
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PROVIDE( _etext = . );
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PROVIDE( _eitcm = . );
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.preinit_array :
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{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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} >FLASH
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.init_array :
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{
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
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KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
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PROVIDE_HIDDEN (__init_array_end = .);
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} >FLASH
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.fini_array :
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{
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
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KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} >FLASH
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.ctors :
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{
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/* gcc uses crtbegin.o to find the start of
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the constructors, so we make sure it is
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first. Because this is a wildcard, it
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doesn't matter if the user does not
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actually link against crtbegin.o; the
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linker won't look for a file to match a
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wildcard. The wildcard also means that it
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doesn't matter which directory crtbegin.o
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is in.
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*/
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KEEP (*crtbegin.o(.ctors))
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KEEP (*crtbegin?.o(.ctors))
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/* We don't want to include the .ctor section from
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the crtend.o file until after the sorted ctors.
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The .ctor section from the crtend file contains the
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end of ctors marker and it must be last
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*/
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KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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} >FLASH
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.dtors :
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{
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KEEP (*crtbegin.o(.dtors))
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KEEP (*crtbegin?.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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} >FLASH
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.dalign :
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{
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. = ALIGN(4);
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PROVIDE(_data_vma = .);
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} >RAM AT>FLASH
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.dlalign :
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{
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. = ALIGN(4);
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PROVIDE(_data_lma = .);
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} >FLASH AT>FLASH
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.data :
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{
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*(.gnu.linkonce.r.*)
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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. = ALIGN(8);
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PROVIDE( __global_pointer$ = . + 0x800 );
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*(.sdata .sdata.*)
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*(.sdata2.*)
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*(.gnu.linkonce.s.*)
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. = ALIGN(8);
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*(.srodata.cst16)
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*(.srodata.cst8)
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*(.srodata.cst4)
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*(.srodata.cst2)
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*(.srodata .srodata.*)
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. = ALIGN(4);
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PROVIDE( _edata = .);
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} >RAM AT>FLASH
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.bss :
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{
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. = ALIGN(4);
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PROVIDE( _sbss = .);
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*(.sbss*)
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*(.gnu.linkonce.sb.*)
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*(.bss*)
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*(.gnu.linkonce.b.*)
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*(COMMON*)
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. = ALIGN(4);
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PROVIDE(_ebss = .);
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} >RAM
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.heap_stack :
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{
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. = ALIGN(8);
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PROVIDE(_end = .);
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PROVIDE(end = . );
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. = . + __heap_size;
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. = ALIGN(8);
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PROVIDE(_heap_end = .);
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. = . + __stack_size;
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. = ALIGN(8);
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} >RAM
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/* Place initial SP to the end of SRAM */
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__stack_top = ORIGIN(RAM) + LENGTH(RAM);
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PROVIDE(_eusrstack = __stack_top);
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}
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@ -947,11 +947,11 @@ Wake-UpFrame Filter Re7 : Filter3 CRC16 - Filter2 CRC16 */
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#define ETH_MACA3HR_MACA3H ((unsigned int)0x0000FFFF) /* MAC address3 high */
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#define ETH_MACA3LR_MACA3L ((unsigned int)0xFFFFFFFF) /* MAC address3 low */
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/******************************************************************************/
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/*
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/* ETH MMC Register
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/*
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/******************************************************************************/
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/******************************************************************************
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*
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* ETH MMC Register
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*
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******************************************************************************/
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#define ETH_MMCCR_MCFHP ((unsigned int)0x00000020) /* MMC counter Full-Half preset */
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#define ETH_MMCCR_MCP ((unsigned int)0x00000010) /* MMC counter preset */
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#define ETH_MMCCR_MCF ((unsigned int)0x00000008) /* MMC Counter Freeze */
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@ -988,11 +988,11 @@ Wake-UpFrame Filter Re7 : Filter3 CRC16 - Filter2 CRC16 */
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#define ETH_MMCRGUFCR_RGUFC ((unsigned int)0xFFFFFFFF) /* Number of good unicast frames received. */
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/******************************************************************************/
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/*
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/* ETH Precise Clock Protocol Register
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/*
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/******************************************************************************/
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/******************************************************************************
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*
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* ETH Precise Clock Protocol Register
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*
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******************************************************************************/
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#define ETH_PTPTSCR_TSCNT ((unsigned int)0x00030000) /* Time stamp clock node type */
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#define ETH_PTPTSSR_TSSMRME ((unsigned int)0x00008000) /* Time stamp snapshot for message relevant to master enable */
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#define ETH_PTPTSSR_TSSEME ((unsigned int)0x00004000) /* Time stamp snapshot for event message enable */
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@ -1031,11 +1031,11 @@ Wake-UpFrame Filter Re7 : Filter3 CRC16 - Filter2 CRC16 */
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#define ETH_PTPTSSR_TSTTR ((unsigned int)0x00000020) /* Time stamp target time reached */
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#define ETH_PTPTSSR_TSSO ((unsigned int)0x00000010) /* Time stamp seconds overflow */
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/******************************************************************************/
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/*
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/* ETH DMA Register
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/*
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/******************************************************************************/
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/******************************************************************************
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*
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* ETH DMA Register
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*
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******************************************************************************/
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#define ETH_DMABMR_AAB ((unsigned int)0x02000000) /* Address-Aligned beats */
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#define ETH_DMABMR_FPM ((unsigned int)0x01000000) /* 4xPBL mode */
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#define ETH_DMABMR_USP ((unsigned int)0x00800000) /* Use separate PBL */
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@ -1285,7 +1285,7 @@ FlagStatus ETH_GetSoftwareResetStatus(void)
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{
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bitstatus = RESET;
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}
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printf("ETH->DMABMR is:%08x\n", ETH->DMABMR);
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printf("ETH->DMABMR is:%08lx\n", ETH->DMABMR);
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return bitstatus;
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}
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@ -1432,7 +1432,7 @@ ITStatus ETH_GetDMAITStatus(uint32_t ETH_DMA_IT)
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/*********************************************************************
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* @fn ETH_DMAClearITPendingBit
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*
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* @brief Clears the ETHERNET’s DMA IT pending bit.
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* @brief Clears the ETHERNET<EFBFBD>s DMA IT pending bit.
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*
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* @param ETH_DMA_IT - specifies the interrupt pending bit to clear.
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* ETH_DMA_IT_NIS - Normal interrupt summary
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@ -4,8 +4,8 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : CH32V303 vector table for eclipse toolchain.
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* SPDX-License-Identifier: Apache-2.0
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* SPDX-License-Identifier: Apache-2.0
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*******************************************************************************/
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.section .init,"ax",@progbits
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@ -348,7 +348,11 @@ handle_reset:
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csrw 0xbc0, t0
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/* Enable nested and hardware stack */
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li t0, 0x1f
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/* li t0, 0x1f */ /* For MRS proprietary GCC compilers */
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|
||||
/* Enable nested interrupt, disable hardware stack */
|
||||
li t0, 0x1e /* Refer to RISC-V4 PFIC manual */
|
||||
|
||||
csrw 0x804, t0
|
||||
|
||||
/* Enable floating point and interrupt */
|
||||
|
|
|
|||
|
|
@ -4,8 +4,8 @@
|
|||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V307-CH32V305 vector table for eclipse toolchain.
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*******************************************************************************/
|
||||
|
||||
.section .init,"ax",@progbits
|
||||
|
|
@ -368,7 +368,11 @@ handle_reset:
|
|||
csrw 0xbc0, t0
|
||||
|
||||
/* Enable nested and hardware stack */
|
||||
li t0, 0x1f
|
||||
/* li t0, 0x1f */ /* For MRS proprietary GCC compilers */
|
||||
|
||||
/* Enable nested interrupt, disable hardware stack */
|
||||
li t0, 0x1e /* Refer to RISC-V4 PFIC manual */
|
||||
|
||||
csrw 0x804, t0
|
||||
|
||||
/* Enable floating point and interrupt */
|
||||
|
|
|
|||
Loading…
Reference in New Issue