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LPCXpresso55S69_MRuby_Aux
generated from Embedded_Projects/LPCXpresso55S69_Template
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Initial commit. 

Signed-off-by: Yilin Sun <imi415@imi.moe>
This commit is contained in:
Yilin Sun 2023-03-10 09:43:53 +08:00
parent cfad119fe4
commit ed1593c4bc
Signed by: imi415
GPG Key ID: 17F01E106F9F5E0A
17 changed files with 444 additions and 1630 deletions
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12
.clang-format Normal file
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@ -0,0 +1,12 @@
BasedOnStyle: Google
IndentWidth: 4
AlignConsecutiveMacros: Consecutive
AlignConsecutiveDeclarations: Consecutive
AlignConsecutiveAssignments: Consecutive
AllowShortFunctionsOnASingleLine: None
BreakBeforeBraces: Custom
BraceWrapping:
AfterEnum: false
AfterStruct: false
SplitEmptyFunction: false
ColumnLimit: 120

3
.gitmodules vendored
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@ -1,3 +1,6 @@
[submodule "SDK"]
path = SDK
url = https://git.minori.work/Embedded_SDK/MCUXpresso_LPC55S69.git
[submodule "lib/littlefs/lfs"]
path = lib/littlefs/lfs
url = https://github.com/littlefs-project/littlefs.git

11
CMakeLists.txt
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@ -1,13 +1,13 @@
cmake_minimum_required(VERSION 3.10)
project(lpcxpresso_55s69_template)
project(lpc55s69_mruby_aux)
enable_language(CXX)
enable_language(ASM)
# Different linker scripts
set(TARGET_LDSCRIPT_FLASH "${CMAKE_SOURCE_DIR}/SDK/devices/LPC55S69/gcc/LPC55S69_cm33_core0_flash.ld")
set(TARGET_LDSCRIPT_RAM "${CMAKE_SOURCE_DIR}/SDK/devices/LPC55S69/gcc/LPC55S69_cm33_core0_ram.ld")
set(TARGET_LDSCRIPT_FLASH "${CMAKE_SOURCE_DIR}/SDK/devices/LPC55S69/gcc/LPC55S69_cm33_core1_flash.ld")
set(TARGET_LDSCRIPT_RAM "${CMAKE_SOURCE_DIR}/SDK/devices/LPC55S69/gcc/LPC55S69_cm33_core1_ram.ld")
set(TARGET_SOURCES
"SDK/components/serial_manager/fsl_component_serial_manager.c"
@ -60,6 +60,7 @@ set(TARGET_SOURCES
"board/clock_config.c"
"board/peripherals.c"
"board/pin_mux.c"
"src/app_lspi_flash.c"
"src/main.c"
)
@ -67,6 +68,7 @@ set(TARGET_C_DEFINES
"CPU_LPC55S69JBD100_cm33_core0"
"FFR_INCLUDE=\"fsl_iap_ffr.h\""
"MCUXPRESSO_SDK"
"SDK_SECONDARY_CORE"
"SERIAL_PORT_TYPE_UART=1"
"__STARTUP_CLEAR_BSS"
)
@ -85,6 +87,7 @@ set(TARGET_C_INCLUDES
# Shared libraries linked with application
set(TARGET_LIBS
"littlefs"
"c"
"m"
"nosys"
@ -113,6 +116,8 @@ set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -fno-common -fno-builtin -f
set(CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS} -x assembler-with-cpp")
set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--gc-sections")
add_subdirectory(lib/littlefs)
# Shared sources, includes and definitions
add_compile_definitions(${TARGET_C_DEFINES})
include_directories(${TARGET_C_INCLUDES})

486
LPCXpresso55S69.mex
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@ -6,7 +6,7 @@
<board>LPCXpresso55S69</board>
<board_revision>A2</board_revision>
<mcu_data>ksdk2_0</mcu_data>
<cores selected="cm33_core0">
<cores selected="cm33_core1">
<core name="Cortex-M33 (Core #0)" id="cm33_core0" description=""/>
<core name="Cortex-M33 (Core #1)" id="cm33_core1" description=""/>
</cores>
@ -20,316 +20,23 @@
<generate_registers_defines>false</generate_registers_defines>
</preferences>
<tools>
<pins name="Pins" version="12.0" enabled="true" update_project_code="true">
<pins name="Pins" version="13.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/pin_mux.c" update_enabled="true"/>
<file path="board/pin_mux.h" update_enabled="true"/>
</generated_project_files>
<pins_profile>
<processor_version>12.0.0</processor_version>
<processor_version>13.0.1</processor_version>
<pin_labels>
<pin_label pin_num="31" pin_signal="PIO1_5/FC0_RXD_SDA_MOSI_DATA/SD0_D2/CTIMER2_MAT0/SCT_GPI0" label="P17[17]/P24[1]/PIO1_5_GPIO_ARD" identifier="F_WP"/>
<pin_label pin_num="24" pin_signal="PIO1_8/FC0_CTS_SDA_SSEL0/SD0_CLK/SCT0_OUT1/FC4_SSEL2/ADC0_4" label="P17[19]/PIO1_8_GPIO_ARD" identifier="F_HOLD"/>
</pin_labels>
</pins_profile>
<functions_list>
<function name="BOARD_InitDEBUG_UARTPins">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>true</callFromInitBoot>
<coreID>cm33_core0</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="FLEXCOMM0" description="Peripheral FLEXCOMM0 is not initialized" problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="FLEXCOMM0" signal="RXD_SDA_MOSI_DATA" pin_num="92" pin_signal="PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29">
<pin_features>
<pin_feature name="mode" value="inactive"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
<pin peripheral="FLEXCOMM0" signal="TXD_SCL_MISO_WS" pin_num="94" pin_signal="PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30">
<pin_features>
<pin_feature name="mode" value="inactive"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
</pins>
</function>
<function name="BOARD_InitSWD_DEBUGPins">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>false</callFromInitBoot>
<coreID>cm33_core0</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="SWD" description="Peripheral SWD is not initialized" problem_level="1" source="Pins:BOARD_InitSWD_DEBUGPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitSWD_DEBUGPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitSWD_DEBUGPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="SWD" signal="SWCLK" pin_num="13" pin_signal="PIO0_11/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT2/FREQME_GPIO_CLK_A/SWCLK/SECURE_GPIO0_11/ADC0_9">
<pin_features>
<pin_feature name="mode" value="pullDown"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
<pin_feature name="asw" value="enabled"/>
</pin_features>
</pin>
<pin peripheral="SWD" signal="SWDIO" pin_num="12" pin_signal="PIO0_12/FC3_TXD_SCL_MISO_WS/SD1_BACKEND_PWR/FREQME_GPIO_CLK_B/SCT_GPI7/SD0_POW_EN/SWDIO/FC6_TXD_SCL_MISO_WS/SECURE_GPIO0_12/ADC0_10">
<pin_features>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
<pin_feature name="asw" value="enabled"/>
</pin_features>
</pin>
<pin peripheral="SWD" signal="SWO" pin_num="21" pin_signal="PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1">
<pin_features>
<pin_feature name="identifier" value="DEBUG_SWD_SWO"/>
<pin_feature name="mode" value="inactive"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
<pin_feature name="asw" value="disabled"/>
</pin_features>
</pin>
</pins>
</function>
<function name="BOARD_InitUSBPins">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>false</callFromInitBoot>
<coreID>cm33_core0</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="USBFSH" description="Peripheral USBFSH is not initialized" problem_level="1" source="Pins:BOARD_InitUSBPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="Peripheral" resourceId="USBHSH" description="Peripheral USBHSH is not initialized" problem_level="1" source="Pins:BOARD_InitUSBPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSBPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSBPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="USBFSH" signal="USB_DP" pin_num="97" pin_signal="USB0_DP"/>
<pin peripheral="USBFSH" signal="USB_DM" pin_num="98" pin_signal="USB0_DM"/>
<pin peripheral="USBFSH" signal="USB_VBUS" pin_num="78" pin_signal="PIO0_22/FC6_TXD_SCL_MISO_WS/UTICK_CAP1/CT_INP15/SCT0_OUT3/USB0_VBUS/SD1_D0/PLU_OUT7/SECURE_GPIO0_22">
<pin_features>
<pin_feature name="mode" value="inactive"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
<pin peripheral="USBHSH" signal="USB_DM" pin_num="35" pin_signal="USB1_DM"/>
<pin peripheral="USBHSH" signal="USB_DP" pin_num="34" pin_signal="USB1_DP"/>
<pin peripheral="USBHSH" signal="USB_VBUS" pin_num="36" pin_signal="USB1_VBUS"/>
<pin peripheral="USBHSH" signal="USB_OVERCURRENTN" pin_num="65" pin_signal="PIO1_30/FC7_TXD_SCL_MISO_WS/SD0_D7/SCT_GPI7/USB1_OVERCURRENTN/USB1_LEDN/PLU_IN1">
<pin_features>
<pin_feature name="mode" value="pullUp"/>
</pin_features>
</pin>
<pin peripheral="USBFSH" signal="USB_OVERCURRENTN" pin_num="66" pin_signal="PIO0_28/FC0_SCK/SD1_CMD/CT_INP11/SCT0_OUT7/USB0_OVERCURRENTN/PLU_OUT1/SECURE_GPIO0_28">
<pin_features>
<pin_feature name="mode" value="pullUp"/>
</pin_features>
</pin>
<pin peripheral="USBFSH" signal="USB_PORTPWRN" pin_num="67" pin_signal="PIO1_12/FC6_SCK/CTIMER1_MAT1/USB0_PORTPWRN/HS_SPI_SSEL2">
<pin_features>
<pin_feature name="mode" value="pullUp"/>
</pin_features>
</pin>
<pin peripheral="USBHSH" signal="USB_PORTPWRN" pin_num="80" pin_signal="PIO1_29/FC7_RXD_SDA_MOSI_DATA/SD0_D6/SCT_GPI6/USB1_PORTPWRN/USB1_FRAME/PLU_IN2">
<pin_features>
<pin_feature name="mode" value="pullUp"/>
</pin_features>
</pin>
</pins>
</function>
<function name="BOARD_InitLEDsPins">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>false</callFromInitBoot>
<coreID>cm33_core0</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDsPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDsPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDsPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="GPIO" signal="PIO1, 4" pin_num="1" pin_signal="PIO1_4/FC0_SCK/SD0_D0/CTIMER2_MAT1/SCT0_OUT0/FREQME_GPIO_CLK_A">
<pin_features>
<pin_feature name="direction" value="OUTPUT"/>
<pin_feature name="gpio_init_state" value="true"/>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
<pin peripheral="GPIO" signal="PIO1, 6" pin_num="5" pin_signal="PIO1_6/FC0_TXD_SCL_MISO_WS/SD0_D3/CTIMER2_MAT1/SCT_GPI3">
<pin_features>
<pin_feature name="direction" value="OUTPUT"/>
<pin_feature name="gpio_init_state" value="true"/>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
<pin peripheral="GPIO" signal="PIO1, 7" pin_num="9" pin_signal="PIO1_7/FC0_RTS_SCL_SSEL1/SD0_D1/CTIMER2_MAT2/SCT_GPI4">
<pin_features>
<pin_feature name="direction" value="OUTPUT"/>
<pin_feature name="gpio_init_state" value="true"/>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
</pins>
</function>
<function name="BOARD_InitBUTTONsPins">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>false</callFromInitBoot>
<coreID>cm33_core0</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="SYSCON" description="Peripheral SYSCON is not initialized" problem_level="1" source="Pins:BOARD_InitBUTTONsPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONsPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONsPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONsPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="GPIO" signal="PIO0, 5" pin_num="88" pin_signal="PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5">
<pin_features>
<pin_feature name="direction" value="INPUT"/>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
<pin peripheral="GPIO" signal="PIO1, 18" pin_num="64" pin_signal="PIO1_18/SD1_POW_EN/SCT0_OUT5/PLU_OUT0">
<pin_features>
<pin_feature name="direction" value="INPUT"/>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
<pin peripheral="GPIO" signal="PIO1, 9" pin_num="10" pin_signal="PIO1_9/FC1_SCK/CT_INP4/SCT0_OUT2/FC4_CTS_SDA_SSEL0/ADC0_12">
<pin_features>
<pin_feature name="direction" value="INPUT"/>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
<pin_feature name="asw" value="enabled"/>
</pin_features>
</pin>
<pin peripheral="SYSCON" signal="RESET" pin_num="32" pin_signal="RESETN"/>
</pins>
</function>
<function name="BOARD_InitPins_Core0">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>true</callFromInitBoot>
<coreID>cm33_core0</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins_Core0">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins/>
</function>
<function name="BOARD_InitPins_Core1">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>false</callFromInitBoot>
<callFromInitBoot>true</callFromInitBoot>
<coreID>cm33_core1</coreID>
<enableClock>true</enableClock>
</options>
@ -342,189 +49,58 @@
</dependencies>
<pins/>
</function>
<function name="BOARD_InitI2SPins">
<function name="BOARD_InitSPIFPins">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>false</callFromInitBoot>
<coreID>cm33_core0</coreID>
<callFromInitBoot>true</callFromInitBoot>
<coreID>cm33_core1</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="FLEXCOMM4" description="Peripheral FLEXCOMM4 is not initialized" problem_level="1" source="Pins:BOARD_InitI2SPins">
<dependency resourceType="Peripheral" resourceId="FLEXCOMM8" description="Peripheral FLEXCOMM8 is not initialized" problem_level="1" source="Pins:BOARD_InitSPIFPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="Peripheral" resourceId="SYSCON" description="Peripheral SYSCON is not initialized" problem_level="1" source="Pins:BOARD_InitI2SPins">
<feature name="initialized" evaluation="equal">
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitSPIFPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core1">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="Peripheral" resourceId="FLEXCOMM7" description="Peripheral FLEXCOMM7 is not initialized" problem_level="1" source="Pins:BOARD_InitI2SPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="Peripheral" resourceId="FLEXCOMM6" description="Peripheral FLEXCOMM6 is not initialized" problem_level="1" source="Pins:BOARD_InitI2SPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitI2SPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitI2SPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitSPIFPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core1">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="FLEXCOMM4" signal="TXD_SCL_MISO_WS" pin_num="4" pin_signal="PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2">
<pin peripheral="FLEXCOMM8" signal="HS_SPI_MOSI" pin_num="60" pin_signal="PIO0_26/FC2_RXD_SDA_MOSI_DATA/CLKOUT/CT_INP14/SCT0_OUT5/USB0_IDVALUE/FC0_SCK/HS_SPI_MOSI/SECURE_GPIO0_26"/>
<pin peripheral="FLEXCOMM8" signal="HS_SPI_MISO" pin_num="62" pin_signal="PIO1_3/SCT0_OUT4/HS_SPI_MISO/USB0_PORTPWRN/PLU_OUT6"/>
<pin peripheral="FLEXCOMM8" signal="HS_SPI_SCK" pin_num="61" pin_signal="PIO1_2/CTIMER0_MAT3/SCT_GPI6/HS_SPI_SCK/USB1_PORTPWRN/PLU_OUT5"/>
<pin peripheral="FLEXCOMM8" signal="HS_SPI_SSEL1" pin_num="59" pin_signal="PIO1_1/FC3_RXD_SDA_MOSI_DATA/CT_INP3/SCT_GPI5/HS_SPI_SSEL1/USB1_OVERCURRENTN/PLU_OUT4"/>
<pin peripheral="GPIO" signal="PIO1, 5" pin_num="31" pin_signal="PIO1_5/FC0_RXD_SDA_MOSI_DATA/SD0_D2/CTIMER2_MAT0/SCT_GPI0">
<pin_features>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
<pin_feature name="direction" value="OUTPUT"/>
<pin_feature name="gpio_init_state" value="true"/>
</pin_features>
</pin>
<pin peripheral="FLEXCOMM4" signal="RXD_SDA_MOSI_DATA" pin_num="30" pin_signal="PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3">
<pin peripheral="GPIO" signal="PIO1, 8" pin_num="24" pin_signal="PIO1_8/FC0_CTS_SDA_SSEL0/SD0_CLK/SCT0_OUT1/FC4_SSEL2/ADC0_4">
<pin_features>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
<pin peripheral="SYSCON" signal="MCLK" pin_num="91" pin_signal="PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0">
<pin_features>
<pin_feature name="mode" value="inactive"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
<pin peripheral="FLEXCOMM7" signal="SCK" pin_num="76" pin_signal="PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21">
<pin_features>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
<pin peripheral="FLEXCOMM7" signal="RXD_SDA_MOSI_DATA" pin_num="74" pin_signal="PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS">
<pin_features>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
<pin peripheral="FLEXCOMM7" signal="TXD_SCL_MISO_WS" pin_num="90" pin_signal="PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19">
<pin_features>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
<pin peripheral="FLEXCOMM6" signal="SCK" pin_num="21" pin_signal="PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1">
<pin_features>
<pin_feature name="identifier" value="FC6_I2S_CLK"/>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
<pin_feature name="asw" value="enabled"/>
</pin_features>
</pin>
<pin peripheral="FLEXCOMM6" signal="RXD_SDA_MOSI_DATA" pin_num="2" pin_signal="PIO1_13/FC6_RXD_SDA_MOSI_DATA/CT_INP6/USB0_OVERCURRENTN/USB0_FRAME/SD0_CARD_DET_N">
<pin_features>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
<pin peripheral="FLEXCOMM6" signal="TXD_SCL_MISO_WS" pin_num="87" pin_signal="PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD">
<pin_features>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
</pins>
</function>
<function name="BOARD_InitACCELPins">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>false</callFromInitBoot>
<coreID>cm33_core0</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="FLEXCOMM4" description="Peripheral FLEXCOMM4 is not initialized" problem_level="1" source="Pins:BOARD_InitACCELPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitACCELPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitACCELPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitACCELPins">
<feature name="enabled" evaluation="equal" configuration="cm33_core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="FLEXCOMM4" signal="RXD_SDA_MOSI_DATA" pin_num="30" pin_signal="PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3">
<pin_features>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
<pin peripheral="FLEXCOMM4" signal="TXD_SCL_MISO_WS" pin_num="4" pin_signal="PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2">
<pin_features>
<pin_feature name="mode" value="pullUp"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
</pin_features>
</pin>
<pin peripheral="GPIO" signal="PIO1, 19" pin_num="58" pin_signal="PIO1_19/SCT0_OUT7/CTIMER3_MAT1/SCT_GPI7/FC4_SCK/PLU_OUT1/ACMPVREF">
<pin_features>
<pin_feature name="direction" value="INPUT"/>
<pin_feature name="mode" value="inactive"/>
<pin_feature name="slew_rate" value="standard"/>
<pin_feature name="invert" value="disabled"/>
<pin_feature name="open_drain" value="disabled"/>
<pin_feature name="asw" value="disabled"/>
<pin_feature name="direction" value="OUTPUT"/>
<pin_feature name="gpio_init_state" value="true"/>
</pin_features>
</pin>
</pins>
</function>
</functions_list>
</pins>
<clocks name="Clocks" version="10.0" enabled="true" update_project_code="true">
<clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/clock_config.c" update_enabled="true"/>
<file path="board/clock_config.h" update_enabled="true"/>
</generated_project_files>
<clocks_profile>
<processor_version>12.0.0</processor_version>
<processor_version>13.0.1</processor_version>
</clocks_profile>
<clock_configurations>
<clock_configuration name="BOARD_BootClockFRO12M" id_prefix="" prefix_user_defined="false">
@ -771,13 +347,13 @@
</dcdx_profile>
<dcdx_configurations/>
</dcdx>
<periphs name="Peripherals" version="11.0" enabled="true" update_project_code="true">
<periphs name="Peripherals" version="12.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/peripherals.c" update_enabled="true"/>
<file path="board/peripherals.h" update_enabled="true"/>
</generated_project_files>
<peripherals_profile>
<processor_version>12.0.0</processor_version>
<processor_version>13.0.1</processor_version>
</peripherals_profile>
<functional_groups>
<functional_group name="BOARD_InitPeripherals_cm33_core0" uuid="61d0725d-b300-49cb-9c66-b5edfbf8ffc1" called_from_default_init="true" id_prefix="" core="cm33_core0">
@ -789,7 +365,7 @@
<config_set name="fsl_i2c" quick_selection="QS_I2C_Master">
<setting name="i2c_mode" value="kI2C_Master"/>
<setting name="clockSource" value="FXCOMFunctionClock"/>
<setting name="clockSourceFreq" value="BOARD_BootClockPLL150M"/>
<setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
<struct name="i2c_master_config">
<setting name="enableMaster" value="true"/>
<setting name="baudRate_Bps" value="100000"/>

1
SDK Submodule

@ -0,0 +1 @@
Subproject commit 3969019d6a43b0b76c8227cbd5b9640047c41c0d

4
arm-none-eabi.cmake
View File

@ -9,8 +9,8 @@ set(CMAKE_CXX_COMPILER arm-none-eabi-g++)
# Optionally set size binary name, for elf section size reporting.
set(TARGET_TOOLCHAIN_SIZE arm-none-eabi-size)
set(CMAKE_C_FLAGS_INIT "-mcpu=cortex-m33 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16")
set(CMAKE_CXX_FLAGS_INIT "-mcpu=cortex-m33 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16")
set(CMAKE_C_FLAGS_INIT "-mcpu=cortex-m33 -mthumb -mfloat-abi=soft")
set(CMAKE_CXX_FLAGS_INIT "-mcpu=cortex-m33 -mthumb -mfloat-abi=soft")
set(CMAKE_EXE_LINKER_FLAGS_INIT "-specs=nano.specs -specs=nosys.specs -Wl,--print-memory-usage -Wl,--no-warn-rwx-segments")
# Make CMake happy about those compilers

4
board/clock_config.c
View File

@ -17,11 +17,11 @@
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Clocks v10.0
product: Clocks v11.0
processor: LPC55S69
package_id: LPC55S69JBD100
mcu_data: ksdk2_0
processor_version: 12.0.0
processor_version: 13.0.1
board: LPCXpresso55S69
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */

144
board/clock_config.h
View File

@ -41,6 +41,42 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKFRO12M_ASYNCADC_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_CLKOUT_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_CTIMER0_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_CTIMER1_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_CTIMER2_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_CTIMER3_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_CTIMER4_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOM0_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOM1_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOM2_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOM3_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOM4_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOM5_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOM6_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_FXCOM7_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_HSLSPI_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_MCLK_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_OSC32KHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_OSTIMER32KHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_PLUCLKIN_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_PLU_GLITCH_12MHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_PLU_GLITCH_1MHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_RTC1HZ_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_RTC1KHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_SCT_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_SDIO_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_SYSTICK0_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_SYSTICK1_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_SYSTEM_CLOCK 12000000UL
#define BOARD_BOOTCLOCKFRO12M_TRACE_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_USB0_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_USB1_PHY_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_UTICK_CLOCK 0UL
#define BOARD_BOOTCLOCKFRO12M_WDT_CLOCK 0UL
/*******************************************************************************
* API for BOARD_BootClockFRO12M configuration
******************************************************************************/
@ -67,6 +103,42 @@ void BOARD_BootClockFRO12M(void);
#define BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK 96000000U /*!< Core clock frequency: 96000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKFROHF96M_ASYNCADC_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_CLKOUT_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_CTIMER0_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_CTIMER1_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_CTIMER2_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_CTIMER3_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_CTIMER4_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOM0_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOM1_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOM2_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOM3_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOM4_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOM5_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOM6_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_FXCOM7_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_HSLSPI_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_MCLK_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_OSC32KHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_OSTIMER32KHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_PLUCLKIN_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_PLU_GLITCH_12MHZ_CLOCK0UL
#define BOARD_BOOTCLOCKFROHF96M_PLU_GLITCH_1MHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_RTC1HZ_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_RTC1KHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_SCT_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_SDIO_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_SYSTICK0_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_SYSTICK1_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_SYSTEM_CLOCK 96000000UL
#define BOARD_BOOTCLOCKFROHF96M_TRACE_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_USB0_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_USB1_PHY_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_UTICK_CLOCK 0UL
#define BOARD_BOOTCLOCKFROHF96M_WDT_CLOCK 0UL
/*******************************************************************************
* API for BOARD_BootClockFROHF96M configuration
******************************************************************************/
@ -93,6 +165,42 @@ void BOARD_BootClockFROHF96M(void);
#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK 100000000U /*!< Core clock frequency: 100000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKPLL100M_ASYNCADC_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_CLKOUT_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_CTIMER0_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_CTIMER1_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_CTIMER2_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_CTIMER3_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_CTIMER4_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_FXCOM0_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_FXCOM1_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_FXCOM2_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_FXCOM3_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_FXCOM4_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_FXCOM5_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_FXCOM6_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_FXCOM7_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_HSLSPI_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_MCLK_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_OSC32KHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_OSTIMER32KHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_PLUCLKIN_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_PLU_GLITCH_12MHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_PLU_GLITCH_1MHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_RTC1HZ_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_RTC1KHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_SCT_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_SDIO_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_SYSTICK0_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_SYSTICK1_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_SYSTEM_CLOCK 100000000UL
#define BOARD_BOOTCLOCKPLL100M_TRACE_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_USB0_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_USB1_PHY_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_UTICK_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL100M_WDT_CLOCK 0UL
/*******************************************************************************
* API for BOARD_BootClockPLL100M configuration
******************************************************************************/
@ -119,6 +227,42 @@ void BOARD_BootClockPLL100M(void);
#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK 150000000U /*!< Core clock frequency: 150000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKPLL150M_ASYNCADC_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_CLKOUT_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_CTIMER0_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_CTIMER1_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_CTIMER2_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_CTIMER3_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_CTIMER4_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOM0_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOM1_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOM2_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOM3_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOM4_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOM5_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOM6_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_FXCOM7_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_HSLSPI_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_MCLK_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_OSC32KHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_OSTIMER32KHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_PLUCLKIN_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_PLU_GLITCH_12MHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_PLU_GLITCH_1MHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_RTC1HZ_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_RTC1KHZ_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_SCT_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_SDIO_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_SYSTICK0_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_SYSTICK1_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_SYSTEM_CLOCK 150000000UL
#define BOARD_BOOTCLOCKPLL150M_TRACE_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_USB0_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_USB1_PHY_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_UTICK_CLOCK 0UL
#define BOARD_BOOTCLOCKPLL150M_WDT_CLOCK 0UL
/*******************************************************************************
* API for BOARD_BootClockPLL150M configuration
******************************************************************************/

17
board/peripherals.c
View File

@ -6,11 +6,11 @@
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Peripherals v11.0
product: Peripherals v12.0
processor: LPC55S69
package_id: LPC55S69JBD100
mcu_data: ksdk2_0
processor_version: 12.0.0
processor_version: 13.0.1
board: LPCXpresso55S69
functionalGroups:
- name: BOARD_InitPeripherals_cm33_core0
@ -54,20 +54,20 @@ component:
#include "peripherals.h"
/***********************************************************************************************************************
* BOARD_InitPeripherals_cm33_core0 functional group
* BOARD_InitPeripherals_cm33_core1 functional group
**********************************************************************************************************************/
/***********************************************************************************************************************
* NVIC initialization code
* NVIC_2 initialization code
**********************************************************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
instance:
- name: 'NVIC'
- name: 'NVIC_2'
- type: 'nvic'
- mode: 'general'
- custom_name_enabled: 'false'
- type_id: 'nvic_57b5eef3774cc60acaede6f5b8bddc67'
- functional_group: 'BOARD_InitPeripherals_cm33_core0'
- functional_group: 'BOARD_InitPeripherals_cm33_core1'
- peripheral: 'NVIC'
- config_sets:
- nvic:
@ -77,13 +77,13 @@ instance:
/* clang-format on */
/* Empty initialization function (commented out)
static void NVIC_init(void) {
static void NVIC_2_init(void) {
} */
/***********************************************************************************************************************
* Initialization functions
**********************************************************************************************************************/
void BOARD_InitPeripherals_cm33_core0(void)
void BOARD_InitPeripherals_cm33_core1(void)
{
/* Initialize components */
}
@ -93,5 +93,4 @@ void BOARD_InitPeripherals_cm33_core0(void)
**********************************************************************************************************************/
void BOARD_InitBootPeripherals(void)
{
BOARD_InitPeripherals_cm33_core0();
}

2
board/peripherals.h
View File

@ -19,7 +19,7 @@ extern "C" {
* Initialization functions
**********************************************************************************************************************/
void BOARD_InitPeripherals_cm33_core0(void);
void BOARD_InitPeripherals_cm33_core1(void);
/***********************************************************************************************************************
* BOARD_InitBootPeripherals function

885
board/pin_mux.c
View File

@ -7,19 +7,21 @@
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Pins v12.0
product: Pins v13.0
processor: LPC55S69
package_id: LPC55S69JBD100
mcu_data: ksdk2_0
processor_version: 12.0.0
processor_version: 13.0.1
board: LPCXpresso55S69
pin_labels:
- {pin_num: '31', pin_signal: PIO1_5/FC0_RXD_SDA_MOSI_DATA/SD0_D2/CTIMER2_MAT0/SCT_GPI0, label: 'P17[17]/P24[1]/PIO1_5_GPIO_ARD', identifier: F_WP}
- {pin_num: '24', pin_signal: PIO1_8/FC0_CTS_SDA_SSEL0/SD0_CLK/SCT0_OUT1/FC4_SSEL2/ADC0_4, label: 'P17[19]/PIO1_8_GPIO_ARD', identifier: F_HOLD}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
#include "fsl_common.h"
#include "fsl_gpio.h"
#include "fsl_iocon.h"
#include "pin_mux.h"
/* FUNCTION ************************************************************************************************************
@ -30,542 +32,15 @@ board: LPCXpresso55S69
* END ****************************************************************************************************************/
void BOARD_InitBootPins(void)
{
BOARD_InitDEBUG_UARTPins();
BOARD_InitPins_Core0();
BOARD_InitPins_Core1();
BOARD_InitSPIFPins();
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitDEBUG_UARTPins:
- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
- pin_list:
- {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
- {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
slew_rate: standard, invert: disabled, open_drain: disabled}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitDEBUG_UARTPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M33 (Core #0) */
void BOARD_InitDEBUG_UARTPins(void)
{
/* Enables the clock for the I/O controller.: Enable Clock. */
CLOCK_EnableClock(kCLOCK_Iocon);
const uint32_t DEBUG_UART_RX = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
IOCON_PIO_FUNC1 |
/* No addition pin function */
IOCON_PIO_MODE_INACT |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
IOCON_PinMuxSet(IOCON, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN, DEBUG_UART_RX);
const uint32_t DEBUG_UART_TX = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
IOCON_PIO_FUNC1 |
/* No addition pin function */
IOCON_PIO_MODE_INACT |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
IOCON_PinMuxSet(IOCON, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN, DEBUG_UART_TX);
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitSWD_DEBUGPins:
- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
- pin_list:
- {pin_num: '13', peripheral: SWD, signal: SWCLK, pin_signal: PIO0_11/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT2/FREQME_GPIO_CLK_A/SWCLK/SECURE_GPIO0_11/ADC0_9, mode: pullDown,
slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
- {pin_num: '12', peripheral: SWD, signal: SWDIO, pin_signal: PIO0_12/FC3_TXD_SCL_MISO_WS/SD1_BACKEND_PWR/FREQME_GPIO_CLK_B/SCT_GPI7/SD0_POW_EN/SWDIO/FC6_TXD_SCL_MISO_WS/SECURE_GPIO0_12/ADC0_10,
mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
- {pin_num: '21', peripheral: SWD, signal: SWO, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1, identifier: DEBUG_SWD_SWO,
mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled, asw: disabled}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitSWD_DEBUGPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M33 (Core #0) */
void BOARD_InitSWD_DEBUGPins(void)
{
/* Enables the clock for the I/O controller.: Enable Clock. */
CLOCK_EnableClock(kCLOCK_Iocon);
const uint32_t DEBUG_SWD_SWO = (/* Pin is configured as SWO */
IOCON_PIO_FUNC6 |
/* No addition pin function */
IOCON_PIO_MODE_INACT |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI |
/* Analog switch is open (disabled) */
IOCON_PIO_ASW_DI);
/* PORT0 PIN10 (coords: 21) is configured as SWO */
IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN, DEBUG_SWD_SWO);
if (Chip_GetVersion()==1)
{
const uint32_t DEBUG_SWD_SWDCLK = (/* Pin is configured as SWCLK */
IOCON_PIO_FUNC6 |
/* Selects pull-down function */
IOCON_PIO_MODE_PULLDOWN |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI |
/* Analog switch is closed (enabled) */
IOCON_PIO_ASW_EN);
/* PORT0 PIN11 (coords: 13) is configured as SWCLK */
IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN, DEBUG_SWD_SWDCLK);
}
else
{
const uint32_t DEBUG_SWD_SWDCLK = (/* Pin is configured as SWCLK */
IOCON_PIO_FUNC6 |
/* Selects pull-down function */
IOCON_PIO_MODE_PULLDOWN |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI |
/* Analog switch is closed (enabled), only for A0 version */
IOCON_PIO_ASW_DIS_EN);
/* PORT0 PIN11 (coords: 13) is configured as SWCLK */
IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN, DEBUG_SWD_SWDCLK);
}
if (Chip_GetVersion()==1)
{
const uint32_t DEBUG_SWD_SWDIO = (/* Pin is configured as SWDIO */
IOCON_PIO_FUNC6 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI |
/* Analog switch is closed (enabled) */
IOCON_PIO_ASW_EN);
/* PORT0 PIN12 (coords: 12) is configured as SWDIO */
IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN, DEBUG_SWD_SWDIO);
}
else
{
const uint32_t DEBUG_SWD_SWDIO = (/* Pin is configured as SWDIO */
IOCON_PIO_FUNC6 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI |
/* Analog switch is closed (enabled), only for A0 version */
IOCON_PIO_ASW_DIS_EN);
/* PORT0 PIN12 (coords: 12) is configured as SWDIO */
IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN, DEBUG_SWD_SWDIO);
}
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitUSBPins:
- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
- pin_list:
- {pin_num: '97', peripheral: USBFSH, signal: USB_DP, pin_signal: USB0_DP}
- {pin_num: '98', peripheral: USBFSH, signal: USB_DM, pin_signal: USB0_DM}
- {pin_num: '78', peripheral: USBFSH, signal: USB_VBUS, pin_signal: PIO0_22/FC6_TXD_SCL_MISO_WS/UTICK_CAP1/CT_INP15/SCT0_OUT3/USB0_VBUS/SD1_D0/PLU_OUT7/SECURE_GPIO0_22,
mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
- {pin_num: '35', peripheral: USBHSH, signal: USB_DM, pin_signal: USB1_DM}
- {pin_num: '34', peripheral: USBHSH, signal: USB_DP, pin_signal: USB1_DP}
- {pin_num: '36', peripheral: USBHSH, signal: USB_VBUS, pin_signal: USB1_VBUS}
- {pin_num: '65', peripheral: USBHSH, signal: USB_OVERCURRENTN, pin_signal: PIO1_30/FC7_TXD_SCL_MISO_WS/SD0_D7/SCT_GPI7/USB1_OVERCURRENTN/USB1_LEDN/PLU_IN1, mode: pullUp}
- {pin_num: '66', peripheral: USBFSH, signal: USB_OVERCURRENTN, pin_signal: PIO0_28/FC0_SCK/SD1_CMD/CT_INP11/SCT0_OUT7/USB0_OVERCURRENTN/PLU_OUT1/SECURE_GPIO0_28,
mode: pullUp}
- {pin_num: '67', peripheral: USBFSH, signal: USB_PORTPWRN, pin_signal: PIO1_12/FC6_SCK/CTIMER1_MAT1/USB0_PORTPWRN/HS_SPI_SSEL2, mode: pullUp}
- {pin_num: '80', peripheral: USBHSH, signal: USB_PORTPWRN, pin_signal: PIO1_29/FC7_RXD_SDA_MOSI_DATA/SD0_D6/SCT_GPI6/USB1_PORTPWRN/USB1_FRAME/PLU_IN2, mode: pullUp}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitUSBPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M33 (Core #0) */
void BOARD_InitUSBPins(void)
{
/* Enables the clock for the I/O controller.: Enable Clock. */
CLOCK_EnableClock(kCLOCK_Iocon);
const uint32_t USB0_VBUS = (/* Pin is configured as USB0_VBUS */
IOCON_PIO_FUNC7 |
/* No addition pin function */
IOCON_PIO_MODE_INACT |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT0 PIN22 (coords: 78) is configured as USB0_VBUS */
IOCON_PinMuxSet(IOCON, BOARD_INITUSBPINS_USB0_VBUS_PORT, BOARD_INITUSBPINS_USB0_VBUS_PIN, USB0_VBUS);
IOCON->PIO[0][28] = ((IOCON->PIO[0][28] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT028 (pin 66) is configured as USB0_OVERCURRENTN. */
| IOCON_PIO_FUNC(PIO0_28_FUNC_ALT7)
/* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Pull-up.
* Pull-up resistor enabled. */
| IOCON_PIO_MODE(PIO0_28_MODE_PULL_UP)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO0_28_DIGIMODE_DIGITAL));
IOCON->PIO[1][12] = ((IOCON->PIO[1][12] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT112 (pin 67) is configured as USB0_PORTPWRN. */
| IOCON_PIO_FUNC(PIO1_12_FUNC_ALT4)
/* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Pull-up.
* Pull-up resistor enabled. */
| IOCON_PIO_MODE(PIO1_12_MODE_PULL_UP)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO1_12_DIGIMODE_DIGITAL));
IOCON->PIO[1][29] = ((IOCON->PIO[1][29] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT129 (pin 80) is configured as USB1_PORTPWRN. */
| IOCON_PIO_FUNC(PIO1_29_FUNC_ALT4)
/* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Pull-up.
* Pull-up resistor enabled. */
| IOCON_PIO_MODE(PIO1_29_MODE_PULL_UP)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO1_29_DIGIMODE_DIGITAL));
IOCON->PIO[1][30] = ((IOCON->PIO[1][30] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT130 (pin 65) is configured as USB1_OVERCURRENTN. */
| IOCON_PIO_FUNC(PIO1_30_FUNC_ALT4)
/* Selects function mode (on-chip pull-up/pull-down resistor control).
* : Pull-up.
* Pull-up resistor enabled. */
| IOCON_PIO_MODE(PIO1_30_MODE_PULL_UP)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO1_30_DIGIMODE_DIGITAL));
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitLEDsPins:
- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
- pin_list:
- {pin_num: '1', peripheral: GPIO, signal: 'PIO1, 4', pin_signal: PIO1_4/FC0_SCK/SD0_D0/CTIMER2_MAT1/SCT0_OUT0/FREQME_GPIO_CLK_A, direction: OUTPUT, gpio_init_state: 'true',
mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
- {pin_num: '5', peripheral: GPIO, signal: 'PIO1, 6', pin_signal: PIO1_6/FC0_TXD_SCL_MISO_WS/SD0_D3/CTIMER2_MAT1/SCT_GPI3, direction: OUTPUT, gpio_init_state: 'true',
mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
- {pin_num: '9', peripheral: GPIO, signal: 'PIO1, 7', pin_signal: PIO1_7/FC0_RTS_SCL_SSEL1/SD0_D1/CTIMER2_MAT2/SCT_GPI4, direction: OUTPUT, gpio_init_state: 'true',
mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitLEDsPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M33 (Core #0) */
void BOARD_InitLEDsPins(void)
{
/* Enables the clock for the I/O controller.: Enable Clock. */
CLOCK_EnableClock(kCLOCK_Iocon);
/* Enables the clock for the GPIO1 module */
CLOCK_EnableClock(kCLOCK_Gpio1);
gpio_pin_config_t LED_BLUE_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 1U
};
/* Initialize GPIO functionality on pin PIO1_4 (pin 1) */
GPIO_PinInit(BOARD_INITLEDSPINS_LED_BLUE_GPIO, BOARD_INITLEDSPINS_LED_BLUE_PORT, BOARD_INITLEDSPINS_LED_BLUE_PIN, &LED_BLUE_config);
gpio_pin_config_t LED_RED_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 1U
};
/* Initialize GPIO functionality on pin PIO1_6 (pin 5) */
GPIO_PinInit(BOARD_INITLEDSPINS_LED_RED_GPIO, BOARD_INITLEDSPINS_LED_RED_PORT, BOARD_INITLEDSPINS_LED_RED_PIN, &LED_RED_config);
gpio_pin_config_t LED_GREEN_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 1U
};
/* Initialize GPIO functionality on pin PIO1_7 (pin 9) */
GPIO_PinInit(BOARD_INITLEDSPINS_LED_GREEN_GPIO, BOARD_INITLEDSPINS_LED_GREEN_PORT, BOARD_INITLEDSPINS_LED_GREEN_PIN, &LED_GREEN_config);
const uint32_t LED_BLUE = (/* Pin is configured as PIO1_4 */
IOCON_PIO_FUNC0 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT1 PIN4 (coords: 1) is configured as PIO1_4 */
IOCON_PinMuxSet(IOCON, BOARD_INITLEDSPINS_LED_BLUE_PORT, BOARD_INITLEDSPINS_LED_BLUE_PIN, LED_BLUE);
const uint32_t LED_RED = (/* Pin is configured as PIO1_6 */
IOCON_PIO_FUNC0 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT1 PIN6 (coords: 5) is configured as PIO1_6 */
IOCON_PinMuxSet(IOCON, BOARD_INITLEDSPINS_LED_RED_PORT, BOARD_INITLEDSPINS_LED_RED_PIN, LED_RED);
const uint32_t LED_GREEN = (/* Pin is configured as PIO1_7 */
IOCON_PIO_FUNC0 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT1 PIN7 (coords: 9) is configured as PIO1_7 */
IOCON_PinMuxSet(IOCON, BOARD_INITLEDSPINS_LED_GREEN_PORT, BOARD_INITLEDSPINS_LED_GREEN_PIN, LED_GREEN);
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitBUTTONsPins:
- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
- pin_list:
- {pin_num: '88', peripheral: GPIO, signal: 'PIO0, 5', pin_signal: PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5, direction: INPUT,
mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
- {pin_num: '64', peripheral: GPIO, signal: 'PIO1, 18', pin_signal: PIO1_18/SD1_POW_EN/SCT0_OUT5/PLU_OUT0, direction: INPUT, mode: pullUp, slew_rate: standard,
invert: disabled, open_drain: disabled}
- {pin_num: '10', peripheral: GPIO, signal: 'PIO1, 9', pin_signal: PIO1_9/FC1_SCK/CT_INP4/SCT0_OUT2/FC4_CTS_SDA_SSEL0/ADC0_12, direction: INPUT, mode: pullUp, slew_rate: standard,
invert: disabled, open_drain: disabled, asw: enabled}
- {pin_num: '32', peripheral: SYSCON, signal: RESET, pin_signal: RESETN}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitBUTTONsPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M33 (Core #0) */
void BOARD_InitBUTTONsPins(void)
{
/* Enables the clock for the I/O controller.: Enable Clock. */
CLOCK_EnableClock(kCLOCK_Iocon);
/* Enables the clock for the GPIO0 module */
CLOCK_EnableClock(kCLOCK_Gpio0);
/* Enables the clock for the GPIO1 module */
CLOCK_EnableClock(kCLOCK_Gpio1);
gpio_pin_config_t S1_config = {
.pinDirection = kGPIO_DigitalInput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO0_5 (pin 88) */
GPIO_PinInit(BOARD_INITBUTTONSPINS_S1_GPIO, BOARD_INITBUTTONSPINS_S1_PORT, BOARD_INITBUTTONSPINS_S1_PIN, &S1_config);
gpio_pin_config_t S3_config = {
.pinDirection = kGPIO_DigitalInput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO1_9 (pin 10) */
GPIO_PinInit(BOARD_INITBUTTONSPINS_S3_GPIO, BOARD_INITBUTTONSPINS_S3_PORT, BOARD_INITBUTTONSPINS_S3_PIN, &S3_config);
gpio_pin_config_t S2_config = {
.pinDirection = kGPIO_DigitalInput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO1_18 (pin 64) */
GPIO_PinInit(BOARD_INITBUTTONSPINS_S2_GPIO, BOARD_INITBUTTONSPINS_S2_PORT, BOARD_INITBUTTONSPINS_S2_PIN, &S2_config);
const uint32_t S1 = (/* Pin is configured as PIO0_5 */
IOCON_PIO_FUNC0 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT0 PIN5 (coords: 88) is configured as PIO0_5 */
IOCON_PinMuxSet(IOCON, BOARD_INITBUTTONSPINS_S1_PORT, BOARD_INITBUTTONSPINS_S1_PIN, S1);
const uint32_t S2 = (/* Pin is configured as PIO1_18 */
IOCON_PIO_FUNC0 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT1 PIN18 (coords: 64) is configured as PIO1_18 */
IOCON_PinMuxSet(IOCON, BOARD_INITBUTTONSPINS_S2_PORT, BOARD_INITBUTTONSPINS_S2_PIN, S2);
if (Chip_GetVersion()==1)
{
const uint32_t S3 = (/* Pin is configured as PIO1_9 */
IOCON_PIO_FUNC0 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI |
/* Analog switch is closed (enabled) */
IOCON_PIO_ASW_EN);
/* PORT1 PIN9 (coords: 10) is configured as PIO1_9 */
IOCON_PinMuxSet(IOCON, BOARD_INITBUTTONSPINS_S3_PORT, BOARD_INITBUTTONSPINS_S3_PIN, S3);
}
else
{
const uint32_t S3 = (/* Pin is configured as PIO1_9 */
IOCON_PIO_FUNC0 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI |
/* Analog switch is closed (enabled), only for A0 version */
IOCON_PIO_ASW_DIS_EN);
/* PORT1 PIN9 (coords: 10) is configured as PIO1_9 */
IOCON_PinMuxSet(IOCON, BOARD_INITBUTTONSPINS_S3_PORT, BOARD_INITBUTTONSPINS_S3_PIN, S3);
}
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitPins_Core0:
- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
BOARD_InitPins_Core1:
- options: {callFromInitBoot: 'true', coreID: cm33_core1, enableClock: 'true'}
- pin_list: []
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
@ -573,217 +48,39 @@ BOARD_InitPins_Core0:
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitPins_Core0
* Function Name : BOARD_InitPins_Core1
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M33 (Core #0) */
void BOARD_InitPins_Core0(void)
/* Function assigned for the Cortex-M33 (Core #1) */
void BOARD_InitPins_Core1(void)
{
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitI2SPins:
- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
BOARD_InitSPIFPins:
- options: {callFromInitBoot: 'true', coreID: cm33_core1, enableClock: 'true'}
- pin_list:
- {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
invert: disabled, open_drain: disabled}
- {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
slew_rate: standard, invert: disabled, open_drain: disabled}
- {pin_num: '91', peripheral: SYSCON, signal: MCLK, pin_signal: PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0, mode: inactive, slew_rate: standard, invert: disabled,
open_drain: disabled}
- {pin_num: '76', peripheral: FLEXCOMM7, signal: SCK, pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21,
mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
- {pin_num: '74', peripheral: FLEXCOMM7, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
- {pin_num: '90', peripheral: FLEXCOMM7, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
- {pin_num: '21', peripheral: FLEXCOMM6, signal: SCK, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1,
identifier: FC6_I2S_CLK, mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
- {pin_num: '2', peripheral: FLEXCOMM6, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_13/FC6_RXD_SDA_MOSI_DATA/CT_INP6/USB0_OVERCURRENTN/USB0_FRAME/SD0_CARD_DET_N,
mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
- {pin_num: '87', peripheral: FLEXCOMM6, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD, mode: pullUp, slew_rate: standard,
invert: disabled, open_drain: disabled}
- {pin_num: '60', peripheral: FLEXCOMM8, signal: HS_SPI_MOSI, pin_signal: PIO0_26/FC2_RXD_SDA_MOSI_DATA/CLKOUT/CT_INP14/SCT0_OUT5/USB0_IDVALUE/FC0_SCK/HS_SPI_MOSI/SECURE_GPIO0_26}
- {pin_num: '62', peripheral: FLEXCOMM8, signal: HS_SPI_MISO, pin_signal: PIO1_3/SCT0_OUT4/HS_SPI_MISO/USB0_PORTPWRN/PLU_OUT6}
- {pin_num: '61', peripheral: FLEXCOMM8, signal: HS_SPI_SCK, pin_signal: PIO1_2/CTIMER0_MAT3/SCT_GPI6/HS_SPI_SCK/USB1_PORTPWRN/PLU_OUT5}
- {pin_num: '59', peripheral: FLEXCOMM8, signal: HS_SPI_SSEL1, pin_signal: PIO1_1/FC3_RXD_SDA_MOSI_DATA/CT_INP3/SCT_GPI5/HS_SPI_SSEL1/USB1_OVERCURRENTN/PLU_OUT4}
- {pin_num: '31', peripheral: GPIO, signal: 'PIO1, 5', pin_signal: PIO1_5/FC0_RXD_SDA_MOSI_DATA/SD0_D2/CTIMER2_MAT0/SCT_GPI0, direction: OUTPUT, gpio_init_state: 'true'}
- {pin_num: '24', peripheral: GPIO, signal: 'PIO1, 8', pin_signal: PIO1_8/FC0_CTS_SDA_SSEL0/SD0_CLK/SCT0_OUT1/FC4_SSEL2/ADC0_4, direction: OUTPUT, gpio_init_state: 'true'}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitI2SPins
* Function Name : BOARD_InitSPIFPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M33 (Core #0) */
void BOARD_InitI2SPins(void)
{
/* Enables the clock for the I/O controller.: Enable Clock. */
CLOCK_EnableClock(kCLOCK_Iocon);
const uint32_t FC6_I2S_CLK = (/* Pin is configured as FC6_SCK */
IOCON_PIO_FUNC1 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI |
/* Analog switch is closed (enabled) */
IOCON_PIO_ASW_EN);
/* PORT0 PIN10 (coords: 21) is configured as FC6_SCK */
IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_CLK_PORT, BOARD_INITI2SPINS_FC6_I2S_CLK_PIN, FC6_I2S_CLK);
const uint32_t FC7_I2S_WS = (/* Pin is configured as FC7_TXD_SCL_MISO_WS */
IOCON_PIO_FUNC7 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT0 PIN19 (coords: 90) is configured as FC7_TXD_SCL_MISO_WS */
IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_WS_PORT, BOARD_INITI2SPINS_FC7_I2S_WS_PIN, FC7_I2S_WS);
const uint32_t FC7_I2S_TX = (/* Pin is configured as FC7_RXD_SDA_MOSI_DATA */
IOCON_PIO_FUNC7 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT0 PIN20 (coords: 74) is configured as FC7_RXD_SDA_MOSI_DATA */
IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_TX_PORT, BOARD_INITI2SPINS_FC7_I2S_TX_PIN, FC7_I2S_TX);
const uint32_t FC7_I2S_SCK = (/* Pin is configured as FC7_SCK */
IOCON_PIO_FUNC7 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT0 PIN21 (coords: 76) is configured as FC7_SCK */
IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_SCK_PORT, BOARD_INITI2SPINS_FC7_I2S_SCK_PIN, FC7_I2S_SCK);
const uint32_t FC6_I2S_RX = (/* Pin is configured as FC6_RXD_SDA_MOSI_DATA */
IOCON_PIO_FUNC2 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT1 PIN13 (coords: 2) is configured as FC6_RXD_SDA_MOSI_DATA */
IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_RX_PORT, BOARD_INITI2SPINS_FC6_I2S_RX_PIN, FC6_I2S_RX);
const uint32_t FC6_I2S_WS = (/* Pin is configured as FC6_TXD_SCL_MISO_WS */
IOCON_PIO_FUNC2 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT1 PIN16 (coords: 87) is configured as FC6_TXD_SCL_MISO_WS */
IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_WS_PORT, BOARD_INITI2SPINS_FC6_I2S_WS_PIN, FC6_I2S_WS);
const uint32_t FC4_I2C_SCL = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
IOCON_PIO_FUNC5 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC4_I2C_SCL_PORT, BOARD_INITI2SPINS_FC4_I2C_SCL_PIN, FC4_I2C_SCL);
const uint32_t FC4_I2C_SDA = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
IOCON_PIO_FUNC5 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC4_I2C_SDA_PORT, BOARD_INITI2SPINS_FC4_I2C_SDA_PIN, FC4_I2C_SDA);
const uint32_t MCLK = (/* Pin is configured as MCLK */
IOCON_PIO_FUNC1 |
/* No addition pin function */
IOCON_PIO_MODE_INACT |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT1 PIN31 (coords: 91) is configured as MCLK */
IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_MCLK_PORT, BOARD_INITI2SPINS_MCLK_PIN, MCLK);
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitACCELPins:
- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
- pin_list:
- {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
slew_rate: standard, invert: disabled, open_drain: disabled}
- {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
invert: disabled, open_drain: disabled}
- {pin_num: '58', peripheral: GPIO, signal: 'PIO1, 19', pin_signal: PIO1_19/SCT0_OUT7/CTIMER3_MAT1/SCT_GPI7/FC4_SCK/PLU_OUT1/ACMPVREF, direction: INPUT, mode: inactive,
slew_rate: standard, invert: disabled, open_drain: disabled, asw: disabled}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitACCELPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M33 (Core #0) */
void BOARD_InitACCELPins(void)
/* Function assigned for the Cortex-M33 (Core #1) */
void BOARD_InitSPIFPins(void)
{
/* Enables the clock for the I/O controller.: Enable Clock. */
CLOCK_EnableClock(kCLOCK_Iocon);
@ -791,59 +88,97 @@ void BOARD_InitACCELPins(void)
/* Enables the clock for the GPIO1 module */
CLOCK_EnableClock(kCLOCK_Gpio1);
gpio_pin_config_t ACCL_INTR_config = {
.pinDirection = kGPIO_DigitalInput,
.outputLogic = 0U
gpio_pin_config_t F_WP_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 1U
};
/* Initialize GPIO functionality on pin PIO1_19 (pin 58) */
GPIO_PinInit(BOARD_INITACCELPINS_ACCL_INTR_GPIO, BOARD_INITACCELPINS_ACCL_INTR_PORT, BOARD_INITACCELPINS_ACCL_INTR_PIN, &ACCL_INTR_config);
/* Initialize GPIO functionality on pin PIO1_5 (pin 31) */
GPIO_PinInit(BOARD_INITSPIFPINS_F_WP_GPIO, BOARD_INITSPIFPINS_F_WP_PORT, BOARD_INITSPIFPINS_F_WP_PIN, &F_WP_config);
const uint32_t ACCL_INTR = (/* Pin is configured as PIO1_19 */
IOCON_PIO_FUNC0 |
/* No addition pin function */
IOCON_PIO_MODE_INACT |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI |
/* Analog switch is open (disabled) */
IOCON_PIO_ASW_DI);
/* PORT1 PIN19 (coords: 58) is configured as PIO1_19 */
IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_ACCL_INTR_PORT, BOARD_INITACCELPINS_ACCL_INTR_PIN, ACCL_INTR);
gpio_pin_config_t F_HOLD_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 1U
};
/* Initialize GPIO functionality on pin PIO1_8 (pin 24) */
GPIO_PinInit(BOARD_INITSPIFPINS_F_HOLD_GPIO, BOARD_INITSPIFPINS_F_HOLD_PORT, BOARD_INITSPIFPINS_F_HOLD_PIN, &F_HOLD_config);
const uint32_t FC4_I2C_SCL = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
IOCON_PIO_FUNC5 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_FC4_I2C_SCL_PORT, BOARD_INITACCELPINS_FC4_I2C_SCL_PIN, FC4_I2C_SCL);
IOCON->PIO[0][26] = ((IOCON->PIO[0][26] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
const uint32_t FC4_I2C_SDA = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
IOCON_PIO_FUNC5 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_FC4_I2C_SDA_PORT, BOARD_INITACCELPINS_FC4_I2C_SDA_PIN, FC4_I2C_SDA);
/* Selects pin function.
* : PORT026 (pin 60) is configured as HS_SPI_MOSI. */
| IOCON_PIO_FUNC(0x09u)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO0_26_DIGIMODE_DIGITAL));
IOCON->PIO[1][1] = ((IOCON->PIO[1][1] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT11 (pin 59) is configured as HS_SPI_SSEL1. */
| IOCON_PIO_FUNC(PIO1_1_FUNC_ALT5)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO1_1_DIGIMODE_DIGITAL));
IOCON->PIO[1][2] = ((IOCON->PIO[1][2] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT12 (pin 61) is configured as HS_SPI_SCK. */
| IOCON_PIO_FUNC(PIO1_2_FUNC_ALT6)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO1_2_DIGIMODE_DIGITAL));
IOCON->PIO[1][3] = ((IOCON->PIO[1][3] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT13 (pin 62) is configured as HS_SPI_MISO. */
| IOCON_PIO_FUNC(PIO1_3_FUNC_ALT6)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO1_3_DIGIMODE_DIGITAL));
IOCON->PIO[1][5] = ((IOCON->PIO[1][5] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT15 (pin 31) is configured as PIO1_5. */
| IOCON_PIO_FUNC(PIO1_5_FUNC_ALT0)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO1_5_DIGIMODE_DIGITAL));
IOCON->PIO[1][8] = ((IOCON->PIO[1][8] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT18 (pin 24) is configured as PIO1_8. */
| IOCON_PIO_FUNC(PIO1_8_FUNC_ALT0)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO1_8_DIGIMODE_DIGITAL));
}
/***********************************************************************************************************************
* EOF

412
board/pin_mux.h
View File

@ -25,415 +25,73 @@ extern "C" {
*/
void BOARD_InitBootPins(void);
#define IOCON_PIO_DIGITAL_EN 0x0100u /*!<@brief Enables digital function */
#define IOCON_PIO_FUNC1 0x01u /*!<@brief Selects pin function 1 */
#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */
#define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */
#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!<@brief Open drain is disabled */
#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
/*! @name PIO0_29 (number 92), P8[2]/U6[13]/FC0_USART_RXD
@{ */
/*!
* @brief PORT peripheral base pointer */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT 0U
/*!
* @brief PORT pin number */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 29U
/*!
* @brief PORT pin mask */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_MASK (1U << 29U)
/* @} */
/*! @name PIO0_30 (number 94), P8[3]/U6[12]/FC0_USART_TXD
@{ */
/*!
* @brief PORT peripheral base pointer */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT 0U
/*!
* @brief PORT pin number */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 30U
/*!
* @brief PORT pin mask */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_MASK (1U << 30U)
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
void BOARD_InitPins_Core1(void); /* Function assigned for the Cortex-M33 (Core #1) */
#define IOCON_PIO_ASW_DI 0x00u /*!<@brief Analog switch is open (disabled) */
#define IOCON_PIO_ASW_DIS_EN 0x00u /*!<@brief Analog switch is closed (enabled), only for A0 version */
#define IOCON_PIO_ASW_EN 0x0400u /*!<@brief Analog switch is closed (enabled) */
#define IOCON_PIO_DIGITAL_EN 0x0100u /*!<@brief Enables digital function */
#define IOCON_PIO_FUNC6 0x06u /*!<@brief Selects pin function 6 */
#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */
#define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */
#define IOCON_PIO_MODE_PULLDOWN 0x10u /*!<@brief Selects pull-down function */
#define IOCON_PIO_MODE_PULLUP 0x20u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!<@brief Open drain is disabled */
#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
/*! @name PIO0_11 (number 13), U14[4]/SWDCLK_TRGT
@{ */
/*!
* @brief PORT peripheral base pointer */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT 0U
/*!
* @brief PORT pin number */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN 11U
/*!
* @brief PORT pin mask */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 11U)
/* @} */
/*! @name PIO0_12 (number 12), U15[4]/D7/P7[2]/IF_SWDIO
@{ */
/*!
* @brief PORT peripheral base pointer */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT 0U
/*!
* @brief PORT pin number */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN 12U
/*!
* @brief PORT pin mask */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 12U)
/* @} */
/*! @name PIO0_10 (number 21), U14[12]/SWO_TRGT
@{ */
/*!
* @brief PORT peripheral base pointer */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PORT 0U
/*!
* @brief PORT pin number */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN 10U
/*!
* @brief PORT pin mask */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN_MASK (1U << 10U)
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
/*!
* @brief Enables digital function */
#define IOCON_PIO_DIGITAL_EN 0x0100u
/*!
* @brief Selects pin function 7 */
#define IOCON_PIO_FUNC7 0x07u
/*!
* @brief Input function is not inverted */
#define IOCON_PIO_INV_DI 0x00u
/*!
* @brief No addition pin function */
#define IOCON_PIO_MODE_INACT 0x00u
/*!
* @brief Open drain is disabled */
#define IOCON_PIO_OPENDRAIN_DI 0x00u
/*!
* @brief Standard mode, output slew rate control is enabled */
#define IOCON_PIO_SLEW_STANDARD 0x00u
/*!
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
#define PIO0_28_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 7. */
#define PIO0_28_FUNC_ALT7 0x07u
/*!
* @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
#define PIO0_28_MODE_PULL_UP 0x02u
#define PIO0_26_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
#define PIO1_12_DIGIMODE_DIGITAL 0x01u
#define PIO1_1_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 4. */
#define PIO1_12_FUNC_ALT4 0x04u
/*!
* @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
#define PIO1_12_MODE_PULL_UP 0x02u
* @brief Selects pin function.: Alternative connection 5. */
#define PIO1_1_FUNC_ALT5 0x05u
/*!
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
#define PIO1_29_DIGIMODE_DIGITAL 0x01u
#define PIO1_2_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 4. */
#define PIO1_29_FUNC_ALT4 0x04u
/*!
* @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
#define PIO1_29_MODE_PULL_UP 0x02u
* @brief Selects pin function.: Alternative connection 6. */
#define PIO1_2_FUNC_ALT6 0x06u
/*!
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
#define PIO1_30_DIGIMODE_DIGITAL 0x01u
#define PIO1_3_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 4. */
#define PIO1_30_FUNC_ALT4 0x04u
* @brief Selects pin function.: Alternative connection 6. */
#define PIO1_3_FUNC_ALT6 0x06u
/*!
* @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
#define PIO1_30_MODE_PULL_UP 0x02u
/*! @name USB0_DP (number 97), P10[3]/D10[3]/USB0_FS_P
@{ */
/* @} */
/*! @name USB0_DM (number 98), P10[2]/D10[2]/USB0_FS_N
@{ */
/* @} */
/*! @name PIO0_22 (number 78), P10[1]/USB0_VBUS
@{ */
#define BOARD_INITUSBPINS_USB0_VBUS_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITUSBPINS_USB0_VBUS_PIN 22U /*!<@brief PORT pin number */
#define BOARD_INITUSBPINS_USB0_VBUS_PIN_MASK (1U << 22U) /*!<@brief PORT pin mask */
/* @} */
/*! @name USB1_DM (number 35), P9[2]/D9[2]/USB1_HS_N
@{ */
/* @} */
/*! @name USB1_DP (number 34), P9[3]/D9[3]/USB1_HS_P
@{ */
/* @} */
/*! @name USB1_VBUS (number 36), P9[1]/USB1_VBUS
@{ */
/* @} */
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
#define PIO1_5_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitUSBPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
* @brief Selects pin function.: Alternative connection 0. */
#define PIO1_5_FUNC_ALT0 0x00u
/*!
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
#define PIO1_8_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO1_8_FUNC_ALT0 0x00u
#define IOCON_PIO_DIGITAL_EN 0x0100u /*!<@brief Enables digital function */
#define IOCON_PIO_FUNC0 0x00u /*!<@brief Selects pin function 0 */
#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */
#define IOCON_PIO_MODE_PULLUP 0x20u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!<@brief Open drain is disabled */
#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
/*! @name PIO1_4 (number 1), R78/P18[5]/LEDR/PWM_ARD
/*! @name PIO1_5 (number 31), P17[17]/P24[1]/PIO1_5_GPIO_ARD
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN_MASK (1U << 4U) /*!<@brief GPIO pin mask */
#define BOARD_INITLEDSPINS_LED_BLUE_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_BLUE_PIN 4U /*!<@brief PORT pin number */
#define BOARD_INITLEDSPINS_LED_BLUE_PIN_MASK (1U << 4U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_6 (number 5), R80/P18[9]/LEDB/PWM_ARD
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN_MASK (1U << 6U) /*!<@brief GPIO pin mask */
#define BOARD_INITLEDSPINS_LED_RED_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_RED_PIN 6U /*!<@brief PORT pin number */
#define BOARD_INITLEDSPINS_LED_RED_PIN_MASK (1U << 6U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_7 (number 9), R79/P18[7]/LEDG/PWM_ARD
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN_MASK (1U << 7U) /*!<@brief GPIO pin mask */
#define BOARD_INITLEDSPINS_LED_GREEN_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_GREEN_PIN 7U /*!<@brief PORT pin number */
#define BOARD_INITLEDSPINS_LED_GREEN_PIN_MASK (1U << 7U) /*!<@brief PORT pin mask */
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
#define IOCON_PIO_ASW_DIS_EN 0x00u /*!<@brief Analog switch is closed (enabled), only for A0 version */
#define IOCON_PIO_ASW_EN 0x0400u /*!<@brief Analog switch is closed (enabled) */
#define IOCON_PIO_DIGITAL_EN 0x0100u /*!<@brief Enables digital function */
#define IOCON_PIO_FUNC0 0x00u /*!<@brief Selects pin function 0 */
#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */
#define IOCON_PIO_MODE_PULLUP 0x20u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!<@brief Open drain is disabled */
#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
/*! @name PIO0_5 (number 88), S1/J10[1]/U3[12]/P17[8]/P7[7]/U11[4]/P0_5-ISP1
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITBUTTONSPINS_S1_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITBUTTONSPINS_S1_GPIO_PIN_MASK (1U << 5U) /*!<@brief GPIO pin mask */
#define BOARD_INITBUTTONSPINS_S1_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITBUTTONSPINS_S1_PIN 5U /*!<@brief PORT pin number */
#define BOARD_INITBUTTONSPINS_S1_PIN_MASK (1U << 5U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_18 (number 64), S2/P18[16]/P24[2]/WAKE/GPIO
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITBUTTONSPINS_S2_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITBUTTONSPINS_S2_GPIO_PIN_MASK (1U << 18U) /*!<@brief GPIO pin mask */
#define BOARD_INITBUTTONSPINS_S2_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITBUTTONSPINS_S2_PIN 18U /*!<@brief PORT pin number */
#define BOARD_INITBUTTONSPINS_S2_PIN_MASK (1U << 18U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_9 (number 10), S3/P18[1]/PIO1_9_GPIO_ARD
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITBUTTONSPINS_S3_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITBUTTONSPINS_S3_GPIO_PIN_MASK (1U << 9U) /*!<@brief GPIO pin mask */
#define BOARD_INITBUTTONSPINS_S3_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITBUTTONSPINS_S3_PIN 9U /*!<@brief PORT pin number */
#define BOARD_INITBUTTONSPINS_S3_PIN_MASK (1U << 9U) /*!<@brief PORT pin mask */
/* @} */
/*! @name RESETN (number 32), S4/P16[10]/P23[2]/U14[8]/RESETN
@{ */
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitBUTTONsPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitPins_Core0(void); /* Function assigned for the Cortex-M33 (Core #0) */
#define IOCON_PIO_ASW_EN 0x0400u /*!<@brief Analog switch is closed (enabled) */
#define IOCON_PIO_DIGITAL_EN 0x0100u /*!<@brief Enables digital function */
#define IOCON_PIO_FUNC1 0x01u /*!<@brief Selects pin function 1 */
#define IOCON_PIO_FUNC2 0x02u /*!<@brief Selects pin function 2 */
#define IOCON_PIO_FUNC5 0x05u /*!<@brief Selects pin function 5 */
#define IOCON_PIO_FUNC7 0x07u /*!<@brief Selects pin function 7 */
#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */
#define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */
#define IOCON_PIO_MODE_PULLUP 0x20u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!<@brief Open drain is disabled */
#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
/*! @name PIO1_20 (number 4), P17[1]/P24[5]/FC4_I2C_SCL_ARD
@{ */
#define BOARD_INITI2SPINS_FC4_I2C_SCL_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITI2SPINS_FC4_I2C_SCL_PIN 20U /*!<@brief PORT pin number */
#define BOARD_INITI2SPINS_FC4_I2C_SCL_PIN_MASK (1U << 20U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_21 (number 30), P17[3]/P24[6]/FC4_I2C_SDA_ARD
@{ */
#define BOARD_INITI2SPINS_FC4_I2C_SDA_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITI2SPINS_FC4_I2C_SDA_PIN 21U /*!<@brief PORT pin number */
#define BOARD_INITI2SPINS_FC4_I2C_SDA_PIN_MASK (1U << 21U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_31 (number 91), P19[7]/P19[8]/PLU_IN0/GPIO
@{ */
#define BOARD_INITI2SPINS_MCLK_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITI2SPINS_MCLK_PIN 31U /*!<@brief PORT pin number */
#define BOARD_INITI2SPINS_MCLK_PIN_MASK (1U << 31U) /*!<@brief PORT pin mask */
#define BOARD_INITSPIFPINS_F_WP_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITSPIFPINS_F_WP_GPIO_PIN_MASK (1U << 5U) /*!<@brief GPIO pin mask */
#define BOARD_INITSPIFPINS_F_WP_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITSPIFPINS_F_WP_PIN 5U /*!<@brief PORT pin number */
#define BOARD_INITSPIFPINS_F_WP_PIN_MASK (1U << 5U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_21 (number 76), P17[14]/FC7_I2S_SCK
@{ */
#define BOARD_INITI2SPINS_FC7_I2S_SCK_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITI2SPINS_FC7_I2S_SCK_PIN 21U /*!<@brief PORT pin number */
#define BOARD_INITI2SPINS_FC7_I2S_SCK_PIN_MASK (1U << 21U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_20 (number 74), P17[10]/FC7_I2S_TX
@{ */
#define BOARD_INITI2SPINS_FC7_I2S_TX_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITI2SPINS_FC7_I2S_TX_PIN 20U /*!<@brief PORT pin number */
#define BOARD_INITI2SPINS_FC7_I2S_TX_PIN_MASK (1U << 20U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_19 (number 90), P17[12]/FC7_I2S_WS
@{ */
#define BOARD_INITI2SPINS_FC7_I2S_WS_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITI2SPINS_FC7_I2S_WS_PIN 19U /*!<@brief PORT pin number */
#define BOARD_INITI2SPINS_FC7_I2S_WS_PIN_MASK (1U << 19U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_10 (number 21), U14[12]/SWO_TRGT
@{ */
#define BOARD_INITI2SPINS_FC6_I2S_CLK_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITI2SPINS_FC6_I2S_CLK_PIN 10U /*!<@brief PORT pin number */
#define BOARD_INITI2SPINS_FC6_I2S_CLK_PIN_MASK (1U << 10U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_13 (number 2), P17[20]/FC6_I2S_RX
@{ */
#define BOARD_INITI2SPINS_FC6_I2S_RX_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITI2SPINS_FC6_I2S_RX_PIN 13U /*!<@brief PORT pin number */
#define BOARD_INITI2SPINS_FC6_I2S_RX_PIN_MASK (1U << 13U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_16 (number 87), P18[17]/SD1_PWR_EN
@{ */
#define BOARD_INITI2SPINS_FC6_I2S_WS_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITI2SPINS_FC6_I2S_WS_PIN 16U /*!<@brief PORT pin number */
#define BOARD_INITI2SPINS_FC6_I2S_WS_PIN_MASK (1U << 16U) /*!<@brief PORT pin mask */
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitI2SPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
#define IOCON_PIO_ASW_DI 0x00u /*!<@brief Analog switch is open (disabled) */
#define IOCON_PIO_DIGITAL_EN 0x0100u /*!<@brief Enables digital function */
#define IOCON_PIO_FUNC0 0x00u /*!<@brief Selects pin function 0 */
#define IOCON_PIO_FUNC5 0x05u /*!<@brief Selects pin function 5 */
#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */
#define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */
#define IOCON_PIO_MODE_PULLUP 0x20u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!<@brief Open drain is disabled */
#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
/*! @name PIO1_21 (number 30), P17[3]/P24[6]/FC4_I2C_SDA_ARD
@{ */
#define BOARD_INITACCELPINS_FC4_I2C_SDA_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITACCELPINS_FC4_I2C_SDA_PIN 21U /*!<@brief PORT pin number */
#define BOARD_INITACCELPINS_FC4_I2C_SDA_PIN_MASK (1U << 21U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_20 (number 4), P17[1]/P24[5]/FC4_I2C_SCL_ARD
@{ */
#define BOARD_INITACCELPINS_FC4_I2C_SCL_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITACCELPINS_FC4_I2C_SCL_PIN 20U /*!<@brief PORT pin number */
#define BOARD_INITACCELPINS_FC4_I2C_SCL_PIN_MASK (1U << 20U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO1_19 (number 58), U7[3]/P18[14]/PLU_OUT1/GPIO
/*! @name PIO1_8 (number 24), P17[19]/PIO1_8_GPIO_ARD
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITACCELPINS_ACCL_INTR_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITACCELPINS_ACCL_INTR_GPIO_PIN_MASK (1U << 19U) /*!<@brief GPIO pin mask */
#define BOARD_INITACCELPINS_ACCL_INTR_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITACCELPINS_ACCL_INTR_PIN 19U /*!<@brief PORT pin number */
#define BOARD_INITACCELPINS_ACCL_INTR_PIN_MASK (1U << 19U) /*!<@brief PORT pin mask */
/* @} */
#define BOARD_INITSPIFPINS_F_HOLD_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITSPIFPINS_F_HOLD_GPIO_PIN_MASK (1U << 8U) /*!<@brief GPIO pin mask */
#define BOARD_INITSPIFPINS_F_HOLD_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITSPIFPINS_F_HOLD_PIN 8U /*!<@brief PORT pin number */
#define BOARD_INITSPIFPINS_F_HOLD_PIN_MASK (1U << 8U) /*!<@brief PORT pin mask */
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitACCELPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
void BOARD_InitSPIFPins(void); /* Function assigned for the Cortex-M33 (Core #1) */
#if defined(__cplusplus)
}

6
include/app_lspi_flash.h Normal file
View File

@ -0,0 +1,6 @@
#ifndef APP_LSPI_FLASH_H
#define APP_LSPI_FLASH_H
int app_lspi_flash_init(void);
#endif // APP_LSPI_FLASH_H

14
lib/littlefs/CMakeLists.txt Normal file
View File

@ -0,0 +1,14 @@
cmake_minimum_required(VERSION 3.10)
project(littlefs)
set(LFS_SOURCES
"lfs/lfs.c"
)
set(LFS_INCLUDES
"lfs"
)
add_library(${PROJECT_NAME} ${LFS_SOURCES})
target_include_directories(${PROJECT_NAME} PUBLIC ${LFS_INCLUDES})

1
lib/littlefs/lfs Submodule

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Subproject commit 6a53d76e90af33f0656333c1db09bd337fa75d23

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src/app_lspi_flash.c Normal file
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/* SDK drivers */
#include "fsl_spi.h"
/* Private */
#include "app_lspi_flash.h"
#define APP_LSPI_FLASH_FREQ (10 * 1000 * 1000)
static int app_lspi_flash_identify(void) {
uint8_t tx_buf[4] = {0x9F, 0x00, 0x00, 0x00};
uint8_t rx_buf[4];
spi_transfer_t xfer = {
.txData = tx_buf,
.rxData = rx_buf,
.dataSize = 4,
.configFlags = kSPI_FrameAssert,
};
if (SPI_MasterTransferBlocking(SPI8, &xfer) != kStatus_Success) {
return -1;
}
/* TODO: Check for Winbond Mfg. ID for now. */
if (rx_buf[1] != 0xEF) {
return -2;
}
return 0;
}
int app_lspi_flash_init(void) {
/* Force re-compute the PLL frequency based on the configuration */
CLOCK_GetPLL0OutClockRate(true);
CLOCK_AttachClk(kMAIN_CLK_to_HSLSPI);
spi_master_config_t lspi_config;
SPI_MasterGetDefaultConfig(&lspi_config);
lspi_config.baudRate_Bps = APP_LSPI_FLASH_FREQ;
lspi_config.sselNum = kSPI_Ssel1;
if (SPI_MasterInit(SPI8, &lspi_config, CLOCK_GetCoreSysClkFreq()) != kStatus_Success) {
return -1;
}
if (app_lspi_flash_identify() != 0) {
return -2;
}
return 0;
}

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src/main.c
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/* Board */
#include "board.h"
#include "clock_config.h"
#include "peripherals.h"
#include "pin_mux.h"
#include "fsl_debug_console.h"
/* LittleFS */
#include "lfs.h"
/* App */
#include "app_lspi_flash.h"
int main(void) {
BOARD_InitBootPins();
BOARD_BootClockFROHF96M();
BOARD_InitBootClocks();
BOARD_InitBootPeripherals();
BOARD_InitDebugConsole();
if(app_lspi_flash_init() != 0) {
for(;;) {
/* -- */
}
}
PRINTF("Hello world!!\r\n");
for(;;) {
for (;;) {
__WFI();
}
}