#include /* Private */ #include "afe44x0.h" #define AFE_ARRAY_SIZE(x) (sizeof(x) / (sizeof(x[0]))) static const afe44x0_timing_t afe44x0_default_timings[] = { {.param = AFE44_TIMING_LED2STC, .value = 6050}, {.param = AFE44_TIMING_LED2ENDC, .value = 7998}, {.param = AFE44_TIMING_LED2LEDSTC, .value = 6000}, {.param = AFE44_TIMING_LED2LEDENDC, .value = 7999}, {.param = AFE44_TIMING_ALED2STC, .value = 50}, {.param = AFE44_TIMING_ALED2ENDC, .value = 1998}, {.param = AFE44_TIMING_LED1STC, .value = 2050}, {.param = AFE44_TIMING_LED1ENDC, .value = 3998}, {.param = AFE44_TIMING_LED1LEDSTC, .value = 2000}, {.param = AFE44_TIMING_LED1LEDENDC, .value = 3999}, {.param = AFE44_TIMING_ALED1STC, .value = 4050}, {.param = AFE44_TIMING_ALED1ENDC, .value = 5998}, {.param = AFE44_TIMING_LED2CONVST, .value = 4}, {.param = AFE44_TIMING_LED2CONVEND, .value = 1999}, {.param = AFE44_TIMING_ALED2CONVST, .value = 2004}, {.param = AFE44_TIMING_ALED2CONVEND, .value = 3999}, {.param = AFE44_TIMING_LED1CONVST, .value = 4004}, {.param = AFE44_TIMING_LED1CONVEND, .value = 5999}, {.param = AFE44_TIMING_ALED1CONVST, .value = 6004}, {.param = AFE44_TIMING_ALED1CONVEND, .value = 7999}, {.param = AFE44_TIMING_ADCRSTSTCT0, .value = 0}, {.param = AFE44_TIMING_ADCRSTENDCT0, .value = 3}, {.param = AFE44_TIMING_ADCRSTSTCT1, .value = 2000}, {.param = AFE44_TIMING_ADCRSTENDCT1, .value = 2003}, {.param = AFE44_TIMING_ADCRSTSTCT2, .value = 4000}, {.param = AFE44_TIMING_ADCRSTENDCT2, .value = 4003}, {.param = AFE44_TIMING_ADCRSTSTCT3, .value = 6000}, {.param = AFE44_TIMING_ADCRSTENDCT3, .value = 6003}, {.param = AFE44_TIMING_PRPCOUNT, .value = 7999}, }; static afe44x0_ret_t afe44x0_read_register(afe44x0_t *afe, uint8_t addr, uint32_t *data); static afe44x0_ret_t afe44x0_write_register(afe44x0_t *afe, uint8_t addr, uint32_t data); static inline afe44x0_ret_t afe44x0_reset(afe44x0_t *afe); afe44x0_ret_t afe44x0_init(afe44x0_t *afe) { afe44x0_ret_t ret = AFE44_RET_SUCCESS; ret = afe44x0_reset(afe); if (ret != AFE44_RET_SUCCESS) { return ret; } ret = afe44x0_apply_timings(afe, afe44x0_default_timings, AFE_ARRAY_SIZE(afe44x0_default_timings)); return ret; } afe44x0_ret_t afe44x0_apply_timings(afe44x0_t *afe, const afe44x0_timing_t *timings, uint8_t num_timings) { afe44x0_ret_t ret = AFE44_RET_SUCCESS; for (uint8_t i = 0; i < num_timings; i++) { ret = afe44x0_write_register(afe->user_data, timings[i].param, timings[i].value); if (ret != AFE44_RET_SUCCESS) { break; } } return ret; } static afe44x0_ret_t afe44x0_read_register(afe44x0_t *afe, uint8_t addr, uint32_t *data) { afe44x0_ret_t ret = AFE44_RET_SUCCESS; /* Write to Control 0, with SPI_READ bit set */ uint8_t tx_buf[4] = {0x00, 0x00, 0x00, 0x01}; uint8_t rx_buf[4]; ret = afe->ops.transfer(afe->user_data, tx_buf, rx_buf, 4); if (ret != AFE44_RET_SUCCESS) { return ret; } /* 2nd ops, with address set to register. */ tx_buf[0] = addr; ret = afe->ops.transfer(afe->user_data, tx_buf, rx_buf, 4); if (ret != AFE44_RET_SUCCESS) { return ret; } /* Combine the register contents */ *data = rx_buf[1] << 16 | rx_buf[2] << 8 | rx_buf[3]; return ret; } static afe44x0_ret_t afe44x0_write_register(afe44x0_t *afe, uint8_t addr, uint32_t data) { afe44x0_ret_t ret = AFE44_RET_SUCCESS; /* Write to Control 0, with SPI_READ bit set */ uint8_t tx_buf[4] = {0x00, 0x00, 0x00, 0x00}; uint8_t rx_buf[4]; ret = afe->ops.transfer(afe->user_data, tx_buf, rx_buf, 4); if (ret != AFE44_RET_SUCCESS) { return ret; } tx_buf[0] = addr; tx_buf[1] = (data >> 16U) & 0xFFU; tx_buf[2] = (data >> 8U) & 0xFFU; tx_buf[3] = data & 0xFFU; ret = afe->ops.transfer(afe->user_data, tx_buf, rx_buf, 4); return ret; } static inline afe44x0_ret_t afe44x0_reset(afe44x0_t *afe) { return afe->ops.reset(afe->user_data); }