87 lines
3.7 KiB
INI
87 lines
3.7 KiB
INI
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jtag_device 5 0x1 0x1f 0x1e
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jtag_nsrst_delay 200
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jtag_ntrst_delay 200
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target xscale little reset_init 0 pxa255
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reset_config trst_and_srst
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run_and_halt_time 0 30
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target_script 0 reset /ram/pxa255.init
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#xscale debug_handler 0 0xFFFF0800 # debug handler base address
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trunc /ram/pxa255.init
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append /ram/pxa255.init #configuration file for PXA250 Evaluation Board
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append /ram/pxa255.init # -----------------------------------------------------
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append /ram/pxa255.init #
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append /ram/pxa255.init xscale cp15 15 0x00002001 #Enable CP0 and CP13 access
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append /ram/pxa255.init #
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append /ram/pxa255.init # setup GPIO
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append /ram/pxa255.init #
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append /ram/pxa255.init mww 0x40E00018 0x00008000 #CPSR0
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x40E0001C 0x00000002 #GPSR1
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x40E00020 0x00000008 #GPSR2
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x40E0000C 0x00008000 #GPDR0
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x40E00054 0x80000000 #GAFR0_L
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x40E00058 0x00188010 #GAFR0_H
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x40E0005C 0x60908018 #GAFR1_L
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x40E0000C 0x0280E000 #GPDR0
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x40E00010 0x821C88B2 #GPDR1
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x40E00014 0x000F03DB #GPDR2
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x40E00000 0x000F03DB #GPLR0
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init
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append /ram/pxa255.init
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append /ram/pxa255.init mww 0x40F00004 0x00000020 #PSSR
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init
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append /ram/pxa255.init #
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append /ram/pxa255.init # setup memory controller
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append /ram/pxa255.init #
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append /ram/pxa255.init mww 0x48000008 0x01111998 #MSC0
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x48000010 0x00047ff0 #MSC2
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x48000014 0x00000000 #MECR
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x48000028 0x00010504 #MCMEM0
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x4800002C 0x00010504 #MCMEM1
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x48000030 0x00010504 #MCATT0
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x48000034 0x00010504 #MCATT1
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x48000038 0x00004715 #MCIO0
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x4800003C 0x00004715 #MCIO1
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init #
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append /ram/pxa255.init mww 0x48000004 0x03CA4018 #MDREF
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x48000004 0x004B4018 #MDREF
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x48000004 0x000B4018 #MDREF
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x48000004 0x000BC018 #MDREF
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x48000000 0x00001AC8 #MDCNFG
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init
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append /ram/pxa255.init mww 0x48000000 0x00001AC9 #MDCNFG
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init mww 0x48000040 0x00000000 #MDMRS
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append /ram/pxa255.init sleep 20
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append /ram/pxa255.init
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