Add support for ATMEL AT91SAM3U - CortexM3 Family
git-svn-id: svn://svn.berlios.de/openocd/trunk@2383 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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@ -130,7 +130,7 @@ debugged via the GDB protocol.
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@b{Flash Programing:} Flash writing is supported for external CFI
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compatible NOR flashes (Intel and AMD/Spansion command set) and several
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internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3, and
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internal flashes (LPC2000, AT91SAM7, AT91SAM3U, STR7x, STR9x, LM3, and
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STM32x). Preliminary support for various NAND flash controllers
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(LPC3180, Orion, S3C24xx, more) controller is included.
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@ -3374,11 +3374,68 @@ flash bank aduc702x 0 0 0 0 $_TARGETNAME
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@end example
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@end deffn
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@deffn {Flash Driver} at91sam3
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@cindex at91sam3
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All members of the AT91SAM3 (cortex-M3) microcontroller family from
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atmel include internal flash and use the Cortex-M3 core. The driver
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currently (6/22/09) recognizes the AT91SAM3U[1/2/4][C/E] chips. Note
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that the driver was orginaly developed and tested using the
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AT91SAM3U4E, using a SAM3U-EK eval board. Support for other chips in
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the family where cribbed from the data sheet [Note to future
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readers/updaters: Please remove this worrysome comment after other
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chips are confirmed].
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The AT91SAM3U4[E/C] (256K) chips have 2 flash banks, the other chips
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(3U[1/2][E/C]) have 1 flash bank, in all cases the flash banks are at
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the following fixed locations.
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@example
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# Flash bank 0 - all chips
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flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
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# Flash bank 1 - only 256K chips
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flash bank at91sam3 0x000100000 0 1 1 $_TARGETNAME
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@end example
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Internally, the AT91SAM3 flash memory is organized as follows:
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@itemize
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@item @var{N-Banks:} 256K chips have 2 banks, others have 1 bank.
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@item @var{Bank Size:} 128K/64K Per flash bank
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@item @var{Sectors:} 16 or 8 per bank
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@item @var{SectorSize:} 8K Per Sector
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@item @var{PageSize:} 256 bytes per page. Note that OpenOCD operates on 'sector' sizes, not page sizes.
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@end itemize
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The AT91SAM3 driver adds an additional command:
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@deffn Command {at91sam3 gpnvm set|clear|show all|NUMBER}
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This command allows you to set, clear, or show the state of the GPNVM bits.
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@end deffn
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@deffn Command {at91sam3 info}
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This command attempts to display information about the AT91SAM3
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chip. @b{First} it read the @var{CHIPID_CIDR} [address 0x400e0740, see
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Section 28.2.1, page 505 of the AT91SAM3U 29/may/2009 datasheet,
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document id: doc6430A] and decodes the values. @b{Second} it reads the
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various clock configuration registers and attempts to display how it
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believes the chip is configured. By default, the SLOWCLK is assumed to
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be 32768 Hz, see the command @b{at91sam3 slowclk}.
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@end deffn
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@deffn Command {at91sam3 slowclk [VALUE]}
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This command shows/sets the slow clock frequency used in the
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@b{at91sam3 info} command calculations above.
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@end deffn
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@end deffn
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@deffn {Flash Driver} at91sam7
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All members of the AT91SAM7 microcontroller family from Atmel
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include internal flash and use ARM7TDMI cores.
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The driver automatically recognizes a number of these chips using
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the chip identification register, and autoconfigures itself.
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All members of the AT91SAM7 microcontroller family from Atmel include
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internal flash and use ARM7TDMI cores. The driver automatically
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recognizes a number of these chips using the chip identification
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register, and autoconfigures itself.
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@end deffn
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@example
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flash bank at91sam7 0 0 0 0 $_TARGETNAME
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@ -3419,7 +3476,6 @@ This assumes that the first flash bank (number 0) is associated with
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the appropriate at91sam7 target.
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@end quotation
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@end deffn
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@end deffn
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@deffn {Flash Driver} avr
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The AVR 8-bit microcontrollers from Atmel integrate flash memory.
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@ -11,6 +11,7 @@ libflash_la_SOURCES = \
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cfi.c \
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non_cfi.c \
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at91sam7.c \
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at91sam3.c \
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davinci_nand.c \
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str7x.c \
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str9x.c \
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@ -42,6 +43,7 @@ noinst_HEADERS = \
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cfi.h \
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non_cfi.h \
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at91sam7.h \
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at91sam3.h \
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str7x.h \
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str9x.h \
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nand.h \
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,23 @@
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/***************************************************************************
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* Copyright (C) 2009 by Duane Ellis *
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* openocd@duaneellis.com *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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// nothing to do here other then export this.
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extern flash_driver_t at91sam3_flash;
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@ -30,6 +30,7 @@
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#include "flash.h"
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#include "image.h"
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#include "time_support.h"
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#include "at91sam3.h"
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/* command handlers */
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static int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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@ -66,6 +67,7 @@ flash_driver_t *flash_drivers[] = {
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&lpc2000_flash,
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&cfi_flash,
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&at91sam7_flash,
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&at91sam3_flash,
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&str7x_flash,
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&str9x_flash,
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&aduc702x_flash,
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@ -0,0 +1 @@
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source [find target/at91sam3u4e.cfg]
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@ -0,0 +1,7 @@
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# common stuff
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source [find target/at91sam3uxx.cfg]
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# size is automatically "calculated" by probing
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flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
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@ -0,0 +1,7 @@
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# common stuff
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source [find target/at91sam3uxx.cfg]
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# size is automatically "calculated" by probing
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flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
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@ -0,0 +1,7 @@
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# common stuff
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source [find target/at91sam3uxx.cfg]
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# size is automatically "calculated" by probing
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flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
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@ -0,0 +1,7 @@
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# common stuff
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source [find target/at91sam3uxx.cfg]
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# size is automatically "calculated" by probing
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flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
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@ -0,0 +1,9 @@
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# common stuff
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source [find target/at91sam3uxx.cfg]
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# size is automatically "calculated" by probing
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flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
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# This is a 256K chip, it has the 2nd bank
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flash bank at91sam3 0x000100000 0 1 1 $_TARGETNAME
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@ -0,0 +1,9 @@
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# common stuff
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source [find target/at91sam3uxx.cfg]
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# size is automatically "calculated" by probing
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flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
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# This is a 256K chip - it has the 2nd bank
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flash bank at91sam3 0x000100000 0 1 1 $_TARGETNAME
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@ -0,0 +1,47 @@
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# script for ATMEL sam3, a CORTEX-M3 chip
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#
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# at91sam3u4e
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# at91sam3u2e
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# at91sam3u1e
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# at91sam3u4c
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# at91sam3u2c
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# at91sam3u1c
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME sam3
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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#jtag scan chain
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x4ba00477
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}
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
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# 16K is plenty, the smallest chip has this much
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$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
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reset_config srst_only
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# GDB can use this
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gdb_memory_map enable
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# And GDB can flash the chip
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gdb_flash_program enable
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$_TARGETNAME configure -event gdb-flash-erase-start {
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halt
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}
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