target.cfg: use $_TARGETNAME for flash

This gets rid of runtime warnings from the use of numbers.
STM32 and LPC2103 were tested.  Other LPC updates are the
same, and so are safe.  The CFI updates match other tested
changes now in the tree.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
Freddie Chopin 2009-10-29 19:23:05 +01:00 committed by David Brownell
parent 8152106419
commit 0da0bfd40a
13 changed files with 13 additions and 13 deletions

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@ -45,7 +45,7 @@ $_TARGETNAME configure -event gdb-flash-erase-start {
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x3C000 -work-area-size 0x4000 -work-area-backup 0 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x3C000 -work-area-size 0x4000 -work-area-backup 0
flash bank cfi 0x10000000 0x400000 2 2 0 flash bank cfi 0x10000000 0x400000 2 2 $_TARGETNAME
# For more information about the configuration files, take a look at: # For more information about the configuration files, take a look at:
# openocd.texi # openocd.texi

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@ -28,4 +28,4 @@ target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
#flash configuration #flash configuration
#flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...] #flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...]
flash bank cfi 0x60000000 0x1000000 2 2 0 flash bank cfi 0x60000000 0x1000000 2 2 $_TARGETNAME

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@ -44,7 +44,7 @@ $_TARGETNAME configure -event reset-init {
# LPC1768 has 512kB of user-available FLASH (bootloader is located in separate dedicated region). # LPC1768 has 512kB of user-available FLASH (bootloader is located in separate dedicated region).
# flash bank lpc1700 <base> <size> 0 0 <target#> <variant> <cclk> [calc_checksum] # flash bank lpc1700 <base> <size> 0 0 <target#> <variant> <cclk> [calc_checksum]
flash bank lpc2000 0x0 0x80000 0 0 0 lpc1700 12000 calc_checksum flash bank lpc2000 0x0 0x80000 0 0 $_TARGETNAME lpc1700 12000 calc_checksum
# 4MHz / 6 = 666kHz, so use 500 # 4MHz / 6 = 666kHz, so use 500
jtag_khz 500 jtag_khz 500

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@ -35,4 +35,4 @@ $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-s
# 32kB of internal Flash, core clocked with 12MHz crystal # 32kB of internal Flash, core clocked with 12MHz crystal
# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum] # flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum]
flash bank lpc2000 0x0 0x8000 0 0 0 lpc2000_v2 12000 calc_checksum flash bank lpc2000 0x0 0x8000 0 0 $_TARGETNAME lpc2000_v2 12000 calc_checksum

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@ -39,4 +39,4 @@ $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-s
#flash bank <driver> <base> <size> <chip_width> <bus_width> #flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14745 calc_checksum flash bank lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14745 calc_checksum

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@ -38,4 +38,4 @@ target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAM
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
#flash bank <driver> <base> <size> <chip_width> <bus_width> #flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum flash bank lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14765 calc_checksum

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@ -52,4 +52,4 @@ $_TARGETNAME configure -event reset-init {
} }
# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum] # flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum]
flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765 calc_checksum flash bank lpc2000 0x0 0x7d000 0 0 $_TARGETNAME lpc2000_v2 14765 calc_checksum

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@ -32,7 +32,7 @@ $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-s
#flash configuration #flash configuration
#flash bank lpc2000 <base> <size> 0 0 <target#> <variant> #flash bank lpc2000 <base> <size> 0 0 <target#> <variant>
flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum flash bank lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14765 calc_checksum
# For more information about the configuration files, take a look at: # For more information about the configuration files, take a look at:
# openocd.texi # openocd.texi

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@ -43,7 +43,7 @@ $_TARGETNAME configure -event reset-init {
# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader. # LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
# After reset the chip uses its internal 4MHz RC oscillator # After reset the chip uses its internal 4MHz RC oscillator
#flash bank lpc2000 <base> <size> 0 0 <target#> <variant> #flash bank lpc2000 <base> <size> 0 0 <target#> <variant>
flash bank lpc2000 0x0 0x0007D000 0 0 0 lpc2000_v2 4000 calc_checksum flash bank lpc2000 0x0 0x0007D000 0 0 $_TARGETNAME lpc2000_v2 4000 calc_checksum
# 4MHz / 6 = 666kHz, so use 500 # 4MHz / 6 = 666kHz, so use 500
jtag_khz 500 jtag_khz 500

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@ -43,7 +43,7 @@ $_TARGETNAME configure -event reset-init {
# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader. # LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
# After reset the chip uses its internal 4MHz RC oscillator. # After reset the chip uses its internal 4MHz RC oscillator.
# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum] # flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
flash bank lpc2000 0x0 0x7D000 0 0 0 lpc2000_v2 12000 calc_checksum flash bank lpc2000 0x0 0x7D000 0 0 $_TARGETNAME lpc2000_v2 12000 calc_checksum
# Try to use RCLK, if RCLK is not available use "normal" mode. 4MHz / 6 = 666kHz, so use 500. # Try to use RCLK, if RCLK is not available use "normal" mode. 4MHz / 6 = 666kHz, so use 500.
jtag_rclk 500 jtag_rclk 500

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@ -5,4 +5,4 @@
source [find target/samsung_s3c6410.cfg] source [find target/samsung_s3c6410.cfg]
flash bank cfi 0x00000000 0x00100000 2 2 0 jedec_probe flash bank cfi 0x00000000 0x00100000 2 2 $_TARGETNAME jedec_probe

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@ -62,7 +62,7 @@ target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNA
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
flash bank stm32x 0 0 0 0 0 flash bank stm32x 0 0 0 0 $_TARGETNAME
# For more information about the configuration files, take a look at: # For more information about the configuration files, take a look at:
# openocd.texi # openocd.texi

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@ -79,7 +79,7 @@ $_TARGETNAME configure -event reset-init {
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20010000 -work-area-size 0x8060 -work-area-backup 0 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20010000 -work-area-size 0x8060 -work-area-backup 0
flash bank cfi 0x50000000 0x400000 2 2 0 flash bank cfi 0x50000000 0x400000 2 2 $_TARGETNAME
init init
reset init reset init