target/riscv: Implement get_gdb_arch()

Change-Id: I5f4ab5243104df41031950682f688f2448a09b17
Signed-off-by: Jesse Sheridan <jesse.sheridan@gmail.com>
Reviewed-on: http://openocd.zylin.com/6322
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Jesse Sheridan 2021-06-16 10:38:00 -07:00 committed by Antonio Borneo
parent af39ee607c
commit 0ef5144c32
1 changed files with 13 additions and 0 deletions

View File

@ -1614,6 +1614,18 @@ static int riscv_write_memory(struct target *target, target_addr_t address,
return tt->write_memory(target, address, size, count, buffer);
}
const char *riscv_get_gdb_arch(struct target *target)
{
switch (riscv_xlen(target)) {
case 32:
return "riscv:rv32";
case 64:
return "riscv:rv64";
}
LOG_ERROR("Unsupported xlen: %d", riscv_xlen(target));
return NULL;
}
static int riscv_get_gdb_reg_list_internal(struct target *target,
struct reg **reg_list[], int *reg_list_size,
enum target_register_class reg_class, bool read)
@ -2848,6 +2860,7 @@ struct target_type riscv_target = {
.mmu = riscv_mmu,
.virt2phys = riscv_virt2phys,
.get_gdb_arch = riscv_get_gdb_arch,
.get_gdb_reg_list = riscv_get_gdb_reg_list,
.get_gdb_reg_list_noread = riscv_get_gdb_reg_list_noread,