From 1c22c5a82b248b7209fdc904e733b9fa29307c48 Mon Sep 17 00:00:00 2001 From: Marc Schink Date: Thu, 3 Mar 2022 20:35:10 +0100 Subject: [PATCH] flash/nor/efm32: Use Cortex-M 'core_info' field Change-Id: I5e477036e5cb7518c35df88878d53261311deb40 Signed-off-by: Marc Schink Reviewed-on: https://review.openocd.org/c/openocd/+/6868 Tested-by: jenkins Reviewed-by: Antonio Borneo --- src/flash/nor/efm32.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/src/flash/nor/efm32.c b/src/flash/nor/efm32.c index 653878ae7..2c5a5020e 100644 --- a/src/flash/nor/efm32.c +++ b/src/flash/nor/efm32.c @@ -257,23 +257,19 @@ static int efm32x_write_reg_u32(struct flash_bank *bank, target_addr_t offset, static int efm32x_read_info(struct flash_bank *bank) { int ret; - uint32_t cpuid = 0; struct efm32x_flash_chip *efm32x_info = bank->driver_priv; struct efm32_info *efm32_info = &(efm32x_info->info); memset(efm32_info, 0, sizeof(struct efm32_info)); - ret = target_read_u32(bank->target, CPUID, &cpuid); - if (ret != ERROR_OK) - return ret; + const struct cortex_m_common *cortex_m = target_to_cm(bank->target); - if (((cpuid >> 4) & 0xfff) == 0xc23) { - /* Cortex-M3 device */ - } else if (((cpuid >> 4) & 0xfff) == 0xc24) { - /* Cortex-M4 device (WONDER GECKO) */ - } else if (((cpuid >> 4) & 0xfff) == 0xc60) { - /* Cortex-M0+ device */ - } else { + switch (cortex_m->core_info->partno) { + case CORTEX_M3_PARTNO: + case CORTEX_M4_PARTNO: + case CORTEX_M0P_PARTNO: + break; + default: LOG_ERROR("Target is not Cortex-Mx Device"); return ERROR_FAIL; }