flash: add stm32f3x support
add support for the new stm32f3x family from stmicro: http://www.st.com/stm32f3 Change-Id: Icd1db95bb2767d9c0ecef24deefa92b4fdaa4f14 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/735 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This commit is contained in:
Spencer Oliver
Andreas Fritiofson
parent
07251ab8d8
commit
1df6e59178
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@ -830,6 +830,9 @@ static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id)
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} else if (((cpuid >> 4) & 0xFFF) == 0xC23) {
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/* 0xC23 is M3 devices */
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device_id_register = 0xE0042000;
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} else if (((cpuid >> 4) & 0xFFF) == 0xC24) {
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/* 0xC24 is M4 devices */
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device_id_register = 0xE0042000;
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} else {
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LOG_ERROR("Cannot identify target as a stm32x");
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return ERROR_FAIL;
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@ -858,6 +861,9 @@ static int stm32x_get_flash_size(struct flash_bank *bank, uint16_t *flash_size_i
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} else if (((cpuid >> 4) & 0xFFF) == 0xC23) {
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/* 0xC23 is M3 devices */
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flash_size_reg = 0x1FFFF7E0;
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} else if (((cpuid >> 4) & 0xFFF) == 0xC24) {
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/* 0xC24 is M4 devices */
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flash_size_reg = 0x1FFFF7CC;
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} else {
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LOG_ERROR("Cannot identify target as a stm32x");
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return ERROR_FAIL;
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@ -957,6 +963,17 @@ static int stm32x_probe(struct flash_bank *bank)
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LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 128k flash");
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flash_size_in_kb = 128;
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}
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} else if ((device_id & 0xfff) == 0x422) {
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/* stm32f30x - we have 2k pages
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* 2 pages for a protection area */
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page_size = 2048;
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stm32x_info->ppage_size = 2;
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/* check for early silicon */
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if (flash_size_in_kb == 0xffff) {
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LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 256k flash");
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flash_size_in_kb = 256;
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}
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} else if ((device_id & 0xfff) == 0x428) {
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/* value line High density - we have 2k pages
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* 4 pages for a protection area */
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@ -993,6 +1010,17 @@ static int stm32x_probe(struct flash_bank *bank)
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stm32x_info->register_base = FLASH_REG_BASE_B1;
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base_address = 0x08080000;
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}
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} else if ((device_id & 0xfff) == 0x432) {
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/* stm32f37x - we have 2k pages
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* 2 pages for a protection area */
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page_size = 2048;
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stm32x_info->ppage_size = 2;
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/* check for early silicon */
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if (flash_size_in_kb == 0xffff) {
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LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 256k flash");
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flash_size_in_kb = 256;
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}
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} else if ((device_id & 0xfff) == 0x440) {
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/* stm32f0x - we have 1k pages
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* 4 pages for a protection area */
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@ -1158,6 +1186,20 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
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snprintf(buf, buf_size, "Z");
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break;
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default:
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snprintf(buf, buf_size, "unknown");
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break;
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}
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} else if ((device_id & 0xfff) == 0x422) {
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printed = snprintf(buf, buf_size, "stm32f30x - Rev: ");
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buf += printed;
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buf_size -= printed;
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switch (device_id >> 16) {
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case 0x1000:
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snprintf(buf, buf_size, "1.0");
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break;
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default:
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snprintf(buf, buf_size, "unknown");
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break;
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@ -1190,6 +1232,20 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
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snprintf(buf, buf_size, "A");
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break;
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default:
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snprintf(buf, buf_size, "unknown");
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break;
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}
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} else if ((device_id & 0xfff) == 0x432) {
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printed = snprintf(buf, buf_size, "stm32f37x - Rev: ");
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buf += printed;
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buf_size -= printed;
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switch (device_id >> 16) {
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case 0x1000:
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snprintf(buf, buf_size, "1.0");
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break;
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default:
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snprintf(buf, buf_size, "unknown");
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break;
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@ -0,0 +1,63 @@
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# script for stm32f3x family
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME stm32f3x
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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# Work-area is a space in RAM used for flash programming
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# By default use 16kB
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x4000
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}
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# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
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#
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# Since we may be running of an RC oscilator, we crank down the speed a
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# bit more to be on the safe side. Perhaps superstition, but if are
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# running off a crystal, we can run closer to the limit. Note
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# that there can be a pretty wide band where things are more or less stable.
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adapter_khz 1000
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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#jtag scan chain
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# See STM Document RM0316
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# Section 29.6.3 - corresponds to Cortex-M4 r0p1
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set _CPUTAPID 0x4ba00477
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}
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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if { [info exists BSTAPID] } {
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set _BSTAPID $BSTAPID
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} else {
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# See STM Document RM0316
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# Section 29.6.2
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set _BSTAPID 0x06432041
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}
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jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
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# if srst is not fitted use SYSRESETREQ to
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# perform a soft reset
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cortex_m3 reset_config sysresetreq
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@ -0,0 +1,20 @@
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#
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# STM32f3x stlink pseudo target
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#
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if { [info exists CHIPNAME] == 0 } {
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set CHIPNAME stm32f3x
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}
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if { [info exists CPUTAPID] == 0 } {
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set CPUTAPID 0x1ba01477
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}
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if { [info exists WORKAREASIZE] == 0 } {
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set WORKAREASIZE 0x4000
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}
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source [find target/stm32_stlink.cfg]
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
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