target/cortex_a: add support for watchpoints
The current implementation of OpenOCD does not support watchpoints for cortex_a architecture. So, I replaced the add_watchpoint and remove_watchpoint with the specific implementation for the cortex a and using the breakpoint implementation and the arm documentation [1] as reference. In particular, I have made the following changes: * added the following functions - cortex_a_add_watchpoint This wrapper function check whether there are any watchpoint available on the target device by calling cortex_a_set_watchpoint. - cortex_a_set_watchpoint This function is responsible for settings the watchpoint register pair. In particular, it sets the WVR and the WCR registers with the cortex_a_dap command. - cortex_a_remove_watchpoint This wrapper function the selected watchpoint on the target device by calling cortex_a_unset_watchpoint. - cortex_a_unset_watchpoint This function sets both the WVR and the WCR registers to zero, thus unsetting the watchpoint. [1] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/BCGDHIEJ.html Change-Id: I86611dab474cb84836662af572b17636dc68e282 Signed-off-by: Chengyu Zheng <chengyu.zheng@polimi.it> Reviewed-on: http://openocd.zylin.com/3913 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Marc Schink <dev@zapb.de> Tested-by: jenkins
This commit is contained in:
Chengyu Zheng
Antonio Borneo
parent
b40dc09dd9
commit
1fb736f6c5
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@ -1088,9 +1088,11 @@ int arm_dpm_setup(struct arm_dpm *dpm)
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target->type->remove_breakpoint = dpm_remove_breakpoint;
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}
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/* watchpoint setup */
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target->type->add_watchpoint = dpm_add_watchpoint;
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target->type->remove_watchpoint = dpm_remove_watchpoint;
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/* watchpoint setup -- optional until it works everywhere */
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if (!target->type->add_watchpoint) {
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target->type->add_watchpoint = dpm_add_watchpoint;
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target->type->remove_watchpoint = dpm_remove_watchpoint;
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}
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/* FIXME add vector catch support */
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@ -570,8 +570,6 @@ int armv7a_arch_state(struct target *target)
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if (arm->core_mode == ARM_MODE_ABT)
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armv7a_show_fault_registers(target);
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if (target->debug_reason == DBG_REASON_WATCHPOINT)
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LOG_USER("Watchpoint triggered at PC " TARGET_ADDR_FMT, armv7a->dpm.wp_addr);
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return ERROR_OK;
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}
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@ -23,6 +23,9 @@
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* Copyright (C) 2013 Kamal Dasu *
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* kdasu.kdev@gmail.com *
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* *
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* Copyright (C) 2016 Chengyu Zheng *
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* chengyu.zheng@polimi.it : watchpoint support *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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@ -80,6 +83,16 @@ static int cortex_a_virt2phys(struct target *target,
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static int cortex_a_read_cpu_memory(struct target *target,
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uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
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static unsigned int ilog2(unsigned int x)
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{
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unsigned int y = 0;
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x /= 2;
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while (x) {
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++y;
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x /= 2;
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}
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return y;
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}
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/* restore cp15_control_reg at resume */
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static int cortex_a_restore_cp15_control_reg(struct target *target)
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@ -1658,6 +1671,161 @@ static int cortex_a_remove_breakpoint(struct target *target, struct breakpoint *
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return ERROR_OK;
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}
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/**
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* Sets a watchpoint for an Cortex-A target in one of the watchpoint units. It is
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* considered a bug to call this function when there are no available watchpoint
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* units.
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*
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* @param target Pointer to an Cortex-A target to set a watchpoint on
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* @param watchpoint Pointer to the watchpoint to be set
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* @return Error status if watchpoint set fails or the result of executing the
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* JTAG queue
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*/
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static int cortex_a_set_watchpoint(struct target *target, struct watchpoint *watchpoint)
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{
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int retval = ERROR_OK;
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int wrp_i = 0;
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uint32_t control;
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uint8_t address_mask = ilog2(watchpoint->length);
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uint8_t byte_address_select = 0xFF;
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uint8_t load_store_access_control = 0x3;
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struct cortex_a_common *cortex_a = target_to_cortex_a(target);
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struct armv7a_common *armv7a = &cortex_a->armv7a_common;
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struct cortex_a_wrp *wrp_list = cortex_a->wrp_list;
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if (watchpoint->set) {
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LOG_WARNING("watchpoint already set");
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return retval;
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}
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/* check available context WRPs */
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while (wrp_list[wrp_i].used && (wrp_i < cortex_a->wrp_num))
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wrp_i++;
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if (wrp_i >= cortex_a->wrp_num) {
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LOG_ERROR("ERROR Can not find free Watchpoint Register Pair");
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return ERROR_FAIL;
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}
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if (address_mask == 0x1 || address_mask == 0x2) {
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LOG_WARNING("length must be a power of 2 and different than 2 and 4");
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return ERROR_FAIL;
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}
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watchpoint->set = wrp_i + 1;
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control = (address_mask << 24) |
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(byte_address_select << 5) |
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(load_store_access_control << 3) |
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(0x3 << 1) | 1;
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wrp_list[wrp_i].used = 1;
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wrp_list[wrp_i].value = (watchpoint->address & 0xFFFFFFFC);
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wrp_list[wrp_i].control = control;
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retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
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+ CPUDBG_WVR_BASE + 4 * wrp_list[wrp_i].WRPn,
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wrp_list[wrp_i].value);
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if (retval != ERROR_OK)
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return retval;
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retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
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+ CPUDBG_WCR_BASE + 4 * wrp_list[wrp_i].WRPn,
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wrp_list[wrp_i].control);
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if (retval != ERROR_OK)
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return retval;
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LOG_DEBUG("wp %i control 0x%0" PRIx32 " value 0x%0" PRIx32, wrp_i,
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wrp_list[wrp_i].control,
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wrp_list[wrp_i].value);
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return ERROR_OK;
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}
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/**
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* Unset an existing watchpoint and clear the used watchpoint unit.
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*
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* @param target Pointer to the target to have the watchpoint removed
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* @param watchpoint Pointer to the watchpoint to be removed
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* @return Error status while trying to unset the watchpoint or the result of
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* executing the JTAG queue
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*/
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static int cortex_a_unset_watchpoint(struct target *target, struct watchpoint *watchpoint)
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{
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int retval;
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struct cortex_a_common *cortex_a = target_to_cortex_a(target);
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struct armv7a_common *armv7a = &cortex_a->armv7a_common;
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struct cortex_a_wrp *wrp_list = cortex_a->wrp_list;
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if (!watchpoint->set) {
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LOG_WARNING("watchpoint not set");
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return ERROR_OK;
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}
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int wrp_i = watchpoint->set - 1;
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if (wrp_i < 0 || wrp_i >= cortex_a->wrp_num) {
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LOG_DEBUG("Invalid WRP number in watchpoint");
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return ERROR_OK;
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}
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LOG_DEBUG("wrp %i control 0x%0" PRIx32 " value 0x%0" PRIx32, wrp_i,
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wrp_list[wrp_i].control, wrp_list[wrp_i].value);
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wrp_list[wrp_i].used = 0;
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wrp_list[wrp_i].value = 0;
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wrp_list[wrp_i].control = 0;
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retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
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+ CPUDBG_WCR_BASE + 4 * wrp_list[wrp_i].WRPn,
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wrp_list[wrp_i].control);
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if (retval != ERROR_OK)
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return retval;
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retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
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+ CPUDBG_WVR_BASE + 4 * wrp_list[wrp_i].WRPn,
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wrp_list[wrp_i].value);
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if (retval != ERROR_OK)
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return retval;
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watchpoint->set = 0;
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return ERROR_OK;
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}
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/**
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* Add a watchpoint to an Cortex-A target. If there are no watchpoint units
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* available, an error response is returned.
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*
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* @param target Pointer to the Cortex-A target to add a watchpoint to
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* @param watchpoint Pointer to the watchpoint to be added
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* @return Error status while trying to add the watchpoint
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*/
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static int cortex_a_add_watchpoint(struct target *target, struct watchpoint *watchpoint)
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{
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struct cortex_a_common *cortex_a = target_to_cortex_a(target);
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if (cortex_a->wrp_num_available < 1) {
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LOG_INFO("no hardware watchpoint available");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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cortex_a->wrp_num_available--;
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return cortex_a_set_watchpoint(target, watchpoint);
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}
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/**
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* Remove a watchpoint from an Cortex-A target. The watchpoint will be unset and
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* the used watchpoint unit will be reopened.
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*
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* @param target Pointer to the target to remove a watchpoint from
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* @param watchpoint Pointer to the watchpoint to be removed
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* @return Result of trying to unset the watchpoint
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*/
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static int cortex_a_remove_watchpoint(struct target *target, struct watchpoint *watchpoint)
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{
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struct cortex_a_common *cortex_a = target_to_cortex_a(target);
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if (watchpoint->set) {
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cortex_a->wrp_num_available++;
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cortex_a_unset_watchpoint(target, watchpoint);
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}
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return ERROR_OK;
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}
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/*
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* Cortex-A Reset functions
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*/
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@ -2837,6 +3005,20 @@ static int cortex_a_examine_first(struct target *target)
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LOG_DEBUG("Configured %i hw breakpoints", cortex_a->brp_num);
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/* Setup Watchpoint Register Pairs */
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cortex_a->wrp_num = ((didr >> 28) & 0x0F) + 1;
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cortex_a->wrp_num_available = cortex_a->brp_num;
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free(cortex_a->wrp_list);
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cortex_a->wrp_list = calloc(cortex_a->wrp_num, sizeof(struct cortex_a_wrp));
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for (i = 0; i < cortex_a->wrp_num; i++) {
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cortex_a->wrp_list[i].used = 0;
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cortex_a->wrp_list[i].value = 0;
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cortex_a->wrp_list[i].control = 0;
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cortex_a->wrp_list[i].WRPn = i;
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}
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LOG_DEBUG("Configured %i hw watchpoints", cortex_a->wrp_num);
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/* select debug_ap as default */
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swjdp->apsel = armv7a->debug_ap->ap_num;
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@ -3173,8 +3355,8 @@ struct target_type cortexa_target = {
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.add_context_breakpoint = cortex_a_add_context_breakpoint,
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.add_hybrid_breakpoint = cortex_a_add_hybrid_breakpoint,
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.remove_breakpoint = cortex_a_remove_breakpoint,
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.add_watchpoint = NULL,
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.remove_watchpoint = NULL,
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.add_watchpoint = cortex_a_add_watchpoint,
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.remove_watchpoint = cortex_a_remove_watchpoint,
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.commands = cortex_a_command_handlers,
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.target_create = cortex_a_target_create,
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@ -3250,8 +3432,8 @@ struct target_type cortexr4_target = {
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.add_context_breakpoint = cortex_a_add_context_breakpoint,
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.add_hybrid_breakpoint = cortex_a_add_hybrid_breakpoint,
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.remove_breakpoint = cortex_a_remove_breakpoint,
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.add_watchpoint = NULL,
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.remove_watchpoint = NULL,
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.add_watchpoint = cortex_a_add_watchpoint,
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.remove_watchpoint = cortex_a_remove_watchpoint,
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.commands = cortex_r4_command_handlers,
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.target_create = cortex_r4_target_create,
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@ -71,6 +71,13 @@ struct cortex_a_brp {
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uint8_t BRPn;
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};
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struct cortex_a_wrp {
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int used;
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uint32_t value;
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uint32_t control;
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uint8_t WRPn;
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};
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struct cortex_a_common {
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int common_magic;
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@ -92,6 +99,9 @@ struct cortex_a_common {
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int brp_num;
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int brp_num_available;
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struct cortex_a_brp *brp_list;
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int wrp_num;
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int wrp_num_available;
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struct cortex_a_wrp *wrp_list;
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uint32_t cpuid;
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uint32_t didr;
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