diff --git a/doc/openocd.texi b/doc/openocd.texi index 4b31cbd0f..a5b94362f 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -5035,6 +5035,19 @@ when reset disables PLLs needed to use a fast clock. @* After target hardware trace configuration was changed @end itemize +@quotation Note +OpenOCD events are not supposed to be preempt by another event, but this +is not enforced in current code. Only the target event @b{resumed} is +executed with polling disabled; this avoids polling to trigger the event +@b{halted}, reversing the logical order of execution of their handlers. +Future versions of OpenOCD will prevent the event preemption and will +disable the schedule of polling during the event execution. Do not rely +on polling in any event handler; this means, don't expect the status of +a core to change during the execution of the handler. The event handler +will have to enable polling or use @command{$target_name arp_poll} to +check if the core has changed status. +@end quotation + @node Flash Commands @chapter Flash Commands diff --git a/src/target/target.c b/src/target/target.c index 033fc0714..cab84b06b 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -637,7 +637,18 @@ int target_resume(struct target *target, int current, target_addr_t address, * we poll. The CPU can even halt at the current PC as a result of * a software breakpoint being inserted by (a bug?) the application. */ + /* + * resume() triggers the event 'resumed'. The execution of TCL commands + * in the event handler causes the polling of targets. If the target has + * already halted for a breakpoint, polling will run the 'halted' event + * handler before the pending 'resumed' handler. + * Disable polling during resume() to guarantee the execution of handlers + * in the correct order. + */ + bool save_poll = jtag_poll_get_enabled(); + jtag_poll_set_enabled(false); retval = target->type->resume(target, current, address, handle_breakpoints, debug_execution); + jtag_poll_set_enabled(save_poll); if (retval != ERROR_OK) return retval;