update 'flash bank' usage in scripts

Sets $_FLASHNAME to "$_CHIPNAME.flash" and passes it as the
first argument to 'flash bank'.
This commit is contained in:
Zachary T Welch 2009-11-18 02:15:52 -08:00
parent fd654c8a3e
commit 2dfa5e9c84
58 changed files with 138 additions and 69 deletions

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@ -10,4 +10,5 @@ reset_config trst_and_srst separate
# flash bank <driver> <base> <size> <chip_width> <bus_width>
# 29LV650 64Mbit Flash
flash bank cfi 0x00000000 0x800000 2 2 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x00000000 0x800000 2 2 0

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@ -9,4 +9,5 @@ jtag_nsrst_delay 800
reset_config trst_and_srst separate
# works for P30 flash
flash bank cfi 0x00000000 0x2000000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x00000000 0x2000000 2 2 $_TARGETNAME

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@ -4,7 +4,8 @@
source [find target/at91rm9200.cfg]
# boots from NOR on CS0: 8 MBytes CFI flash, 16-bit bus
flash bank cfi 0x10000000 0x00800000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x10000000 0x00800000 2 2 $_TARGETNAME
# ETM9 trace port connector present on this board, 16 data pins.
if { [info exists ETM_DRIVER] } {

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@ -122,4 +122,5 @@ $_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x1000 -work-a
#M29DW323DB - not working
#flash bank cfi <base> <size> <chip width> <bus width> <target#>
flash bank cfi 0x50000000 0x0400000 2 2 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x50000000 0x0400000 2 2 0

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@ -33,4 +33,5 @@ $_TARGETNAME configure -event reset-init {
#flash configuration
#flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...]
flash bank cfi 0x00000000 0x1000000 2 2 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x00000000 0x1000000 2 2 0

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@ -28,7 +28,8 @@ $_TARGETNAME configure -event reset-start {
}
# External 16-bit flash at chip select CS7 (SST39VF3201-70, 4 MiB)
flash bank cfi 0x5C000000 0x400000 2 2 $_TARGETNAME jedec_probe
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x5C000000 0x400000 2 2 $_TARGETNAME jedec_probe
$_TARGETNAME configure -event reset-init {

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@ -68,5 +68,7 @@ $_TARGETNAME configure -event reset-init {
$_TARGETNAME configure -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank str9x 0x00000000 0x00080000 0 0 0
flash bank str9x 0x00080000 0x00008000 0 0 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str9x 0x00000000 0x00080000 0 0 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str9x 0x00080000 0x00008000 0 0 0

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@ -12,8 +12,10 @@ jtag_ntrst_delay 250
# CS0, CS1 -- two banks of CFI flash, 32 MBytes each
# each bank is 32-bits wide, two 16-bit chips in parallel
flash bank cfi 0x00000000 0x02000000 2 4 $_TARGETNAME
flash bank cfi 0x04000000 0x02000000 2 4 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x00000000 0x02000000 2 4 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x04000000 0x02000000 2 4 $_TARGETNAME
# CS2 low -- FPGA registers
# CS2 high -- 1 MByte SRAM at 0x0a00.0000 ... last 64K for scratch

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@ -8,5 +8,7 @@ reset_config trst_and_srst separate
# Board configs can vary a *LOT* ... parts, jumpers, etc.
# This GP board boots from cs0 using NOR (2x32M), and also
# has 64M NAND on cs6.
flash bank cfi 0x04000000 0x02000000 2 2 $_TARGETNAME
flash bank cfi 0x06000000 0x02000000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x04000000 0x02000000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x06000000 0x02000000 2 2 $_TARGETNAME

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@ -19,8 +19,10 @@ etm_dummy config $_TARGETNAME
# standard boards populate two 16 MB chips, but manufacturing
# options or an expansion board could change this config.
flash bank cfi 0x00000000 0x01000000 2 2 $_TARGETNAME
flash bank cfi 0x01000000 0x01000000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x00000000 0x01000000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x01000000 0x01000000 2 2 $_TARGETNAME
proc osk5912_init {} {
omap5912_reset

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@ -13,7 +13,8 @@ source [find target/pxa255.cfg]
$_TARGETNAME configure -work-area-phys 0x4000000 -work-area-size 0x4000 -work-area-backup 0
# flash bank <driver> <base> <size> <chip_width> <bus_width> <target> [options]
flash bank cfi 0x00000000 0x80000 2 2 $_TARGETNAME jedec_probe
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x00000000 0x80000 2 2 $_TARGETNAME jedec_probe
proc pxa255_sst_init {} {
xscale cp15 15 0x00002001 #Enable CP0 and CP13 access

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@ -54,8 +54,10 @@ $_TARGETNAME configure -event reset-init {
}
#flash bank str9x <base> <size> 0 0 <target#> <variant>
flash bank str9x 0x00000000 0x00080000 0 0 0
flash bank str9x 0x00080000 0x00008000 0 0 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str9x 0x00000000 0x00080000 0 0 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str9x 0x00080000 0x00008000 0 0 0
# For more information about the configuration files, take a look at:
# openocd.texi

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@ -54,7 +54,8 @@ proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
# boots from NOR on CS0: 8 MBytes CFI flash, 16-bit bus
# it's really 16MB but the upper 8mb is controller via gpio
# openocd does not support 'complex reads/writes' to NOR
flash bank cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
# writing data to memory does not work without this
memwrite burst disable

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@ -115,4 +115,5 @@ arm7_9 dcc_downloads enable # Enable faster DCC downloads
#####################
#flash bank cfi <base> <size> <chip width> <bus width> <target#>
flash bank cfi 0x20000000 0x2000000 2 2 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x20000000 0x2000000 2 2 0

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@ -121,5 +121,6 @@ arm7_9 dcc_downloads enable # Enable faster DCC downloads
#####################
#flash bank cfi <base> <size> <chip width> <bus width> <target#>
flash bank cfi 0x20000000 0x1000000 2 2 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x20000000 0x1000000 2 2 0

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@ -91,6 +91,7 @@ $_TARGETNAME configure -event reset-init {
#####################
#flash bank cfi <base> <size> <chip width> <bus width> <target#>
flash bank cfi 0x10000000 0x01000000 2 2 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x10000000 0x01000000 2 2 0

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@ -8,7 +8,8 @@ $_TARGETNAME configure -event reset-init { x300t_init }
# 1MB CFI capable flash
# flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank cfi 0xac000000 0x100000 2 2 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0xac000000 0x100000 2 2 0
proc x300t_init { } {
# Setup SDRAM config and flash mapping

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@ -38,7 +38,8 @@ target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAM
arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable
flash bank ecosflash 0x01000000 0x200000 2 2 $_TARGETNAME ecos/at91eb40a.elf
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME ecosflash 0x01000000 0x200000 2 2 $_TARGETNAME ecos/at91eb40a.elf
$_TARGETNAME configure -event reset-init {
# Set up chip selects & timings
mww 0xFFE00000 0x0100273D

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@ -35,7 +35,8 @@ $_TARGETNAME configure -work-area-phys 0x10000 -work-area-size 0x2000
## flash configuration
# only target number is needed
flash bank aduc702x 0 0 0 0 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME aduc702x 0 0 0 0 0
## If you use the watchdog, the following code makes sure that the board
## doesn't reboot when halted via JTAG. Yes, on the older generation

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@ -42,7 +42,8 @@ arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable
#flash driver
flash bank ecosflash 0x01000000 0x200000 2 2 0 ecos/at91eb40a.elf
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME ecosflash 0x01000000 0x200000 2 2 0 ecos/at91eb40a.elf
# required for usable performance. Used for lots of
# other things than flash programming.

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@ -45,7 +45,8 @@ $_TARGETNAME configure -event gdb-flash-erase-start {
$_TARGETNAME configure -work-area-phys 0x3C000 -work-area-size 0x4000 -work-area-backup 0
flash bank cfi 0x10000000 0x400000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x10000000 0x400000 2 2 $_TARGETNAME
# For more information about the configuration files, take a look at:
# openocd.texi

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@ -2,6 +2,7 @@
source [find target/at91sam3uxx.cfg]
# size is automatically "calculated" by probing
flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME

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@ -2,6 +2,7 @@
source [find target/at91sam3uxx.cfg]
# size is automatically "calculated" by probing
flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME

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@ -2,6 +2,7 @@
source [find target/at91sam3uxx.cfg]
# size is automatically "calculated" by probing
flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME

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@ -2,6 +2,7 @@
source [find target/at91sam3uxx.cfg]
# size is automatically "calculated" by probing
flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME

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@ -2,8 +2,10 @@
source [find target/at91sam3uxx.cfg]
# size is automatically "calculated" by probing
flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME
# This is a 256K chip, it has the 2nd bank
flash bank at91sam3 0x000100000 0 1 1 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam3 0x000100000 0 1 1 $_TARGETNAME

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@ -2,8 +2,10 @@
source [find target/at91sam3uxx.cfg]
# size is automatically "calculated" by probing
flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME
# This is a 256K chip - it has the 2nd bank
flash bank at91sam3 0x000100000 0 1 1 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam3 0x000100000 0 1 1 $_TARGETNAME

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@ -49,7 +49,8 @@ $_TARGETNAME configure -event reset-init {
$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
#flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432
# For more information about the configuration files, take a look at:
# openocd.texi

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@ -55,7 +55,8 @@ $_TARGETNAME configure -event reset-deassert-post {at91sam_init}
# Flash configuration
#flash bank cfi <base> <size> <chip width> <bus width> <target#>
flash bank cfi 0x10000000 0x01000000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x10000000 0x01000000 2 2 $_TARGETNAME
proc at91sam_init { } {

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@ -28,4 +28,5 @@ target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
#flash configuration
#flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...]
flash bank cfi 0x60000000 0x1000000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x60000000 0x1000000 2 2 $_TARGETNAME

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@ -26,4 +26,5 @@ set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
#dummy flash driver
flash bank faux 0x01000000 0x200000 2 2 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME faux 0x01000000 0x200000 2 2 0

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@ -25,4 +25,5 @@ target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
#flash configuration
flash bank stellaris 0 0 0 0 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stellaris 0 0 0 0 $_TARGETNAME

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@ -25,4 +25,5 @@ target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
# flash configuration -- one bank of 128K
flash bank stellaris 0 0 0 0 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stellaris 0 0 0 0 $_TARGETNAME

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@ -34,4 +34,5 @@ target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
#flash configuration
flash bank stellaris 0 0 0 0 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stellaris 0 0 0 0 $_TARGETNAME

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@ -25,4 +25,5 @@ target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
#flash configuration
flash bank stellaris 0 0 0 0 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stellaris 0 0 0 0 $_TARGETNAME

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@ -29,4 +29,5 @@ target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x4000
#flash configuration
flash bank stellaris 0 0 0 0 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stellaris 0 0 0 0 $_TARGETNAME

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@ -44,7 +44,8 @@ $_TARGETNAME configure -event reset-init {
# LPC1768 has 512kB of user-available FLASH (bootloader is located in separate dedicated region).
# flash bank lpc1700 <base> <size> 0 0 <target#> <variant> <cclk> [calc_checksum]
flash bank lpc2000 0x0 0x80000 0 0 $_TARGETNAME lpc1700 12000 calc_checksum
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME lpc1700 12000 calc_checksum
# 4MHz / 6 = 666kHz, so use 500
jtag_khz 500

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@ -35,4 +35,5 @@ $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x2000 -work-a
# 32kB of internal Flash, core clocked with 12MHz crystal
# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum]
flash bank lpc2000 0x0 0x8000 0 0 $_TARGETNAME lpc2000_v2 12000 calc_checksum
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x8000 0 0 $_TARGETNAME lpc2000_v2 12000 calc_checksum

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@ -39,4 +39,5 @@ $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-a
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14745 calc_checksum
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14745 calc_checksum

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@ -38,4 +38,5 @@ target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAM
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14765 calc_checksum
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14765 calc_checksum

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@ -52,4 +52,5 @@ $_TARGETNAME configure -event reset-init {
}
# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum]
flash bank lpc2000 0x0 0x7d000 0 0 $_TARGETNAME lpc2000_v2 14765 calc_checksum
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x7d000 0 0 $_TARGETNAME lpc2000_v2 14765 calc_checksum

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@ -32,7 +32,8 @@ $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-a
#flash configuration
#flash bank lpc2000 <base> <size> 0 0 <target#> <variant>
flash bank lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14765 calc_checksum
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14765 calc_checksum
# For more information about the configuration files, take a look at:
# openocd.texi

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@ -43,7 +43,8 @@ $_TARGETNAME configure -event reset-init {
# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
# After reset the chip uses its internal 4MHz RC oscillator
#flash bank lpc2000 <base> <size> 0 0 <target#> <variant>
flash bank lpc2000 0x0 0x0007D000 0 0 $_TARGETNAME lpc2000_v2 4000 calc_checksum
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x0007D000 0 0 $_TARGETNAME lpc2000_v2 4000 calc_checksum
# 4MHz / 6 = 666kHz, so use 500
jtag_khz 500

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@ -43,7 +43,8 @@ $_TARGETNAME configure -event reset-init {
# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
# After reset the chip uses its internal 4MHz RC oscillator.
# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
flash bank lpc2000 0x0 0x7D000 0 0 $_TARGETNAME lpc2000_v2 12000 calc_checksum
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x7D000 0 0 $_TARGETNAME lpc2000_v2 12000 calc_checksum
# Try to use RCLK, if RCLK is not available use "normal" mode. 4MHz / 6 = 666kHz, so use 500.
jtag_rclk 500

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@ -62,4 +62,5 @@ arm7_9 dcc_downloads enable
# Flash bank configuration:
# Flash: flash bank lpc2900 0 0 0 0 <target#> <flash clock (CLK_SYS_FMC) in kHz>
# Flash base address, total flash size, and number of sectors are all configured automatically.
flash bank lpc2900 0 0 0 0 $_TARGETNAME $FLASH_CLOCK
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2900 0 0 0 0 $_TARGETNAME $FLASH_CLOCK

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@ -22,7 +22,8 @@ target create $_TARGETNAME avr -endian $_ENDIAN -chain-position $_TARGETNAME
#$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
flash bank avr 0 0 0 0 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME avr 0 0 0 0 0
#to use it, script will be like:
#init

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@ -33,8 +33,10 @@ target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAM
$_TARGETNAME configure -work-area-phys 0xa0000000 -work-area-size 16384 -work-area-backup 0
flash bank pic32mx 0xbd000000 0 0 0 0
flash bank pic32mx 0xbfc00000 0 0 0 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME pic32mx 0xbd000000 0 0 0 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME pic32mx 0xbfc00000 0 0 0 0
# For more information about the configuration files, take a look at:
# openocd.texi

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@ -35,5 +35,6 @@ target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAM
$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
#flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432

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@ -46,7 +46,8 @@ $_TARGETNAME configure -event reset-init {
$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
#flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432
# For more information about the configuration files, take a look at:
# openocd.texi

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@ -5,4 +5,5 @@
source [find target/samsung_s3c6410.cfg]
flash bank cfi 0x00000000 0x00100000 2 2 $_TARGETNAME jedec_probe
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x00000000 0x00100000 2 2 $_TARGETNAME jedec_probe

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@ -62,7 +62,8 @@ target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNA
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
flash bank stm32x 0 0 0 0 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32x 0 0 0 0 $_TARGETNAME
# For more information about the configuration files, take a look at:
# openocd.texi

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@ -39,8 +39,10 @@ $_TARGETNAME configure -event gdb-flash-erase-start {
$_TARGETNAME configure -work-area-phys 0x2000C000 -work-area-size 0x4000 -work-area-backup 0
#flash bank str7x <base> <size> 0 0 <target#> <variant>
flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x
flash bank str7x 0x400C0000 0x00004000 0 0 0 STR71x
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str7x 0x40000000 0x00040000 0 0 0 STR71x
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str7x 0x400C0000 0x00004000 0 0 0 STR71x
# For more information about the configuration files, take a look at:
# openocd.texi

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@ -42,5 +42,6 @@ $_TARGETNAME configure -event gdb-flash-erase-start {
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank str7x 0x20000000 0x00040000 0 0 0 STR3x
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str7x 0x20000000 0x00040000 0 0 0 STR3x

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@ -45,6 +45,8 @@ $_TARGETNAME configure -event gdb-flash-erase-start {
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank str7x 0x20000000 0x00040000 0 0 0 STR75x
flash bank str7x 0x200C0000 0x00004000 0 0 0 STR75x
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str7x 0x20000000 0x00040000 0 0 0 STR75x
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str7x 0x200C0000 0x00004000 0 0 0 STR75x

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@ -63,8 +63,10 @@ $_TARGETNAME configure -event reset-init {
$_TARGETNAME configure -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0
#flash bank str9x <base> <size> 0 0 <target#> <variant>
flash bank str9x 0x00000000 0x00080000 0 0 0
flash bank str9x 0x00080000 0x00008000 0 0 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str9x 0x00000000 0x00080000 0 0 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str9x 0x00080000 0x00008000 0 0 0
# For more information about the configuration files, take a look at:
# openocd.texi

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@ -54,7 +54,8 @@ proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
# boots from NOR on CS0: 8 MBytes CFI flash, 16-bit bus
# it's really 16MB but the upper 8mb is controller via gpio
# openocd does not support 'complex reads/writes' to NOR
flash bank cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
# writing data to memory does not work without this
memwrite burst disable

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@ -79,7 +79,8 @@ $_TARGETNAME configure -event reset-init {
$_TARGETNAME configure -work-area-phys 0x20010000 -work-area-size 0x8060 -work-area-backup 0
flash bank cfi 0x50000000 0x400000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x50000000 0x400000 2 2 $_TARGETNAME
init
reset init

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@ -25,5 +25,6 @@ mvb 0xE01FC040 0x01
flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765