TCL: Add board file for EVAL_SPEAr320CPU

Initial support for SPEAr320 chip and for evaluation
board named EVAL_SPEAr320CPU.

Change-Id: I85524655769bcc610294a26db47a7a399256fbb7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/231
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This commit is contained in:
Antonio Borneo 2011-11-18 13:10:00 +08:00 committed by Spencer Oliver
parent c8f4d82b45
commit 3291edf1e7
3 changed files with 76 additions and 0 deletions

44
tcl/board/spear320cpu.cfg Normal file
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@ -0,0 +1,44 @@
# Configuration for the ST SPEAr320 CPU board
# EVAL_SPEAr320CPU Rev. 2.0
# http://www.st.com/spear
#
# Date: 2011-11-18
# Author: Antonio Borneo <borneo.antonio@gmail.com>
# The standard board has JTAG SRST not connected.
# This script targets such boards using quirky code to bypass the issue.
source [find mem_helper.tcl]
source [find target/spear3xx.cfg]
source [find chip/st/spear/spear3xx_ddr.tcl]
source [find chip/st/spear/spear3xx.tcl]
arm7_9 dcc_downloads enable
arm7_9 fast_memory_access enable
# Serial NOR on SMI CS0. 8Mbyte.
set _FLASHNAME1 $_CHIPNAME.snor
flash bank $_FLASHNAME1 stmsmi 0xf8000000 0 0 0 $_TARGETNAME
if { [info exists BOARD_HAS_SRST] } {
# Modified board has SRST on JTAG connector
reset_config trst_and_srst separate srst_gates_jtag \
trst_push_pull srst_open_drain
} else {
# Standard board has no SRST on JTAG connector
reset_config trst_only separate srst_gates_jtag trst_push_pull
source [find chip/st/spear/quirk_no_srst.tcl]
}
$_TARGETNAME configure -event reset-init { spear320cpu_init }
proc spear320cpu_init {} {
reg pc 0xffff0020; # loop forever
sp3xx_clock_default
sp3xx_common_init
sp3xx_ddr_init "mt47h64m16_3_333_cl5_async" $DDR_CHIPS
sp320_init
}

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# Configuration for the ST SPEAr320 Evaluation board
# EVAL_SPEAr320CPU Rev. 2.0, modified to enable SRST on JTAG connector
# http://www.st.com/spear
#
# List of board modifications to enable SRST, as reported in
# ST Application Note (FIXME: add reference).
# - Modifications on the bottom layer:
# 1. replace reset chip U7 with a STM6315SDW13F;
# 2. add 0 ohm resistor R45. It is located close to JTAG connector.
# 3. add a 10K ohm pull-up resistor on the reset wire named as
# POWERGOOD in the schematic.
#
# The easier way to do modification 3, is to use a resistor in package
# 0603 or 0402 and solder it between R15 and R45:
# - one pad soldered with the pad of R15 connected to 3.3V (this
# is the pad of R15 closer to R45)
# - the other pad soldered with the nearest pad of R45.
#
# Date: 2011-11-18
# Author: Antonio Borneo <borneo.antonio@gmail.com>
# Modified boards has SRST on JTAG connector
set BOARD_HAS_SRST 1
source [find board/spear320evb.cfg]

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@ -120,3 +120,10 @@ proc sp310_emi_init {} {
mww 0x4f000014 0x0000000e ;# control_0_reg
mww 0x4f000094 0x0000003f ;# ack_reg
}
# Specific init scripts for ST SPEAr320
proc sp320_init {} {
mww 0xb300000c 0xffffac04 ;# RAS function enable
mww 0xb3000010 0x00000001 ;# RAS mode select
}