flash: New driver for XMC4xxx microcontroller family
This is a complete flash driver for the Infineon XMC4xxx family of microcontrollers, based on the TMS570 driver by Andrey Yurovsky. The driver attempts to discover the particular variant of MCU via a combination of the SCU register (to determine if this is indeed an XMC4xxx part) and the FLASH0_ID register (to determine the variant). If this fails, the driver will not load. The driver has been added to the README and documentation. Tests: * Hardware: XMC4500 (XMC4500_relax), XMC4200 (XMC4200 enterprise) * SWD + JTAG * Binary: 144k, 1M Note: * Flash protect only partly tested. These parts only allow the flash protection registers (UCB) to be written 4 times total, and my devkits have run out of uses (more on the way) Future Work: * User 1/2(permalock) locking support via custom command * In-memory flash loader bootstrap (flashing is rather slow...) Change-Id: I1d3345d5255d8de8dc4175cf987eb4a037a8cf7f Signed-off-by: Jeff Ciesielski <jeffciesielski@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/2488 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This commit is contained in:
Jeff Ciesielski
Freddie Chopin
parent
42c24acebd
commit
33b048d456
2
README
2
README
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@ -130,7 +130,7 @@ ADUC702x, AT91SAM, AVR, CFI, DSP5680xx, EFM32, EM357, FM3, Kinetis,
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LPC8xx/LPC1xxx/LPC2xxx/LPC541xx, LPC2900, LPCSPIFI, Marvell QSPI,
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Milandr, NuMicro, PIC32mx, PSoC4, SiM3x, Stellaris, STM32, STMSMI,
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STR7x, STR9x, nRF51; NAND controllers of AT91SAM9, LPC3180, LPC32xx,
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i.MX31, MXC, NUC910, Orion/Kirkwood, S3C24xx, S3C6400.
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i.MX31, MXC, NUC910, Orion/Kirkwood, S3C24xx, S3C6400, XMC4xxx.
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==================
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@ -0,0 +1,45 @@
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/***************************************************************************
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* Copyright (C) 2014 by Jeff Ciesielski *
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* jeffciesielski@gmail.com *
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* *
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* Based on the armv7m erase checker by: *
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* Copyright (C) 2010 by Spencer Oliver *
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* spen@spen-soft.co.uk *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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***************************************************************************/
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/*
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parameters:
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r0 - address in
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r1 - byte count
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r2 - mask - result out
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*/
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.text
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.syntax unified
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.cpu cortex-m0
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.thumb
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.thumb_func
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.align 2
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loop:
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ldrb r3, [r0]
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adds r0, #1
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orrs r2, r2, r3
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subs r1, r1, #1
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bne loop
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end:
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bkpt #0
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.end
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@ -5777,6 +5777,22 @@ the flash clock.
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@end deffn
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@end deffn
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@deffn {Flash Driver} xmc4xxx
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All members of the XMC4xxx microcontroller family from Infineon.
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This driver does not require the chip and bus width to be specified.
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Some xmc4xxx-specific commands are defined:
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@deffn Command {xmc4xxx flash_password} bank_id passwd1 passwd2
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Saves flash protection passwords which are used to lock the user flash
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@end deffn
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@deffn Command {xmc4xxx flash_unprotect} bank_id user_level[0-1]
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Removes Flash write protection from the selected user bank
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@end deffn
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@end deffn
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@section NAND Flash Commands
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@cindex NAND
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@ -49,7 +49,8 @@ NOR_DRIVERS = \
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nrf51.c \
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mrvlqspi.c \
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psoc4.c \
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sim3x.c
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sim3x.c \
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xmc4xxx.c
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noinst_HEADERS = \
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core.h \
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@ -62,6 +62,7 @@ extern struct flash_driver mrvlqspi_flash;
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extern struct flash_driver psoc4_flash;
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extern struct flash_driver sim3x_flash;
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extern struct flash_driver jtagspi_flash;
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extern struct flash_driver xmc4xxx_flash;
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/**
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* The list of built-in flash drivers.
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@ -108,6 +109,7 @@ static struct flash_driver *flash_drivers[] = {
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&psoc4_flash,
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&sim3x_flash,
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&jtagspi_flash,
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&xmc4xxx_flash,
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NULL,
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};
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File diff suppressed because it is too large
Load Diff
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@ -39,6 +39,19 @@ swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPU_TAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
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# Work-area is a space in RAM used for flash programming
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# By default use 16 kB
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x1000
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}
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME xmc4xxx 0x0C000000 0 0 0 $_TARGETNAME
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if { ![using_hla] } {
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cortex_m reset_config sysresetreq
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}
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