diff --git a/tcl/target/renesas_rcar_gen2.cfg b/tcl/target/renesas_rcar_gen2.cfg
new file mode 100644
index 000000000..9f7421d91
--- /dev/null
+++ b/tcl/target/renesas_rcar_gen2.cfg
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+# Renesas R-Car Generation 2 SOCs
+# - There are a combination of Cortex-A15s and Cortex-A7s for each Gen2 SOC
+# - Each SOC can boot through any of the, up to 2, core types that it has
+#   e.g. H2 can boot through Cortex-A15 or Cortex-A7
+
+# Supported Gen2 SOCs and their cores:
+# H2:  Cortex-A15 x 4, Cortex-A7 x 4
+# M2:  Cortex-A15 x 2
+# V2H: Cortex-A15 x 2
+# M2N: Cortex-A15 x 2
+# E2:                  Cortex-A7 x 2
+
+# Usage:
+# There are 2 configuration options:
+# SOC:       Selects the supported SOC. (Default 'H2')
+# BOOT_CORE: Selects the booting core. 'CA15', or 'CA7'
+#            Defaults to 'CA15' if the SOC has one, else defaults to 'CA7'
+
+if { [info exists SOC] } {
+	set _soc $SOC
+} else {
+	set _soc H2
+}
+
+# Set configuration for each SOC and the default 'BOOT_CORE'
+switch $_soc {
+	H2 {
+		set _CHIPNAME r8a7790
+		set _num_ca15 4
+		set _num_ca7 4
+		set _boot_core CA15
+	}
+	M2 {
+		set _CHIPNAME r8a7791
+		set _num_ca15 2
+		set _num_ca7 0
+		set _boot_core CA15
+	}
+	V2H {
+		set _CHIPNAME r8a7792
+		set _num_ca15 2
+		set _num_ca7 0
+		set _boot_core CA15
+	}
+	M2N {
+		set _CHIPNAME r8a7793
+		set _num_ca15 2
+		set _num_ca7 0
+		set _boot_core CA15
+	}
+	E2 {
+		set _CHIPNAME r8a7794
+		set _num_ca15 0
+		set _num_ca7 2
+		set _boot_core CA7
+	}
+	default {
+		error "'$_soc' is invalid!"
+	}
+}
+
+# If configured, override the default 'CHIPNAME'
+if { [info exists CHIPNAME] } {
+	set _CHIPNAME $CHIPNAME
+}
+
+# If configured, override the default 'BOOT_CORE'
+if { [info exists BOOT_CORE] } {
+	set _boot_core $BOOT_CORE
+}
+
+if { [info exists DAP_TAPID] } {
+	set _DAP_TAPID $DAP_TAPID
+} else {
+	set _DAP_TAPID 0x4ba00477
+}
+
+echo "\t$_soc - $_num_ca15 CA15(s), $_num_ca7 CA7(s)"
+echo "\tBoot Core - $_boot_core\n"
+
+set _DAPNAME $_CHIPNAME.dap
+
+# TAP and DAP
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f -expected-id $_DAP_TAPID
+dap create $_DAPNAME -chain-position $_CHIPNAME.cpu
+
+set CA15_DBGBASE {0x800B0000 0x800B2000 0x800B4000 0x800B6000}
+set CA7_DBGBASE  {0x800F0000 0x800F2000 0x800F4000 0x800F6000}
+
+set smp_targets ""
+
+proc setup_ca {core_name dbgbase num boot} {
+	global _CHIPNAME
+	global _DAPNAME
+	global smp_targets
+	for { set _core 0 } { $_core < $num } { incr _core } {
+		set _TARGETNAME $_CHIPNAME.$core_name.$_core
+		set _CTINAME $_TARGETNAME.cti
+		set _command "target create $_TARGETNAME cortex_a -dap $_DAPNAME \
+			-coreid $_core -dbgbase [lindex $dbgbase $_core]"
+		if { $_core == 0  && $boot == 1 } {
+			set _targets "$_TARGETNAME"
+		} else {
+			set _command "$_command -defer-examine"
+		}
+		set smp_targets "$smp_targets $_TARGETNAME"
+		eval $_command
+	}
+}
+
+# Organize target list based on the boot core
+if { [string equal $_boot_core CA15] } {
+	setup_ca a15 $CA15_DBGBASE $_num_ca15 1
+	setup_ca a7  $CA7_DBGBASE  $_num_ca7 0
+} elseif { [string equal $_boot_core CA7] } {
+	setup_ca a7  $CA7_DBGBASE  $_num_ca7 1
+	setup_ca a15 $CA15_DBGBASE $_num_ca15 0
+} else {
+	setup_ca a15 $CA15_DBGBASE $_num_ca15 0
+	setup_ca a7  $CA7_DBGBASE  $_num_ca7 0
+}
+
+eval "target smp $smp_targets"