Zach Welch <zw@superlucidity.net> fix -Werror warnings
git-svn-id: svn://svn.berlios.de/openocd/trunk@1472 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
oharboe
parent
7989000e09
commit
40580e2d71
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@ -55,7 +55,7 @@ const unsigned char bit_reverse_table256[] =
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u8* buf_cpy(u8 *from, u8 *to, int size)
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{
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int num_bytes = CEIL(size, 8);
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unsigned int num_bytes = CEIL(size, 8);
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unsigned int i;
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if (from == NULL)
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@ -244,7 +244,7 @@ char* buf_to_str(const u8 *buf, int buf_len, int radix)
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int str_to_buf(const char *str, int str_len, u8 *buf, int buf_len, int radix)
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{
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char *charbuf;
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u32 tmp;
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char tmp;
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float factor;
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u8 *b256_buf;
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int b256_len;
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@ -1758,7 +1758,7 @@ static int jtag_tap_configure_cmd( Jim_GetOptInfo *goi, jtag_tap_t * tap)
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jteap = tap->event_action;
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/* replace existing? */
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while (jteap) {
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if (jteap->event == n->value) {
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if (jteap->event == (enum jtag_tap_event)n->value) {
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break;
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}
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jteap = jteap->next;
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@ -268,7 +268,7 @@ ep1_memory_write(
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USB_TIMEOUT_MS
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);
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if(usb_ret < sizeof(usb_buffer)) {
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if((size_t)usb_ret < sizeof(usb_buffer)) {
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break;
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}
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@ -363,7 +363,7 @@ dtc_load_from_buffer(
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buffer += sizeof(*header);
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length -= sizeof(*header);
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if(length < header->length + 1) {
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if(length < (size_t)header->length + 1) {
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LOG_ERROR("Malformed DTC image\n");
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exit(1);
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}
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@ -605,8 +605,8 @@ static
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struct {
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dtc_reply_queue_entry_t *rq_head;
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dtc_reply_queue_entry_t *rq_tail;
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int cmd_index;
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int reply_index;
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u32 cmd_index;
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u32 reply_index;
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u8 cmd_buffer[USB_EP2BANK_SIZE];
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} dtc_queue;
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@ -617,7 +617,7 @@ struct {
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static
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struct {
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int length;
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u32 length;
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u32 buffer;
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} tap_state_queue;
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@ -161,7 +161,7 @@ int virtex2_load(struct pld_device_s *pld_device, char *filename)
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virtex2_pld_device_t *virtex2_info = pld_device->driver_priv;
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xilinx_bit_file_t bit_file;
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int retval;
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int i;
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unsigned int i;
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scan_field_t field;
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@ -40,7 +40,7 @@
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int read_section(FILE *input_file, int length_size, char section, u32 *buffer_length, u8 **buffer)
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{
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u8 length_buffer[4];
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u32 length;
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int length;
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char section_char;
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int read_count;
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@ -348,7 +348,7 @@ int gdb_put_packet_inner(connection_t *connection, char *buffer, int len)
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char local_buffer[1024];
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local_buffer[0] = '$';
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if (len+4 <= sizeof(local_buffer))
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if ((size_t)len + 4 <= sizeof(local_buffer))
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{
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/* performance gain on smaller packets by only a single call to gdb_write() */
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memcpy(local_buffer+1, buffer, len++);
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@ -1213,7 +1213,7 @@ int gdb_read_memory_packet(connection_t *connection, target_t *target, char *pac
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{
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hex_buffer = malloc(len * 2 + 1);
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int i;
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u32 i;
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for (i = 0; i < len; i++)
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{
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u8 t = buffer[i];
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@ -1243,7 +1243,7 @@ int gdb_write_memory_packet(connection_t *connection, target_t *target, char *pa
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u8 *buffer;
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int i;
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u32 i;
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int retval;
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/* skip command character */
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@ -1540,12 +1540,12 @@ static int decode_xfer_read(char *buf, char **annex, int *ofs, unsigned int *len
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int gdb_calc_blocksize(flash_bank_t *bank)
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{
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int i;
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int block_size = 0xffffffff;
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u32 i;
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u32 block_size = 0xffffffff;
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/* loop through all sectors and return smallest sector size */
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for (i = 0; i < bank->num_sectors; i++)
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for (i = 0; i < (u32)bank->num_sectors; i++)
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{
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if (bank->sectors[i].size < block_size)
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block_size = bank->sectors[i].size;
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@ -103,7 +103,7 @@ const char *svf_trst_mode_name[4] =
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"ABSENT"
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};
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char *svf_tap_state_name[16];
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char *svf_tap_state_name[TAP_NUM_STATES];
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#define XXR_TDI (1 << 0)
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#define XXR_TDO (1 << 1)
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@ -316,7 +316,7 @@ static int handle_svf_command(struct command_context_s *cmd_ctx, char *cmd, char
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svf_buffer_size = 2 * SVF_MAX_BUFFER_SIZE_TO_COMMIT;
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memcpy(&svf_para, &svf_para_init, sizeof(svf_para));
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for (i = 0; i < dimof(svf_tap_state_name); i++)
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for (i = 0; i < (int)dimof(svf_tap_state_name); i++)
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{
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svf_tap_state_name[i] = (char *)tap_state_name(i);
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}
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@ -515,7 +515,7 @@ static int svf_tap_state_is_stable(tap_state_t state)
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static int svf_tap_state_is_valid(tap_state_t state)
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{
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return ((state >= 0) && (state < sizeof(svf_tap_state_name)));
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return state >= 0 && state < TAP_NUM_STATES;
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}
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static int svf_find_string_in_array(char *str, char **strs, int num_of_element)
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@ -32,7 +32,7 @@
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typedef struct arm720t_common_s
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{
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int common_magic;
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u32 common_magic;
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armv4_5_mmu_common_t armv4_5_mmu;
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arm7tdmi_common_t arm7tdmi_common;
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u32 cp15_control_reg;
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@ -655,7 +655,8 @@ int arm7_9_target_request_data(target_t *target, u32 size, u8 *buffer)
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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u32 *data;
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int i, retval = ERROR_OK;
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int retval = ERROR_OK;
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u32 i;
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data = malloc(size * (sizeof(u32)));
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@ -1956,7 +1957,7 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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u32 reg[16];
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int num_accesses = 0;
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u32 num_accesses = 0;
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int thisrun_accesses;
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int i;
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u32 cpsr;
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@ -2133,7 +2134,7 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
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reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
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u32 reg[16];
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int num_accesses = 0;
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u32 num_accesses = 0;
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int thisrun_accesses;
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int i;
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u32 cpsr;
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@ -2466,7 +2467,7 @@ int arm7_9_checksum_memory(struct target_s *target, u32 address, u32 count, u32*
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0x04C11DB7 /* CRC32XOR: .word 0x04C11DB7 */
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};
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int i;
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u32 i;
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if (target_alloc_working_area(target, sizeof(arm7_9_crc_code), &crc_algorithm) != ERROR_OK)
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{
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@ -2518,7 +2519,7 @@ int arm7_9_blank_check_memory(struct target_s *target, u32 address, u32 count, u
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reg_param_t reg_params[3];
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armv4_5_algorithm_t armv4_5_info;
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int retval;
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int i;
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u32 i;
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u32 erase_check_code[] =
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{
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@ -40,7 +40,7 @@
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typedef struct arm7_9_common_s
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{
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int common_magic;
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u32 common_magic;
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arm_jtag_t jtag_info;
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reg_cache_t *eice_cache;
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@ -32,7 +32,7 @@
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typedef struct arm920t_common_s
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{
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int common_magic;
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u32 common_magic;
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armv4_5_mmu_common_t armv4_5_mmu;
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arm9tdmi_common_t arm9tdmi_common;
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u32 cp15_control_reg;
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@ -32,7 +32,7 @@
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typedef struct arm926ejs_common_s
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{
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int common_magic;
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u32 common_magic;
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armv4_5_mmu_common_t armv4_5_mmu;
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arm9tdmi_common_t arm9tdmi_common;
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int (*read_cp15)(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u32 *value);
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@ -30,9 +30,9 @@ typedef struct arm_jtag_s
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{
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jtag_tap_t *tap;
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int scann_size;
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u32 scann_size;
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u32 scann_instr;
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int cur_scan_chain;
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u32 cur_scan_chain;
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u32 intest_instr;
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} arm_jtag_t;
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@ -231,7 +231,7 @@ int armv4_5_set_core_reg(reg_t *reg, u8 *buf)
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}
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}
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if (armv4_5_target->core_mode != (value & 0x1f))
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if (armv4_5_target->core_mode != (enum armv4_5_mode)(value & 0x1f))
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{
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LOG_DEBUG("changing ARM core mode to '%s'", armv4_5_mode_strings[armv4_5_mode_to_number(value & 0x1f)]);
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armv4_5_target->core_mode = value & 0x1f;
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@ -591,7 +591,7 @@ int armv7m_checksum_memory(struct target_s *target, u32 address, u32 count, u32*
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0x1DB7, 0x04C1 /* CRC32XOR: .word 0x04C11DB7 */
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};
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int i;
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u32 i;
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if (target_alloc_working_area(target, sizeof(cortex_m3_crc_code), &crc_algorithm) != ERROR_OK)
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{
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@ -640,7 +640,7 @@ int armv7m_blank_check_memory(struct target_s *target, u32 address, u32 count, u
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reg_param_t reg_params[3];
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armv7m_algorithm_t armv7m_info;
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int retval;
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int i;
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u32 i;
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u16 erase_check_code[] =
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{
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@ -1475,7 +1475,7 @@ int cortex_m3_target_request_data(target_t *target, u32 size, u8 *buffer)
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swjdp_common_t *swjdp = &cortex_m3->swjdp_info;
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u8 data;
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u8 ctrl;
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int i;
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u32 i;
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for (i = 0; i < (size * 4); i++)
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{
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@ -484,7 +484,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
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u8 field1_out[1];
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u8 field2_out[1];
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int retval;
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int hsact;
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u32 hsact;
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struct timeval lap;
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struct timeval now;
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@ -544,7 +544,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
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gettimeofday(&now, NULL);
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}
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while ((now.tv_sec-lap.tv_sec)*1000 + (now.tv_usec-lap.tv_usec)/1000 <= timeout);
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while ((u32)((now.tv_sec-lap.tv_sec)*1000 + (now.tv_usec-lap.tv_usec)/1000) <= timeout);
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return ERROR_TARGET_TIMEOUT;
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}
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@ -453,7 +453,7 @@ int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char
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arm7_9->etm_ctx->capture_driver_priv = etb;
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etb->tap = tap;
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etb->cur_scan_chain = -1;
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etb->cur_scan_chain = ~0UL;
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etb->reg_cache = NULL;
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etb->ram_width = 0;
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etb->ram_depth = 0;
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@ -46,17 +46,17 @@ typedef struct etb_s
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{
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etm_context_t *etm_ctx;
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jtag_tap_t *tap;
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int cur_scan_chain;
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u32 cur_scan_chain;
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reg_cache_t *reg_cache;
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/* ETB parameters */
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int ram_depth;
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int ram_width;
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u32 ram_depth;
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u32 ram_width;
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} etb_t;
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typedef struct etb_reg_s
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{
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int addr;
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u32 addr;
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etb_t *etb;
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} etb_reg_t;
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@ -647,7 +647,7 @@ int etmv1_branch_address(etm_context_t *ctx)
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u8 packet;
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int shift = 0;
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int apo;
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int i;
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u32 i;
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/* quit analysis if less than two cycles are left in the trace
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* because we can't extract the APO */
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@ -998,7 +998,7 @@ int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx)
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if (((instruction.type == ARM_B) ||
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(instruction.type == ARM_BL) ||
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(instruction.type == ARM_BLX)) &&
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(instruction.info.b_bl_bx_blx.target_address != -1))
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(instruction.info.b_bl_bx_blx.target_address != ~0UL))
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{
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next_pc = instruction.info.b_bl_bx_blx.target_address;
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}
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@ -1543,7 +1543,7 @@ int handle_etm_dump_command(struct command_context_s *cmd_ctx, char *cmd, char *
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armv4_5_common_t *armv4_5;
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arm7_9_common_t *arm7_9;
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etm_context_t *etm_ctx;
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int i;
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u32 i;
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if (argc != 1)
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{
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@ -1611,7 +1611,7 @@ int handle_etm_load_command(struct command_context_s *cmd_ctx, char *cmd, char *
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armv4_5_common_t *armv4_5;
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arm7_9_common_t *arm7_9;
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etm_context_t *etm_ctx;
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int i;
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u32 i;
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if (argc != 1)
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{
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@ -517,7 +517,7 @@ int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buf
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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enum armv4_5_state core_state = armv4_5->core_state;
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u32 x, flip, shift, save[7];
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int i;
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u32 i;
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/*
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* We can't use the dcc flow control bits, so let's transfer data
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@ -547,7 +547,7 @@ int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buf
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0xeafffff3, /* b 3b */
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};
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int dcc_size = sizeof(dcc_code);
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u32 dcc_size = sizeof(dcc_code);
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if (!arm7_9->dcc_downloads)
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return target->type->write_memory(target, address, 4, count, buffer);
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@ -47,7 +47,7 @@ typedef struct mips32_comparator_s
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typedef struct mips32_common_s
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{
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int common_magic;
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u32 common_magic;
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void *arch_info;
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reg_cache_t *core_cache;
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mips_ejtag_t ejtag_info;
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@ -40,7 +40,7 @@ int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, in_handler_t h
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if (tap==NULL)
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return ERROR_FAIL;
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if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
|
||||
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (u32)new_instr)
|
||||
{
|
||||
scan_field_t field;
|
||||
u8 t[4];
|
||||
|
|
|
|||
|
|
@ -78,7 +78,8 @@ int oocd_trace_write_reg(oocd_trace_t *oocd_trace, int reg, u32 value)
|
|||
|
||||
int oocd_trace_read_memory(oocd_trace_t *oocd_trace, u8 *data, u32 address, u32 size)
|
||||
{
|
||||
size_t bytes_written, bytes_read, bytes_to_read;
|
||||
size_t bytes_written, bytes_to_read;
|
||||
ssize_t bytes_read;
|
||||
u8 cmd;
|
||||
|
||||
oocd_trace_write_reg(oocd_trace, OOCD_TRACE_ADDRESS, address);
|
||||
|
|
@ -188,7 +189,7 @@ int oocd_trace_read_trace(etm_context_t *etm_ctx)
|
|||
u32 first_frame = 0x0;
|
||||
u32 num_frames = 1048576;
|
||||
u8 *trace_data;
|
||||
int i;
|
||||
u32 i;
|
||||
|
||||
oocd_trace_read_reg(oocd_trace, OOCD_TRACE_STATUS, &status);
|
||||
oocd_trace_read_reg(oocd_trace, OOCD_TRACE_ADDRESS, &address);
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@ typedef struct reg_s
|
|||
u8 *value;
|
||||
int dirty;
|
||||
int valid;
|
||||
int size;
|
||||
u32 size;
|
||||
bitfield_desc_t *bitfield_desc;
|
||||
int num_bitfields;
|
||||
void *arch_info;
|
||||
|
|
|
|||
|
|
@ -985,7 +985,7 @@ int target_write_buffer(struct target_s *target, u32 address, u32 size, u8 *buff
|
|||
/* handle unaligned head bytes */
|
||||
if (address % 4)
|
||||
{
|
||||
int unaligned = 4 - (address % 4);
|
||||
u32 unaligned = 4 - (address % 4);
|
||||
|
||||
if (unaligned > size)
|
||||
unaligned = size;
|
||||
|
|
@ -1060,7 +1060,7 @@ int target_read_buffer(struct target_s *target, u32 address, u32 size, u8 *buffe
|
|||
/* handle unaligned head bytes */
|
||||
if (address % 4)
|
||||
{
|
||||
int unaligned = 4 - (address % 4);
|
||||
u32 unaligned = 4 - (address % 4);
|
||||
|
||||
if (unaligned > size)
|
||||
unaligned = size;
|
||||
|
|
@ -1100,7 +1100,7 @@ int target_checksum_memory(struct target_s *target, u32 address, u32 size, u32*
|
|||
{
|
||||
u8 *buffer;
|
||||
int retval;
|
||||
int i;
|
||||
u32 i;
|
||||
u32 checksum = 0;
|
||||
if (!target->type->examined)
|
||||
{
|
||||
|
|
@ -2273,7 +2273,7 @@ int handle_verify_image_command_internal(struct command_context_s *cmd_ctx, char
|
|||
retval = target->type->read_memory(target, image.sections[i].base_address, size, count, data);
|
||||
if (retval == ERROR_OK)
|
||||
{
|
||||
int t;
|
||||
u32 t;
|
||||
for (t = 0; t < buf_cnt; t++)
|
||||
{
|
||||
if (data[t] != buffer[t])
|
||||
|
|
@ -2508,9 +2508,9 @@ static void writeString(FILE *f, char *s)
|
|||
}
|
||||
|
||||
/* Dump a gmon.out histogram file. */
|
||||
static void writeGmon(u32 *samples, int sampleNum, char *filename)
|
||||
static void writeGmon(u32 *samples, u32 sampleNum, char *filename)
|
||||
{
|
||||
int i;
|
||||
u32 i;
|
||||
FILE *f=fopen(filename, "w");
|
||||
if (f==NULL)
|
||||
return;
|
||||
|
|
@ -2539,8 +2539,8 @@ static void writeGmon(u32 *samples, int sampleNum, char *filename)
|
|||
|
||||
int addressSpace=(max-min+1);
|
||||
|
||||
static int const maxBuckets=256*1024; /* maximum buckets. */
|
||||
int length=addressSpace;
|
||||
static const u32 maxBuckets = 256 * 1024; /* maximum buckets. */
|
||||
u32 length = addressSpace;
|
||||
if (length > maxBuckets)
|
||||
{
|
||||
length=maxBuckets;
|
||||
|
|
@ -2747,7 +2747,8 @@ static int target_mem2array(Jim_Interp *interp, target_t *target, int argc, Jim_
|
|||
u32 v;
|
||||
const char *varname;
|
||||
u8 buffer[4096];
|
||||
int i, n, e, retval;
|
||||
int n, e, retval;
|
||||
u32 i;
|
||||
|
||||
/* argv[1] = name of array to receive the data
|
||||
* argv[2] = desired width
|
||||
|
|
@ -2928,7 +2929,8 @@ static int target_array2mem(Jim_Interp *interp, target_t *target, int argc, Jim_
|
|||
u32 v;
|
||||
const char *varname;
|
||||
u8 buffer[4096];
|
||||
int i, n, e, retval;
|
||||
int n, e, retval;
|
||||
u32 i;
|
||||
|
||||
/* argv[1] = name of array to get the data
|
||||
* argv[2] = desired width
|
||||
|
|
@ -3200,7 +3202,7 @@ static int target_configure( Jim_GetOptInfo *goi, target_t *target )
|
|||
teap = target->event_action;
|
||||
/* replace existing? */
|
||||
while( teap ){
|
||||
if( teap->event == n->value ){
|
||||
if( teap->event == (enum target_event)n->value ){
|
||||
break;
|
||||
}
|
||||
teap = teap->next;
|
||||
|
|
|
|||
|
|
@ -73,7 +73,7 @@ int target_hexmsg(target_t *target, int size, u32 length)
|
|||
char line[128];
|
||||
int line_len;
|
||||
debug_msg_receiver_t *c = target->dbgmsg;
|
||||
int i;
|
||||
u32 i;
|
||||
|
||||
LOG_DEBUG("size: %i, length: %i", size, length);
|
||||
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@
|
|||
#include <string.h>
|
||||
#include <inttypes.h>
|
||||
|
||||
int trace_point(target_t *target, int number)
|
||||
int trace_point(target_t *target, u32 number)
|
||||
{
|
||||
trace_t *trace = target->trace_info;
|
||||
|
||||
|
|
@ -60,7 +60,7 @@ int handle_trace_point_command(struct command_context_s *cmd_ctx, char *cmd, cha
|
|||
|
||||
if (argc == 0)
|
||||
{
|
||||
int i;
|
||||
u32 i;
|
||||
|
||||
for (i = 0; i < trace->num_trace_points; i++)
|
||||
{
|
||||
|
|
@ -125,9 +125,9 @@ int handle_trace_history_command(struct command_context_s *cmd_ctx, char *cmd, c
|
|||
}
|
||||
else
|
||||
{
|
||||
int i;
|
||||
int first = 0;
|
||||
int last = trace->trace_history_pos;
|
||||
u32 i;
|
||||
u32 first = 0;
|
||||
u32 last = trace->trace_history_pos;
|
||||
|
||||
if ( !trace->trace_history_size ) {
|
||||
command_print(cmd_ctx, "trace history buffer is not allocated");
|
||||
|
|
|
|||
|
|
@ -32,12 +32,12 @@ typedef struct trace_point_s
|
|||
|
||||
typedef struct trace_s
|
||||
{
|
||||
int num_trace_points;
|
||||
int trace_points_size;
|
||||
u32 num_trace_points;
|
||||
u32 trace_points_size;
|
||||
trace_point_t *trace_points;
|
||||
int trace_history_size;
|
||||
u32 trace_history_size;
|
||||
u32 *trace_history;
|
||||
int trace_history_pos;
|
||||
u32 trace_history_pos;
|
||||
int trace_history_overflowed;
|
||||
} trace_t;
|
||||
|
||||
|
|
@ -50,7 +50,7 @@ typedef enum trace_status
|
|||
TRACE_OVERFLOWED = 0x8,
|
||||
} trace_status_t;
|
||||
|
||||
extern int trace_point(struct target_s *target, int number);
|
||||
extern int trace_point(struct target_s *target, u32 number);
|
||||
extern int trace_register_commands(struct command_context_s *cmd_ctx);
|
||||
|
||||
#define ERROR_TRACE_IMAGE_UNAVAILABLE -(1500)
|
||||
|
|
|
|||
|
|
@ -1631,7 +1631,7 @@ int xscale_deassert_reset(target_t *target)
|
|||
u32 binary_size;
|
||||
|
||||
u32 buf_cnt;
|
||||
int i;
|
||||
u32 i;
|
||||
int retval;
|
||||
|
||||
breakpoint_t *breakpoint = target->breakpoints;
|
||||
|
|
@ -1928,7 +1928,7 @@ int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count
|
|||
armv4_5_common_t *armv4_5 = target->arch_info;
|
||||
xscale_common_t *xscale = armv4_5->arch_info;
|
||||
u32 *buf32;
|
||||
int i;
|
||||
u32 i;
|
||||
int retval;
|
||||
|
||||
LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
|
||||
|
|
@ -2933,7 +2933,7 @@ int xscale_analyze_trace(target_t *target, command_context_t *cmd_ctx)
|
|||
(((instruction.type == ARM_B) ||
|
||||
(instruction.type == ARM_BL) ||
|
||||
(instruction.type == ARM_BLX)) &&
|
||||
(instruction.info.b_bl_bx_blx.target_address != -1)))
|
||||
(instruction.info.b_bl_bx_blx.target_address != ~0UL)))
|
||||
{
|
||||
xscale->trace.current_pc = instruction.info.b_bl_bx_blx.target_address;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -743,7 +743,7 @@ static int handle_xsvf_command(struct command_context_s *cmd_ctx, char *cmd, cha
|
|||
|
||||
case XCOMMENT:
|
||||
{
|
||||
int ndx = 0;
|
||||
unsigned int ndx = 0;
|
||||
char comment[128];
|
||||
|
||||
do
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user