From 43750e8d5329003c1757672a2887910824b08ad9 Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Sun, 6 Jun 2021 17:48:48 +0200 Subject: [PATCH] target/nds32: rename CamelCase symbols Change-Id: I4619eb47cd051f52e60a3fdbc49aaf71e13a81e2 Signed-off-by: Antonio Borneo Reviewed-on: http://openocd.zylin.com/6342 Tested-by: jenkins Reviewed-by: Marc Schink Reviewed-by: Xiang W --- src/target/nds32.c | 2 +- src/target/nds32.h | 2 +- src/target/nds32_tlb.c | 26 +++++++++++++------------- src/target/nds32_tlb.h | 12 ++++++------ 4 files changed, 21 insertions(+), 21 deletions(-) diff --git a/src/target/nds32.c b/src/target/nds32.c index d524fc288..39d2c0067 100644 --- a/src/target/nds32.c +++ b/src/target/nds32.c @@ -1134,7 +1134,7 @@ static void nds32_init_config(struct nds32 *nds32) misc_config->div_instruction = (value_cr4 >> 5) & 0x1; misc_config->mac_instruction = (value_cr4 >> 6) & 0x1; misc_config->audio_isa = (value_cr4 >> 7) & 0x3; - misc_config->L2_cache = (value_cr4 >> 9) & 0x1; + misc_config->l2_cache = (value_cr4 >> 9) & 0x1; misc_config->reduce_register = (value_cr4 >> 10) & 0x1; misc_config->addr_24 = (value_cr4 >> 11) & 0x1; misc_config->interruption_level = (value_cr4 >> 12) & 0x1; diff --git a/src/target/nds32.h b/src/target/nds32.h index 3670fd289..e9b9ee194 100644 --- a/src/target/nds32.h +++ b/src/target/nds32.h @@ -217,7 +217,7 @@ struct nds32_misc_config { bool div_instruction; bool mac_instruction; int audio_isa; - bool L2_cache; + bool l2_cache; bool reduce_register; bool addr_24; bool interruption_level; diff --git a/src/target/nds32_tlb.c b/src/target/nds32_tlb.c index 93a924109..81734e0c1 100644 --- a/src/target/nds32_tlb.c +++ b/src/target/nds32_tlb.c @@ -44,34 +44,34 @@ int nds32_walk_page_table(struct nds32 *nds32, const target_addr_t virtual_addre struct target *target = nds32->target; uint32_t value_mr1; uint32_t load_address; - uint32_t L1_page_table_entry; - uint32_t L2_page_table_entry; + uint32_t l1_page_table_entry; + uint32_t l2_page_table_entry; uint32_t page_size_index = nds32->mmu_config.default_min_page_size; struct page_table_walker_info_s *page_table_info_p = &(page_table_info[page_size_index]); /* Read L1 Physical Page Table */ nds32_get_mapped_reg(nds32, MR1, &value_mr1); - load_address = (value_mr1 & page_table_info_p->L1_base_mask) | - ((virtual_address & page_table_info_p->L1_offset_mask) >> - page_table_info_p->L1_offset_shift); + load_address = (value_mr1 & page_table_info_p->l1_base_mask) | + ((virtual_address & page_table_info_p->l1_offset_mask) >> + page_table_info_p->l1_offset_shift); /* load_address is physical address */ - nds32_read_buffer(target, load_address, 4, (uint8_t *)&L1_page_table_entry); + nds32_read_buffer(target, load_address, 4, (uint8_t *)&l1_page_table_entry); /* Read L2 Physical Page Table */ - if (L1_page_table_entry & 0x1) /* L1_PTE not present */ + if (l1_page_table_entry & 0x1) /* L1_PTE not present */ return ERROR_FAIL; - load_address = (L1_page_table_entry & page_table_info_p->L2_base_mask) | - ((virtual_address & page_table_info_p->L2_offset_mask) >> - page_table_info_p->L2_offset_shift); + load_address = (l1_page_table_entry & page_table_info_p->l2_base_mask) | + ((virtual_address & page_table_info_p->l2_offset_mask) >> + page_table_info_p->l2_offset_shift); /* load_address is physical address */ - nds32_read_buffer(target, load_address, 4, (uint8_t *)&L2_page_table_entry); + nds32_read_buffer(target, load_address, 4, (uint8_t *)&l2_page_table_entry); - if ((L2_page_table_entry & 0x1) != 0x1) /* L2_PTE not valid */ + if ((l2_page_table_entry & 0x1) != 0x1) /* L2_PTE not valid */ return ERROR_FAIL; - *physical_address = (L2_page_table_entry & page_table_info_p->ppn_mask) | + *physical_address = (l2_page_table_entry & page_table_info_p->ppn_mask) | (virtual_address & page_table_info_p->va_offset_mask); return ERROR_OK; diff --git a/src/target/nds32_tlb.h b/src/target/nds32_tlb.h index 62512c111..c22ed7335 100644 --- a/src/target/nds32_tlb.h +++ b/src/target/nds32_tlb.h @@ -29,13 +29,13 @@ enum { struct page_table_walker_info_s { - uint32_t L1_offset_mask; - uint32_t L1_offset_shift; - uint32_t L2_offset_mask; - uint32_t L2_offset_shift; + uint32_t l1_offset_mask; + uint32_t l1_offset_shift; + uint32_t l2_offset_mask; + uint32_t l2_offset_shift; uint32_t va_offset_mask; - uint32_t L1_base_mask; - uint32_t L2_base_mask; + uint32_t l1_base_mask; + uint32_t l2_base_mask; uint32_t ppn_mask; };