flash: add nuc910 nand driver
This adds a nand driver support for the nuc910 target. Note that ECC is not currently supported by this driver, although it is supported by the peripheral. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
This commit is contained in:
Spencer Oliver
parent
0345667642
commit
4611f87f0a
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@ -27,7 +27,8 @@ NAND_DRIVERS = \
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s3c2440.c \
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s3c2443.c \
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s3c6400.c \
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at91sam9.c
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at91sam9.c \
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nuc910.c
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noinst_HEADERS = \
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arm_io.h \
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@ -39,6 +40,7 @@ noinst_HEADERS = \
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mx2.h \
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mx3.h \
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s3c24xx.h \
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s3c24xx_regs.h
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s3c24xx_regs.h \
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nuc910.h
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MAINTAINERCLEANFILES = $(srcdir)/Makefile.in
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@ -40,6 +40,7 @@ extern struct nand_flash_controller s3c6400_nand_controller;
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extern struct nand_flash_controller imx27_nand_flash_controller;
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extern struct nand_flash_controller imx31_nand_flash_controller;
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extern struct nand_flash_controller at91sam9_nand_controller;
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extern struct nand_flash_controller nuc910_nand_controller;
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/* extern struct nand_flash_controller boundary_scan_nand_controller; */
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@ -57,6 +58,7 @@ static struct nand_flash_controller *nand_flash_controllers[] =
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&imx27_nand_flash_controller,
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&imx31_nand_flash_controller,
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&at91sam9_nand_controller,
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&nuc910_nand_controller,
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/* &boundary_scan_nand_controller, */
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NULL
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};
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@ -0,0 +1,240 @@
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/***************************************************************************
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* Copyright (C) 2010 by Spencer Oliver *
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* spen@spen-soft.co.uk *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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/*
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* NAND controller interface for Nuvoton NUC910
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "imp.h"
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#include "nuc910.h"
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#include "arm_io.h"
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#include <target/arm.h>
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struct nuc910_nand_controller
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{
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struct target *target;
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struct arm_nand_data io;
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};
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static int validate_target_state(struct nand_device *nand)
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{
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struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
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struct target *target = nuc910_nand->target;
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if (target->state != TARGET_HALTED) {
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LOG_ERROR("Target not halted");
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return ERROR_NAND_OPERATION_FAILED;
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}
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return ERROR_OK;
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}
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static int nuc910_nand_command(struct nand_device *nand, uint8_t command)
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{
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struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
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struct target *target = nuc910_nand->target;
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int result;
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if ((result = validate_target_state(nand)) != ERROR_OK)
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return result;
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target_write_u8(target, NUC910_SMCMD, command);
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return ERROR_OK;
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}
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static int nuc910_nand_address(struct nand_device *nand, uint8_t address)
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{
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struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
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struct target *target = nuc910_nand->target;
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int result;
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if ((result = validate_target_state(nand)) != ERROR_OK)
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return result;
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target_write_u32(target, NUC910_SMADDR, ((address & 0xff) | NUC910_SMADDR_EOA));
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return ERROR_OK;
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}
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static int nuc910_nand_read(struct nand_device *nand, void *data)
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{
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struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
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struct target *target = nuc910_nand->target;
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int result;
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if ((result = validate_target_state(nand)) != ERROR_OK)
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return result;
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target_read_u8(target, NUC910_SMDATA, data);
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return ERROR_OK;
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}
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static int nuc910_nand_write(struct nand_device *nand, uint16_t data)
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{
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struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
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struct target *target = nuc910_nand->target;
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int result;
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if ((result = validate_target_state(nand)) != ERROR_OK)
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return result;
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target_write_u8(target, NUC910_SMDATA, data);
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return ERROR_OK;
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}
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static int nuc910_nand_read_block_data(struct nand_device *nand,
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uint8_t *data, int data_size)
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{
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struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
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int result;
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if ((result = validate_target_state(nand)) != ERROR_OK)
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return result;
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nuc910_nand->io.chunk_size = nand->page_size;
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/* try the fast way first */
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result = arm_nandread(&nuc910_nand->io, data, data_size);
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if (result != ERROR_NAND_NO_BUFFER)
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return result;
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/* else do it slowly */
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while (data_size--)
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nuc910_nand_read(nand, data++);
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return ERROR_OK;
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}
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static int nuc910_nand_write_block_data(struct nand_device *nand,
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uint8_t *data, int data_size)
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{
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struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
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int result;
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if ((result = validate_target_state(nand)) != ERROR_OK)
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return result;
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nuc910_nand->io.chunk_size = nand->page_size;
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/* try the fast way first */
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result = arm_nandwrite(&nuc910_nand->io, data, data_size);
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if (result != ERROR_NAND_NO_BUFFER)
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return result;
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/* else do it slowly */
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while (data_size--)
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nuc910_nand_write(nand, *data++);
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return ERROR_OK;
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}
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static int nuc910_nand_reset(struct nand_device *nand)
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{
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return nuc910_nand_command(nand, NAND_CMD_RESET);
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}
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static int nuc910_nand_ready(struct nand_device *nand, int timeout)
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{
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struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
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struct target *target = nuc910_nand->target;
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uint32_t status;
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do {
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target_read_u32(target, NUC910_SMISR, &status);
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if (status & NUC910_SMISR_RB_) {
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return 1;
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}
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alive_sleep(1);
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} while (timeout-- > 0);
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return 0;
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}
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NAND_DEVICE_COMMAND_HANDLER(nuc910_nand_device_command)
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{
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struct nuc910_nand_controller *nuc910_nand;
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nuc910_nand = calloc(1, sizeof(struct nuc910_nand_controller));
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if (!nuc910_nand) {
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LOG_ERROR("no memory for nand controller\n");
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return ERROR_NAND_DEVICE_INVALID;
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}
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nand->controller_priv = nuc910_nand;
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nuc910_nand->target = get_target(CMD_ARGV[1]);
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if (!nuc910_nand->target) {
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LOG_ERROR("target '%s' not defined", CMD_ARGV[1]);
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free(nuc910_nand);
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return ERROR_NAND_DEVICE_INVALID;
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}
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return ERROR_OK;
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}
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static int nuc910_nand_init(struct nand_device *nand)
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{
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struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
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struct target *target = nuc910_nand->target;
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int bus_width = nand->bus_width ? : 8;
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int result;
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if ((result = validate_target_state(nand)) != ERROR_OK)
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return result;
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/* nuc910 only supports 8bit */
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if (bus_width != 8)
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{
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LOG_ERROR("nuc910 only supports 8 bit bus width, not %i", bus_width);
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return ERROR_NAND_OPERATION_NOT_SUPPORTED;
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}
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/* inform calling code about selected bus width */
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nand->bus_width = bus_width;
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nuc910_nand->io.target = target;
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nuc910_nand->io.data = NUC910_SMDATA;
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nuc910_nand->io.op = ARM_NAND_NONE;
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/* configure nand controller */
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target_write_u32(target, NUC910_FMICSR, NUC910_FMICSR_SM_EN);
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target_write_u32(target, NUC910_SMCSR, 0x010000a8); /* 2048 page size */
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target_write_u32(target, NUC910_SMTCR, 0x00010204);
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target_write_u32(target, NUC910_SMIER, 0x00000000);
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return ERROR_OK;
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}
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struct nand_flash_controller nuc910_nand_controller =
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{
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.name = "nuc910",
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.command = nuc910_nand_command,
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.address = nuc910_nand_address,
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.read_data = nuc910_nand_read,
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.write_data = nuc910_nand_write,
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.write_block_data = nuc910_nand_write_block_data,
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.read_block_data = nuc910_nand_read_block_data,
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.nand_ready = nuc910_nand_ready,
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.reset = nuc910_nand_reset,
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.nand_device_command = nuc910_nand_device_command,
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.init = nuc910_nand_init,
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};
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@ -0,0 +1,60 @@
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/***************************************************************************
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* Copyright (C) 2010 by Spencer Oliver *
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* spen@spen-soft.co.uk *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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/*
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* NAND controller interface for Nuvoton NUC910
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*/
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#ifndef NUC910_H
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#define NUC910_H
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#define NUC910_FMICSR 0xB000D000
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#define NUC910_SMCSR 0xB000D0A0
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#define NUC910_SMTCR 0xB000D0A4
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#define NUC910_SMIER 0xB000D0A8
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#define NUC910_SMISR 0xB000D0AC
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#define NUC910_SMCMD 0xB000D0B0
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#define NUC910_SMADDR 0xB000D0B4
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#define NUC910_SMDATA 0xB000D0B8
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#define NUC910_SMECC0 0xB000D0BC
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#define NUC910_SMECC1 0xB000D0C0
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#define NUC910_SMECC2 0xB000D0C4
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#define NUC910_SMECC3 0xB000D0C8
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#define NUC910_ECC4ST 0xB000D114
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/* Global Control and Status Register (FMICSR) */
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#define NUC910_FMICSR_SM_EN (1<<3)
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/* NAND Flash Address Port Register (SMADDR) */
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#define NUC910_SMADDR_EOA (1<<31)
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/* NAND Flash Control and Status Register (SMCSR) */
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#define NUC910_SMCSR_PSIZE (1<<3)
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#define NUC910_SMCSR_DBW (1<<4)
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/* NAND Flash Interrupt Status Register (SMISR) */
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#define NUC910_SMISR_ECC_IF (1<<2)
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#define NUC910_SMISR_RB_ (1<<18)
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/* ECC4 Correction Status (ECC4ST) */
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#endif /* NUC910_H */
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@ -21,6 +21,9 @@ $_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x04000000 -wo
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME cfi 0x20000000 0x00200000 2 2 $_TARGETNAME
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set _NANDNAME $_CHIPNAME.nand
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nand device $_NANDNAME nuc910 $_TARGETNAME
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#
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# Target events
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#
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