diff --git a/tcl/target/stm32_stlink.cfg b/tcl/target/stm32_stlink.cfg
index 7dccd4730..96bce5f00 100644
--- a/tcl/target/stm32_stlink.cfg
+++ b/tcl/target/stm32_stlink.cfg
@@ -9,11 +9,11 @@ if { [info exists CHIPNAME] } {
 }
 
 # Work-area is a space in RAM used for flash programming
-# By default use 16kB
+# By default use 4kB (as found on some STM32F100s)
 if { [info exists WORKAREASIZE] } {
    set _WORKAREASIZE $WORKAREASIZE
 } else {
-   set _WORKAREASIZE 0x4000
+   set _WORKAREASIZE 0x1000
 }
 
 if { [info exists CPUTAPID] } {
diff --git a/tcl/target/stm32f1x.cfg b/tcl/target/stm32f1x.cfg
index 7d3f42f3b..12d33d52c 100644
--- a/tcl/target/stm32f1x.cfg
+++ b/tcl/target/stm32f1x.cfg
@@ -13,11 +13,11 @@ if { [info exists ENDIAN] } {
 }
 
 # Work-area is a space in RAM used for flash programming
-# By default use 16kB
+# By default use 4kB (as found on some STM32F100s)
 if { [info exists WORKAREASIZE] } {
    set _WORKAREASIZE $WORKAREASIZE
 } else {
-   set _WORKAREASIZE 0x4000
+   set _WORKAREASIZE 0x1000
 }
 
 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
diff --git a/tcl/target/stm32f1x_stlink.cfg b/tcl/target/stm32f1x_stlink.cfg
index 9faaf6a0b..3b7daef08 100644
--- a/tcl/target/stm32f1x_stlink.cfg
+++ b/tcl/target/stm32f1x_stlink.cfg
@@ -11,7 +11,7 @@ if { [info exists CPUTAPID] == 0 } {
 }
 
 if { [info exists WORKAREASIZE] == 0 } {
-   set WORKAREASIZE 0x4000
+   set WORKAREASIZE 0x1000
 }
 
 source [find target/stm32_stlink.cfg]